12.
>>
>> Reviewed-by: Alistair Francis
>> Signed-off-by: Anup Patel
> @dramforever do you want to give an Ack or Reviewed-by?
>
> Alistair
Acked-By: dramforever
dramforever
xinsn_access_size = 1 << GET_FUNCT3(xinsn);
> +xinsn = SET_I_IMM(xinsn, 0);
> +break;
> +case OPC_RISC_STORE:
> +case OPC_RISC_FP_STORE:
> +xinsn = insn;
> +xinsn_access_rs1 = GET_RS1(xinsn);
> + xins
se == RISCV_EXCP_STORE_AMO_ACCESS_FAULT) {
>> +tinst = riscv_transformed_insn(env, env->bins, true,
>> tval);
>> +} else {
>> + tinst = riscv_transformed_insn(env, env->bins, false,
>> tval);
>> +
ion guest-page faults should set [m|h]tinst to one of the
pseudoinstructions if env->two_stage_lookup is true. Otherwise it should set
[m|h]tinst to zero.
In any case, as this seems to be one of the first implementations of
[m|h]tinst, it might be worthwhile to confirm with the spec authors and clarify
any unclear bits before this gets released.
dramforever
> [m|h]tinst to zero.
>>
>> In any case, as this seems to be one of the first implementations of
>> [m|h]tinst, it might be worthwhile to confirm with the spec authors and
>> clarify
>> any unclear bits before this gets released.
> This is already handled because tinst is initialized to zero.
If an instruction guest-page fault occurs due to a G-stage fault while doing
VS-stage page table walk, i.e. env->two_stage_indirect_lookup is true (I had
mistakenly wrote env->two_stage_lookup earlier), and the faulting guest
physical address (env->guest_phys_fault_addr) is written to mtval2/htval,
[m|h]tinst must be a pseudoinstruction and not zero. This case is not handled
in the v5 patch.
dramforever
