at
> > smp = $MAX_SMP
> > extra_params = -append 'smp'
> > groups = selftest
> > +
> > +# Test PMU support (KVM)
> > +[pmu-kvm]
> > +file = pmu.flat
> > +groups = pmu
> > +accel = kvm
>
> No need to specify kvm when it works for both. Both is assumed.
> tcg-only or kvm-only tests are exceptions requiring the 'accel'
> parameter and a comment explaining why it doesn't work on the
> other.
>
> > +
> > +# Test PMU support (TCG) with -icount IPC=1
> > +[pmu-tcg-icount-1]
> > +file = pmu.flat
> > +extra_params = -icount 0 -append '1'
> > +groups = pmu
> > +accel = tcg
> > +
> > +# Test PMU support (TCG) with -icount IPC=256
> > +[pmu-tcg-icount-256]
> > +file = pmu.flat
> > +extra_params = -icount 8 -append '256'
> > +groups = pmu
> > +accel = tcg
>
> Why are these entries added now. These tests aren't yet implemented.
What makes you say they aren't implemented? They're running the
same binary with a different command line arguments (that turns on
stricter TCG-specific checking).
Not in this patch, they're not. 'int main(void)' <-- arguments are
ignored. Please only introduce unittests.cfg blocks with the patch
that implements them.
Whoops, that's a rebase error. Sorry about that.
Cov
'1'
+groups = pmu
+accel = tcg
+
+# Test PMU support (TCG) with -icount IPC=256
+[pmu-tcg-icount-256]
+file = pmu.flat
+extra_params = -icount 8 -append '256'
+groups = pmu
+accel = tcg
Why are these entries added now. These tests aren't yet implemented.
What makes you say they aren't implemented? They're running the
same binary with a different command line arguments (that turns on
stricter TCG-specific checking).
Thanks,
Cov
lter and enable set
registers, but if it doesn't yet, that's something we can improve :).
Thanks,
Cov
+{
+ unsigned long cycles;
+
+ asm volatile("mrs %0, pmccntr_el0" : "=r" (cycles));
+ return cycles;
+}
+
+static inline void enable_counter(uint32_t idx)
+{
+ asm volatile("msr pmcntenset_el0, %0" : : "r" (1 << idx));
+}
Same thought as above about uniformity and generatability.
+static inline void disable_counter(uint32_t idx)
+{
+ asm volatile("msr pmcntensclr_el0, %0" : : "r" (1 << idx));
+}
As above, this function doesn't seem to be used yet.
Thanks,
Cov
