Song,
On Fri, Mar 8, 2024 at 12:51 AM Song Gao wrote:
>
> Signed-off-by: Song Gao
> Message-Id: <20240301093839.663947-4-gaos...@loongson.cn>
> ---
> hw/loongarch/boot.c | 70 -
> 1 file changed, 69 insertions(+), 1 deletion(-)
>
> diff --git a/hw/loo
Hi, Xianglai,
Generally, the subject should be "Fix tlb huge page loading issue"
rather than "Fixed tlb huge page loading issue".
On Thu, Mar 14, 2024 at 9:34 AM Xianglai Li wrote:
>
> When we use qemu tcg simulation, the page size of bios is 4KB.
> When using the level 2 super large page (page
On Thu, Mar 7, 2024 at 11:35 PM Song Gao wrote:
>
> Signed-off-by: Song Gao
> Message-Id: <20240301093839.663947-4-gaos...@loongson.cn>
> ---
> hw/loongarch/boot.c | 70 -
> 1 file changed, 69 insertions(+), 1 deletion(-)
>
> diff --git a/hw/loongarch/
Hi, Xianglai,
How to pass the BIOS file to qemu after this patch? With the old
cmdline I get an RCU stall and freeze the kvm host.
Huacai
On Sat, Mar 2, 2024 at 12:14 PM lixianglai wrote:
>
> Hi Philippe:
>
> On 29/2/24 12:38, Song Gao wrote:
>
> From: Xianglai Li
>
> The UEFI loading mode in
Hi, Philippe,
On Fri, Aug 18, 2023 at 4:52 PM Philippe Mathieu-Daudé
wrote:
>
> Hi Jiajie, Song,
>
> (+Huacai)
>
> On 17/8/23 11:31, Song Gao wrote:
> > From: Jiajie Chen
> >
> > Add object class for future loongarch32 cpus. It is derived from the
> > loongarch64 object class.
>
> Is it how the
Hi, Richard and Xuerui,
On Mon, Aug 15, 2022 at 4:54 AM Richard Henderson
wrote:
>
> On 8/14/22 09:55, WANG Xuerui wrote:
> > From: WANG Xuerui
> >
> > The only LoongArch CPU implemented is modeled after the Loongson 3A5000,
> > but it is not the real thing, ...
>
> The 3A5000 is the SoC, as far
Hi, Xiaojuan,
On Mon, Jun 20, 2022 at 4:21 PM Xiaojuan Yang wrote:
>
> Signed-off-by: Xiaojuan Yang
> ---
> hw/loongarch/fw_cfg.c | 33 +++
> hw/loongarch/fw_cfg.h | 15 +++
> hw/loongarch/loongson3.c| 81 -
> include/hw/loonga
Hi, Xiaojuan,
On Mon, Jun 20, 2022 at 4:11 PM Xiaojuan Yang wrote:
>
> Signed-off-by: Xiaojuan Yang
> ---
> hw/loongarch/loongson3.c| 136 +++-
> include/hw/loongarch/virt.h | 4 ++
> target/loongarch/cpu.c | 1 +
> target/loongarch/cpu.h | 3
Hi, Xiaojuan,
Maybe it is better to use "constant timer" instead of "stable timer",
which is more "native" in English.
Huacai
On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote:
>
> Signed-off-by: Xiaojuan Yang
> Signed-off-by: Song Gao
> ---
> target/loongarch/cpu.c | 9 +
> ta
Hi, Xiaojuan,
On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote:
>
> Emulate a 3A5000 board use the new loongarch instruction.
> 3A5000 belongs to the Loongson3 series processors.
> The board consists of a 3A5000 cpu model and the 7A1000
> bridge. The host 3A5000 board is really complicated and
Hi, all,
On Mon, Nov 22, 2021 at 7:41 PM gaosong wrote:
>
> Hi Richard,
>
> On 2021/11/20 下午6:33, Richard Henderson wrote:
>
>
> Drop all of the the inline markers.
>
> +{
> +int i;
> +
> +__put_user(env->pc, &sc->sc_pc);
> +
> +__put_user(0, &sc->sc_gpr[0]);
> +for (i = 1; i < 32
Hi, Xiaojuan,
On Thu, Nov 11, 2021 at 9:41 AM Xiaojuan Yang wrote:
>
> Mainly introduce how to run the softmmu
>
> Signed-off-by: Xiaojuan Yang
> Signed-off-by: Song Gao
> ---
> target/loongarch/README | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/target/loonga
OK, just do it as Philippe suggested.
Huacai
On Mon, Dec 28, 2020 at 9:42 AM BALATON Zoltan via
wrote:
>
> Hello,
>
> On Mon, 28 Dec 2020, Huacai Chen wrote:
> > Hi, BALATON
> >
> > On Sun, Dec 27, 2020 at 9:21 AM BALATON Zoltan wrote:
> >>
> >> Compiling vt82c686.c fails without APM and ACPI_P
Hi, Philippe,
On Wed, Dec 2, 2020 at 5:16 PM Philippe Mathieu-Daudé wrote:
>
> On 12/2/20 2:01 AM, chen huacai wrote:
> > Hi, Philippe,
> >
> > On Wed, Dec 2, 2020 at 3:31 AM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Userland ELF bi
Hi, Philippe,
On Wed, Dec 2, 2020 at 3:31 AM Philippe Mathieu-Daudé wrote:
>
> Userland ELF binaries using Longsoon SIMD instructions have the
> HWCAP_LOONGSON_MMI bit set [1].
> Binaries compiled for Longsoon 3E [2] have the HWCAP_LOONGSON_EXT
> bit set for the LQ / SQ instructions.
What is Loon
Reviewed-by: Huacai Chen
On Tue, Dec 1, 2020 at 2:24 AM Richard Henderson
wrote:
>
> On 11/30/20 4:22 AM, Philippe Mathieu-Daudé wrote:
> > The Loongson-3A4000 is a GS464V-based processor with MIPS MSA ASE:
> > https://www.mail-archive.com/qemu-devel@nongnu.org/msg763059.html
> >
> > Commit af86
Reviewed-by: Huacai Chen
On Tue, Nov 10, 2020 at 1:37 AM Richard Henderson
wrote:
>
> On 11/9/20 1:04 AM, Philippe Mathieu-Daudé wrote:
> > Based-on: <20201108234234.2389789-1-f4...@amsat.org>
> >
> > Philippe Mathieu-Daudé (2):
> > target/mips: Replace magic values by CP0PM_MASK or
> > TA
Hi, Philippe,
On Wed, Nov 4, 2020 at 12:17 PM chen huacai wrote:
>
> Hi, Philippe and Jiaxun,
>
> On Wed, Nov 4, 2020 at 1:17 AM Philippe Mathieu-Daudé wrote:
> >
> > On 11/3/20 4:40 PM, Jiaxun Yang wrote:
> > > 于 2020年11月3日 GMT+08:00 下午8:28:27, "Philippe M
Hi, Philippe and Jiaxun,
On Wed, Nov 4, 2020 at 1:17 AM Philippe Mathieu-Daudé wrote:
>
> On 11/3/20 4:40 PM, Jiaxun Yang wrote:
> > 于 2020年11月3日 GMT+08:00 下午8:28:27, "Philippe Mathieu-Daudé"
> > 写到:
> >> On 11/3/20 10:32 AM, AlexChen wrote:
> >>> According to the loongson spec
> >>> (http://ww
Hi, Richard,
On Wed, Oct 28, 2020 at 4:48 PM Richard Henderson
wrote:
>
> On 10/27/20 9:17 PM, Huacai Chen wrote:
> > +invalid:
> > +/*
> > + * When invalid, ensure the value is bigger than or equal to
> > + * the minimal but smaller than or equal to the maxium.
> > + */
> > +
Hi, Philippe,
On Sun, Oct 11, 2020 at 4:43 AM Philippe Mathieu-Daudé wrote:
>
> Since its introduction in commit 6af0bf9c7c3,
> the 'r4k' machine runs at 200 MHz.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/mips/r4k.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> d
Hi, Aleksandar,
On Thu, Oct 8, 2020 at 4:40 AM Aleksandar Markovic
wrote:
>
> I have been working on project other than QEMU for some time, and would
> like to devote myself to that project. It is imposible for me to find
> enough time to perform maintainer's duties with needed meticulousness
> a
Hi, Philippe,
On Thu, Sep 17, 2020 at 3:56 PM Philippe Mathieu-Daudé wrote:
>
> Hi Huacai,
>
> On 9/16/20 4:12 AM, Huacai Chen wrote:
> > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> > R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
> > Loongson-3
Hi, Aleksandar,
On Thu, Sep 17, 2020 at 4:22 PM Aleksandar Markovic
wrote:
>
>
>
> On Wednesday, September 16, 2020, Huacai Chen wrote:
>>
>> Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
>> R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
>> Loongso
Hi, Philippe,
On Sat, Sep 19, 2020 at 9:59 PM Philippe Mathieu-Daudé wrote:
>
> On 9/19/20 3:00 AM, Huacai Chen wrote:
> > Hi, Philippe,
> >
> > On Thu, Sep 17, 2020 at 3:53 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> On 9/16/20 12:47 PM, Philippe Mathieu-Daudé wrote:
> >>> On 9/16/20 11:49
Hi, all,
On Wed, Sep 9, 2020 at 1:25 AM Thomas Huth wrote:
>
> On 24/08/2020 10.11, Huacai Chen wrote:
> > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now,
> > libvirt uses a null-machine to detect the kvm capability. In the MIPS
> > case, it will return "KVM not supported" on
Reviewed-by: Huacai Chen
On Tue, Sep 1, 2020 at 6:41 PM Philippe Mathieu-Daudé wrote:
>
> Displaying "vt82c686b_init error" doesn't give any hint about why
> this call failed. As this message targets developers and not users,
> replace the pointless error message by a call to assert() which
> wi
Acked-by: Huacai Chen
On Thu, Jul 2, 2020 at 10:23 PM Jiaxun Yang wrote:
>
>
> 在 2020/7/2 下午9:37, Philippe Mathieu-Daudé 写道:
> > From: Aleksandar Markovic
> >
> > Huacai Chen steps in as new energy [1].
> >
> > Aurelien Jarno comment [2]:
> >
> >It happens that I known Huacai Chen from the
his feedback.
> >
> >>> R: Aleksandar Rikalo
> >>> S: Obsolete
> >>> F: hw/mips/r4k.c
> >>> @@ -1103,7 +1106,8 @@ S: Maintained
> >>> F: hw/intc/loongson_liointc.c
> >>>
> >>> Boston
> >>&g
On Sat, Jun 6, 2020 at 4:01 AM Aleksandar Markovic
wrote:
>
> суб, 6. јун 2020. у 09:32 Aleksandar Markovic
> је написао/ла:
> >
> > уто, 2. јун 2020. у 04:40 Huacai Chen је написао/ла:
> > >
> > > Add Loongson-3 based machine support, it use i8259 as the interrupt
> > > controler and use GPEX a
On Tue, Jun 2, 2020 at 4:12 AM Philippe Mathieu-Daudé wrote:
>
> On 6/2/20 4:39 AM, Huacai Chen wrote:
> > Signed-off-by: Huacai Chen
> > Co-developed-by: Jiaxun Yang
> > ---
> > MAINTAINERS | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index
On Mon, Jun 1, 2020 at 6:15 AM Aleksandar Markovic
wrote:
>
> On Mon, Jun 1, 2020 at 11:01 AM Aleksandar Markovic
> wrote:
> >
> > On Sun, May 3, 2020 at 12:24 PM Huacai Chen wrote:
> > >
> > > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
> > > can't create a VZ guest i
Reviewed-by: Huacai Chen
On Tue, May 26, 2020 at 2:04 PM Philippe Mathieu-Daudé wrote:
>
> ping?
>
> On 5/15/20 10:42 AM, Philippe Mathieu-Daudé wrote:
> > The Fuloong machine never had to use "audio/audio.h", remove it.
> >
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > hw/mips/mips_fu
Hi, Philippe and Alexandar,
On Mon, May 11, 2020 at 2:38 PM Philippe Mathieu-Daudé wrote:
>
> On 5/11/20 8:21 AM, Aleksandar Markovic wrote:
> > пон, 11. мај 2020. у 03:11 chen huacai је
> > написао/ла:
> >>
> >> Hi, Philippe,
> >>
> >>
Reviewed-by: Huacai Chen
On Mon, May 11, 2020 at 5:07 AM Philippe Mathieu-Daudé wrote:
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/bonito.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
> index b9bfe
Reviewed-by: Huacai Chen
On Mon, May 11, 2020 at 5:03 AM Philippe Mathieu-Daudé wrote:
>
> From: Philippe Mathieu-Daudé
>
> Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select
> the Bonito North Bridge.
>
> Reviewed-by: Aleksandar Markovic
> Signed-off-by: Philippe Mathieu-Da
Hi, Philippe,
On Mon, May 11, 2020 at 5:06 AM Philippe Mathieu-Daudé wrote:
>
> We always miswrote the Fuloong machine... Fix its name.
> Add an machine alias to the previous name for backward
> compatibility.
>
> Suggested-by: Aleksandar Markovic
> Signed-off-by: Philippe Mathieu-Daudé
> ---
>
Reviewed-by: Huacai Chen
On Mon, May 11, 2020 at 5:03 AM Philippe Mathieu-Daudé wrote:
>
> Move the RAM-related call closer to the RAM creation block,
> rename the ROM comment.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/mips/mips_fulong2e.c | 5 ++---
> 1 file changed, 2 insertions(+
Hi, Philippe,
On Mon, May 11, 2020 at 5:05 AM Philippe Mathieu-Daudé wrote:
>
> I'm not sure where 'pmon_fulong2e.bin' comes from. As I always
> found this bios named 'pmon_2e.bin', rename the definition.
>
The Fuloong BIOS doesn't integrated in QEMU, so its name can be
anything. So, let's keep
Hi, Aleksandar,
On Sat, May 9, 2020 at 12:55 AM Aleksandar Markovic
wrote:
>
> нед, 3. мај 2020. у 12:21 Huacai Chen је написао/ла:
> >
> > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> > R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
> > Loongso
Hi, Philippe,
On Tue, May 5, 2020 at 5:33 PM Philippe Mathieu-Daudé wrote:
>
> On 5/5/20 9:29 AM, Huacai Chen wrote:
> > The description of "make check" is out-of-date, so fix it by adding
> > block and softfloat.
> >
> > Signed-off-by: Huacai Chen
> > ---
> > tests/Makefile.include | 2 +-
> >
Hi, Aleksandar,
On Sun, May 3, 2020 at 6:50 PM Aleksandar Markovic
wrote:
>
> нед, 3. мај 2020. у 12:21 Huacai Chen је написао/ла:
> >
> > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> > R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
> > Loongson
Hi, Yonggang,
We are planning to translate these manuals to English by human, but it
needs a very long time to complete.
Huacai
On Sun, May 3, 2020 at 6:42 PM 罗勇刚(Yonggang Luo) wrote:
>
> The english version of the reference document is hard to head.
> I suggest first convert the chinese versio
Hi, Philippe,
On Wed, Apr 29, 2020 at 4:30 PM Philippe Mathieu-Daudé wrote:
>
> Refactor duplicated code in a single place.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/mips/mips_int.c | 11 +++
> 1 file changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/hw/mips/mips_int.
Hi, Philippe,
On Mon, Apr 27, 2020 at 5:57 PM Philippe Mathieu-Daudé wrote:
>
> On 4/27/20 11:33 AM, Huacai Chen wrote:
> > Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
> > IP2 delivery as well, because Loongson-3 based machine use both IRQ2
> > (CPU's IP2) and IRQ3 (CPU
Hi, Philippe,
On Tue, Apr 28, 2020 at 2:34 PM Philippe Mathieu-Daudé wrote:
>
> Hi Huacai,
>
> On 4/27/20 11:33 AM, Huacai Chen wrote:
> > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> > R1/R2. Loongson-3A R4 is the newest and its ISA is almost the superset
> > of all ot
Hi, Philippe,
On Tue, Apr 28, 2020 at 2:18 PM Philippe Mathieu-Daudé wrote:
>
> Hi Huacai,
>
> On 4/27/20 11:33 AM, Huacai Chen wrote:
> > Signed-off-by: Huacai Chen
> > Co-developed-by: Jiaxun Yang
> > ---
> > MAINTAINERS | 6 ++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/MA
Hi, Sasha,
On Wed, Apr 22, 2020 at 9:42 AM Sasha Levin wrote:
>
> Hi
>
> [This is an automated email]
>
> This commit has been processed because it contains a -stable tag.
> The stable tag indicates that it's relevant for the following trees: all
>
> The bot has tested the following trees: v5.6.5
Hi, Sasha,
On Wed, Apr 22, 2020 at 9:40 AM Sasha Levin wrote:
>
> Hi
>
> [This is an automated email]
>
> This commit has been processed because it contains a -stable tag.
> The stable tag indicates that it's relevant for the following trees: all
>
> The bot has tested the following trees: v5.6.5
Hi, all,
On Thu, Nov 14, 2019 at 8:34 PM Aleksandar Markovic
wrote:
>
> Hi, Philippe,
>
> > From: Philippe Mathieu-Daudé
> >
> > Hi Aleksandar,
> >
> > On 11/13/19 2:47 PM, Aleksandar Markovic wrote:
> > > From: Aleksandar Markovic
> > >
> > > Change the maintainership for Fulong 2E board to im
n
On Tue, Dec 7, 2010 at 5:32 PM, Jin Guojie wrote:
> Signed-off-by: "Jin Guojie"
> Reviewed-by: "Gao Xiang"
> Reviewed-by: "Chen Huacai"
>
> A patch for Godson-3a CPU simulation.
> Godson-3a is a newly developed MIPS-III like, multicore CPU by
I think you'd better configure your smtp account and then use git
send-email .patch to send patchs.
In this way maintainer and other developers can easily review and
comment your patch.
Suggest you resend it.
On Wed, Dec 1, 2010 at 11:10 AM, Jin Guojie wrote:
> Aurelien,
> Attached is a patc
Yes, I think so.
On Fri, Oct 29, 2010 at 4:16 PM, Michael S. Tsirkin wrote:
> On Thu, Oct 28, 2010 at 04:31:33PM +0800, chen huacai wrote:
>> Please see bonito64_pcibios_config_access() in
>> arch/mips/pci/ops-bonito64.c of Linux kernel code.
>> You will find something usef
Please see bonito64_pcibios_config_access() in
arch/mips/pci/ops-bonito64.c of Linux kernel code.
You will find something useful.
On Thu, Oct 28, 2010 at 12:54 PM, Michael S. Tsirkin wrote:
> On Thu, Oct 28, 2010 at 08:57:01AM +0800, chen huacai wrote:
>> Because the code in PMON
Because the code in PMON and Linux kernel use these bits to verify r/w
operations. If one of them is 1 after r/w, PMON and Linux will
consider r/w has failed.
I guess that software will not set them to 1, because it is set by
hardware when operation fails.
On Thu, Oct 28, 2010 at 12:12 AM, Michael
PCI_DEVFN() clean up parts is OK for me.
On Tue, Jul 27, 2010 at 10:18 AM, Isaku Yamahata wrote:
> Oh yes, I fixed it. I was lost during switching branches.
> Chen, can you please take care of PCI_DEVFN() clean up part?
>
>
> On Tue, Jul 27, 2010 at 09:10:02AM +0800, chen huacai
Hmm, I know. But, why qemu only crashes on user-space code, not on kernel code?
On Fri, Jul 16, 2010 at 8:27 PM, Aurelien Jarno wrote:
> chen huacai a écrit :
>> Thank you for your information.
>> I'am a little confusing, cacheflush syscall you mentioned is in guest
>
rno wrote:
> On Thu, Jul 15, 2010 at 10:35:46PM +0800, chen huacai wrote:
>> Hi, Aurelien,
>> Can qemu emulate mips target on mips host currently? When I
>> emulate a malta (or fuloong) machine on my fuloong box, qemu crashes
>> after booting kernel, before th
Hi, Aurelien,
Can qemu emulate mips target on mips host currently? When I
emulate a malta (or fuloong) machine on my fuloong box, qemu crashes
after booting kernel, before the init process. Crash messages may be
"illegal instruction", "segment fault" or "bus error". On x86 hosts
everything is O
onitor?
On Fri, Jul 2, 2010 at 6:13 PM, Isaku Yamahata wrote:
> On Fri, Jul 02, 2010 at 03:44:05PM +0800, chen huacai wrote:
>> Maybe I made some mistakes, or maybe PMON has bugs. :)
>>
>> Please see the PMON code online at
>> http://www.loongson.cn/svn/pmon-loongson/t
Maybe this is what you want, please look at Page 10.
http://people.openrays.org/~comcat/godson/doc/godson2e.north.bridge.manual.pdf
But it is written in Chinese, I'm sorry that I also don't have an
English version.
On Wed, Jun 30, 2010 at 9:38 PM, Isaku Yamahata wrote:
> Can you elaborate on how
Changes from V5:
Clean up old style save/restore code
Changes from V4:
Doesn't include the PMON binary to avoid license issues.
--
Huacai Chen
Loongson-specific instructions haven't implememted now. So, if want to
boot a linux kernel, we should built a 32bit one and drop
-march=loongson2e compiler flags. For simplification, please use the
kernel patch (for 2.6.33) in the attachment and then use
arch/mips/configs/fuloong2e_defconfig to com
Changes from v2:
1, split the code of CPU definition and machine construction
2, remove useless memory r/w functions
3, add source of pmon
4, code style and other errors have been fixed
Changes from v1:
1, fulong support is limited to mips64el only (doesn't affect mips,
mips64 and mipsel)
2, qdev
On Sat, May 29, 2010 at 4:56 AM, Aurelien Jarno wrote:
> Please find my comments below.
>
> On Wed, May 19, 2010 at 10:28:36PM +0800, Huacai Chen wrote:
>> Signed-off-by: Huacai Chen
>> ---
>> Makefile.target | 2 +-
>> hw/mips_fulong2e.c | 421
>>
On Sat, May 29, 2010 at 4:31 AM, Aurelien Jarno wrote:
> Please find my comments below. Note that I don't feel very comfortable
> with PCI code, so a review from someone know this part of QEMU would be
> nice.
>
> On Wed, May 19, 2010 at 10:26:32PM +0800, Huacai Chen wrote:
>> Signed-off-by: Huaca
Change from v1:
1, fulong support is limited to mips64el only (doesn't affect mips,
mips64 and mipsel)
2, qdev model is used for Bonito north bridge
3, code style and other errors have been fixed
This series of patches are for qemu master branch. They make qemu
initially support fulong (Loongson-2
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/mips_fulong2e.c | 420 ++
target-mips/translate_init.c | 35
3 files changed, 456 insertions(+), 1 deletions(-)
create mode 100644 hw/mips_fulong2e.c
diff --git a/
Signed-off-by: Huacai Chen
---
hw/usb-uhci.c | 30 ++
hw/usb-uhci.h |1 +
2 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..5fd5388 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1152,6 +1152,26 @@ st
Signed-off-by: Huacai Chen
---
Makefile.target |2 +-
hw/pc.h |7 +
hw/pci_ids.h|8 +
hw/vt82c686.c | 786 +++
4 files changed, 802 insertions(+), 1 deletions(-)
create mode 100644 hw/vt82c686.c
diff --git a/Makefile
Signed-off-by: Huacai Chen
---
Makefile.objs|1 +
default-configs/mips64el-softmmu.mak |1 +
hw/ide.h |1 +
hw/ide/via.c | 185 ++
4 files changed, 188 insertions(+), 0 deletio
Signed-off-by: Huacai Chen
---
Makefile.target |1 +
default-configs/mips64el-softmmu.mak |1 +
hw/bonito.c | 950 ++
hw/mips.h|3 +
4 files changed, 955 insertions(+), 0 deletio
6/6] MIPS: add PMON (binary file) used by fulong mini pc
In this version, fulong is limited to mips64el only (doesn't affect
mips, mips64 and mipsel); qdev model is used for Bonito north bridge,
code style and other errors have been fixed.
Signed-off-by: Huacai Chen
--
Huacai Chen
On Wed, May 12, 2010 at 3:52 AM, Blue Swirl wrote:
> On 5/11/10, chen huacai wrote:
>> >> + s->pci = qemu_mallocz(sizeof(*s->pci));
>> >> + assert(s->pci != NULL);
>> >> + bonito_state = s;
>> >> +
>> &g
>> + pci_register_bar((PCIDevice *)d, 4, 0x10,
>> + PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
>> +
>> + vmstate_register(0, &vmstate_ide_pci, d);
>
> Is this correct?
>
I think so, since ide/piix.c and ide/cmd646.c both do in this way.
--
Huacai Chen
On Tue, May 11, 2010 at 3:28 AM, Blue Swirl wrote:
> On 5/9/10, chen huacai wrote:
>> This patch add initial support of vt82686b south bridge used by fulong mini
>> pc
>>
>> Signed-off-by: Huacai Chen
>> -
>> diff --git a/Makefile.target b/Mak
>> + s->pci = qemu_mallocz(sizeof(*s->pci));
>> + assert(s->pci != NULL);
>> + bonito_state = s;
>> +
>> + /* get the north bridge pci bus */
>> + s->pci->bus = pci_register_bus(NULL, "pci", pci_bonito_set_irq,
>> + pci_bonito_map_irq, pic, 0x
>> --- a/hw/mips.h
>> +++ b/hw/mips.h
>> @@ -5,6 +5,9 @@
>> /* gt64xxx.c */
>> PCIBus *pci_gt64120_init(qemu_irq *pic);
>>
>> +/* bonito.c */
>> +PCIBus *bonito_init_2e(qemu_irq pic);
>> +
>> /* ds1225y.c */
>> void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
>> void ds12
>> obj-mips-y += mips_addr.o mips_timer.o mips_int.o
>> obj-mips-y += dma.o vga.o i8259.o
>> obj-mips-y += g364fb.o jazz_led.o
>> -obj-mips-y += gt64xxx.o pckbd.o mc146818rtc.o
>> +obj-mips-y += gt64xxx.o bonito.o pckbd.o mc146818rtc.o
>>
>
> Is fulong 64 bit only?
>
> Maybe it would be better t
This patch add initial support of fulong mini pc (CPU definition,
machine construction, etc.)
Signed-off-by: Huacai Chen
-
diff --git a/Makefile.target b/Makefile.target
index 08968d6..2cad614 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -214,7 +214,7 @@ obj-ppc-y += ppce500_mpc8544d
This patch add Initial support of VIA USB controller used by fulong mini pc
Signed-off-by: Huacai Chen
-
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 624d55b..5fd5388 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1152,6 +1152,26 @@ static int usb_uhci_piix4_initfn(PCIDevice *dev)
This patch add initial support of VIA IDE controller used by fulong mini pc
Signed-off-by: Huacai Chen
-
diff --git a/Makefile.objs b/Makefile.objs
index ecdd53e..75be9ce 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -195,6 +195,7 @@ hw-obj-$(CONFIG_IDE_ISA) += ide/isa.o
hw-obj-$(CONFIG_
This patch add initial support of vt82686b south bridge used by fulong mini pc
Signed-off-by: Huacai Chen
-
diff --git a/Makefile.target b/Makefile.target
index fc4c59f..08968d6 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -219,7 +219,7 @@ obj-mips-y += mips_addr.o mips_timer.o mips_
This patch add initial support of bonito north bridge used by fulong mini pc
Signed-off-by: Huacai Chen
-
diff --git a/Makefile.target b/Makefile.target
index c092900..fc4c59f 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -218,7 +218,7 @@ obj-mips-y = mips_r4k.o mips_jazz.o mips_malta
mini pc
3, Initial support of VIA IDE controller used by fulong mini pc
4, Initial support of VIA USB controller used by fulong mini pc
5, Initial support of fulong mini pc (CPU definition, machine
construction, etc.)
6, PMON(binary file) used by fulong mini pc
Signed-off-by: Huacai Chen
--
Huacai Chen
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