Hello Peter, have you had a chance to look at this?
On Mon, Mar 28, 2016 at 3:15 PM, Aurelio Remonda
wrote:
>>> #define NUM_IRQ_LINES 64
>>> +#define LM3S811EVB_DEFAULT_DC0 0x1f00 /* Default value for dc0
>>> sram_size half */
>>> +#define LM3S6965E
Ok, but I explained my decisions on a the mail dated 03/28, responding
on your mail dated 03/23 maybe you missed that mail.
Thanks!
like gdb step or stepi.
Just to make it clear: I know qemu supports debugging with gdb with
target remote localhost:1234, my question aims to control the
execution with QEMU/monitor.
Thanks!
--
Aurelio Remonda
Taller Technologies Argentina
Software Engineer
San Lorenzo 47, 3rd Floor, Off
sier to see ff00 rather than
65280, or 1f00 instead of 7936.
These values are fixed as default values to match the dc0 default
value on each board.
In the case of LM3S811EVB the value is aligned up and you get a ram
size of 8192 but your
dc0 will still be 0x001f001f.
In the other board LM3S6965EV
ions.
I tested this on the LM3S6965evb doing a full system emulation.
I couldn't try this on the LM3S811EVB since I am using RTEMS and it does
not support that board.
Signed-off-by: Aurelio Remonda
---
hw/arm/stellaris.c | 38 +++---
1 file changed,
ions.
I tested this on the LM3S6965evb doing a full system emulation.
I couldn't try this on the LM3S811EVB since I am using RTEMS and it does
not support that board.
Signed-off-by: Aurelio Remonda
---
hw/arm/stellaris.c | 38 +++---
1 file changed,
ated
based on dc0.
Again the problem of this es that you will never get the manual
default dc0 value even if
you run the program without the -m flag.
Thanks
On Wed, Mar 9, 2016 at 10:54 PM, Peter Maydell wrote:
> On 10 March 2016 at 07:23, Aurelio Remonda
> wrote:
>>
>> El
El 9 mar. 2016 8:25 PM, "Peter Maydell" escribió:
>
> On 10 March 2016 at 03:56, Aurelio Remonda
> wrote:
> >
> >
> > On Mon, Mar 7, 2016 at 8:37 PM, Peter Maydell
> > wrote:
> >>
> >> On 8 March 2016 at 02:58, Aurelio Remonda
> &g
On Mon, Mar 7, 2016 at 8:37 PM, Peter Maydell
wrote:
>
> On 8 March 2016 at 02:58, Aurelio Remonda
> wrote:
> > Hello, sorry for taking so long, I am working on this again.
> > About your last response, I was looking at the struct
stellaris_board_info
> > ,which contai
On Thu, Feb 11, 2016 at 10:01 AM, Peter Maydell
wrote:
> On 11 February 2016 at 12:46, Aurelio Remonda
> wrote:
> > On Fri, Feb 5, 2016 at 2:00 PM, Peter Maydell
> wrote:
> >> The right way to do this is to set the MachineClass default_ram_size
> >> to what
On Fri, Feb 5, 2016 at 2:00 PM, Peter Maydell wrote:
> On 5 February 2016 at 16:55, Aurelio Remonda
> wrote:
>> Im making something like this:
>>
>> if (ram_size == 0x800) /* default value, means whitout -m flag */
>>{
>> sram
El 5 feb. 2016 1:24 PM, "Peter Maydell" escribió:
> On 5 February 2016 at 16:09, Aurelio Remonda
> wrote:
> > Hello, im working on this feature right now.
> > i have a working patch but maybe I can make some changes to make it look
> better:
> > for exampl
set_memory_options function)
i can use it instead of hardcoded 0x800.
Thanks!
On Wed, Feb 3, 2016 at 10:45 AM, Aurelio Remonda
wrote:
> On Wed, Feb 3, 2016 at 10:34 AM, Peter Maydell
> wrote:
>> On 3 February 2016 at 13:00, Aurelio Remonda
>> wrote:
>>> Hello, i was trying to u
On Wed, Feb 3, 2016 at 10:34 AM, Peter Maydell wrote:
> On 3 February 2016 at 13:00, Aurelio Remonda
> wrote:
>> Hello, i was trying to understand how does the sram and flash size
>> works on lm3s6965evb, i found a hardcoded 0x00ff007f as dc0 value and
>> how flas
ting the same
sram_size and flash_size values (the ones calculated with 0x00ff007f)
Thank you!!
--
Aurelio Remonda
Software Engineer
San Lorenzo 47, 3rd Floor, Office 5
Córdoba, Argentina
Phone: +54-351-4217888 / 4218211
Thank you!
2015-06-16 11:20 GMT-03:00 Peter Maydell :
> On 16 June 2015 at 14:37, Aurelio C. Remonda wrote:
>> This patch adds the Cortex-M4 CPU. The M4 is basically the
>> same as the M3, the main differences being the DSP instructions and an
>> optional FPU. Created an ARM_FEATURE_THUMB_DSP to
about the space between ARMCPU *cpu = ARM_CPU(obj); line and the first
set_feature, the cortex-m3 initfn does not have it, do you want me to
change that one too? Thanks
2015-06-16 9:29 GMT-03:00 Liviu Ionescu :
>
>> On 16 Jun 2015, at 14:21, Peter Maydell wrote:
>>
>>
>> ... I think we can
>> get
Thank you! Im working on it
El 16/6/2015 8:21, "Peter Maydell" escribió:
> On 15 June 2015 at 21:31, Aurelio C. Remonda
> wrote:
> > This patch adds the Cortex-M4 CPU. The M4 is basically the same as the
> M3,
> > the main differences being the DSP instructions and an optional FPU.
>
> OK, I've
>> if (op < 4) {
>> /* Saturating add/subtract. */
>> +if (!(arm_dc_feature(s, ARM_FEATURE_THUMB_DSP))){
>> +/* qsub, qadd, qdadd, qdsub are DSP instructions. */
>> +goto illegal_op;
>> +}
>>
2015-05-28 18:22 GMT-03:00 Liviu Ionescu :
> > On 29 May 2015, at 00:09, Aurelio C. Remonda
> > wrote:
> > The optional FPU in the M4 could be added in the future as a "Cortex-M4F"
> > CPU.
>
> in my implementation I had a single name ("cortex-m4") and some flags, but a
> separate name is proba
gt; On 26 May 2015 at 18:13, aurelio remonda wrote:
> > There are 85 instructions labeled as DSP (all of them thumb2), im just
> > testing on disas_thumb2_insn if the feature is enabled before the
> > instruction is generated.i.e.
> > if (!arm_dc_feature(s, ARM_F
Manual
(there's s table of dsp instructions on page 33) and this
http://www.lpcware.com/system/files/1100969_Cortex-Inst.jpg as reference.
2015-05-26 12:36 GMT-03:00 Peter Maydell :
> On 26 May 2015 at 16:29, aurelio remonda wrote:
> > Im working on the ARM_FEATURE_DSP. I could use so
Im working on the ARM_FEATURE_DSP. I could use some help to add it to the
other CPUs that use it, maybe if someone can
provide me with a list of them i could add the feature.
Im using lm3s6965evb stellaris board, trying to make it "work as an M4", i
would like to separate them, adding an dsp feature (i.e ARM_FEATURE_DSP)
could work? the problem is if this feature is added it has to be set on all
the cpus that use dsp instructions.
A profile cores, but not
> for M ones. Is this a bug or im missing something?
If our cortex-m3 model doesn't fault on an instruction that's not
implemented in the M3 then that's a bug, yes. If you provide more
detail we can fix it.
2015-05-05 9:52 GMT-03:00 aurelio remonda :
&
Hi, i would like to to add support for cortex-m4 on qemu. Most features of
the Cortex-M3 and M4 are the same with the significant difference that
Cortex-M4 has DSP extensions and optional FPU. Even so, i really need some
pointers for this (im a newbie on qemu devel). I found out that qemu can
manag
26 matches
Mail list logo
