?
}
}
I got two questions here. The first question is am I doing correct? If I am
right, how do I know how many pages get dirtied so that I can print this
number?
Many thanks for your patience and time.
--
Regards,
Wang Cheng
Do you have plan to multi-thread?
2007/4/28, Paul Brook <[EMAIL PROTECTED]>:
On Friday 27 April 2007, Jonathan Kalbfeld wrote:
> Suppose I run QEMU on a T1000 with an 8-way CPU and I tell it to
simulate
> 8x SMP. WIll it spawn a separate thread for each dynamic translation
> activity?
No. qem
scsi.tex patch reduces unnecessary mismatch.
lsi.txt corrects mismatch condition.
When the mismatch happens, register ia saves the instruction address.
However, QEMU call lsi_bad_phase first, update new dsp and
then save it into register ia.
The patch correct this problem.
Another fix is in the t
The previous patch is not correct as Paul Brook said.
I read the standard and know the allocation length.
And then, I find the number of length is not correct.
Please review the new patch.
Index: hw/scsi-disk.c
===
RCS file: /sources/
ition.
2007/4/22, Paul Brook <[EMAIL PROTECTED]>:
On Sunday 22 April 2007 03:01, Wang Cheng Yeh wrote:
> The number of responded bytes from scsi device do not match the expected
> value of lsi53c895a driver. hence, the mismatch interrupt happen, but
the
> driver does not always handle
I am sorry. The new attached file is created by (cvs diff -up).
2007/4/22, Hetz Ben Hamo <[EMAIL PROTECTED]>:
The "standard" way to submitting patches is unified diff's (diff -u)
Could you re-post your patch in unified format please?
Thanks,
Hetz
On 4/22/07, Wa
just some typo, but without hurt.
Index: hw/lsi53c895a.c
===
RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v
retrieving revision 1.7
diff -u -p -r1.7 lsi53c895a.c
--- hw/lsi53c895a.c 17 Apr 2007 23:53:10 - 1.7
+++ hw/lsi53
The number of responded bytes from scsi device do not match the expected
value of lsi53c895a driver.
hence, the mismatch interrupt happen, but the driver does not always handle
it correctly.
My patch make the responded bytes as expected and the interrupt will not
happen.
Index: hw/scsi-disk.c
===
Index: hw/lsi53c895a.c
===
RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v
retrieving revision 1.6
diff -u -p -r1.6 lsi53c895a.c
--- hw/lsi53c895a.c 7 Apr 2007 18:14:41 - 1.6
+++ hw/lsi53c895a.c 17 Apr 2007 02:12:05 -
Index: hw/pl190.c
===
RCS file: /sources/qemu/qemu/hw/pl190.c,v
retrieving revision 1.2
diff -u -p -r1.2 pl190.c
--- hw/pl190.c 7 Apr 2007 18:14:41 - 1.2
+++ hw/pl190.c 8 Apr 2007 13:53:18 -
@@ -240,7 +240,7 @@ qemu_ir
BTW, I have a small PREP test image that I can publish.
I am planning since some time to add to the QEMU web site an automatic
regression testing system which will automatically launch many OSes with
the current CVS version. I had no time to do it recently, but if no one
does it before I'll try
thanks
Index: hw/lsi53c895a.c
===
RCS file: /sources/qemu/qemu/hw/lsi53c895a.c,v
retrieving revision 1.4
diff -r1.4 lsi53c895a.c
1048a1049
> s->carry = op1;
Index: hw/smc91c111.c
===
address mapping error and cause arm versatile unstable.
Index: hw/smc91c111.c
===
RCS file: /sources/qemu/qemu/hw/smc91c111.c,v
retrieving revision 1.5
diff -u -r1.5 smc91c111.c
--- hw/smc91c111.c 21 Dec 2006 17:23:49 -
because
(1) address of SCRATCHA is 0x34
(2) address from SCRATCHB to SCRATCHR are 0x5c ~ 0x9f
you just see the code about part (2).
I think the access code is right.
2007/3/19, Thiemo Seufer <[EMAIL PROTECTED]>:
? wrote:
> --- ../../tmp/qemu-0.9.0/hw/lsi53c895a.c2007-02-06 07:0
thanks
diff
Description: Binary data
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