Hi Richard,
On Wed, May 7, 2025 at 11:04 PM Richard Henderson
wrote:
>
> On 5/7/25 02:14, WANG Rui wrote:
> > This patch fixes incorrect results for `[xv]fnm{add,sub}.{s,d}`
> > instructions when rounding toward {zero, positive, negative}.
> >
> > According to t
: mengqinggang
Signed-off-by: WANG Rui
---
v1 -> v2:
- Introduce `float_muladd_negate_rounded_result`
---
fpu/softfloat.c | 42 ---
include/fpu/softfloat.h | 3 +-
.../tcg/insn_trans/trans_farith.c.inc | 10 +++--
tar
On Wed, May 7, 2025 at 2:28 AM Richard Henderson
wrote:
>
> On 5/6/25 10:50, Richard Henderson wrote:
> >> +*(uint64_t *)&x = 0x4ff0UL;
> >> +*(uint64_t *)&y = 0x4ff0UL;
> >
> > 0x1.0p256
> >
> >> +*(uint64_t *)&z = 0x2ff0UL;
> >
> > 0x1.0p-256
>
Hi Richard,
On Wed, May 7, 2025 at 1:50 AM Richard Henderson
wrote:
>
> On 5/6/25 08:26, WANG Rui wrote:
> > This patch fixes incorrect results for [xv]fnm{add,sub}.{s,d}
> > instructions when rounding toward zero, postive, negative.
> >
> > According to the Loon
intermediate result.
Reported-by: mengqinggang
Signed-off-by: WANG Rui
---
target/loongarch/tcg/fpu_helper.c | 8
target/loongarch/tcg/vec_helper.c | 7 ++-
tests/tcg/loongarch64/Makefile.target | 2 ++
tests/tcg/loongarch64/test_fnmsub.c | 20
tests
On Thu, Apr 24, 2025 at 12:11 PM bibo mao wrote:
>
>
>
> On 2025/4/24 上午10:59, WANG Rui wrote:
> > Hi Bibo,
> >
> > On Thu, Apr 24, 2025 at 10:32 AM bibo mao wrote:
> >>
> >>
> >>
> >> On 2025/4/24 上午10:11, WANG Rui wrote:
> &g
Hi Bibo,
On Thu, Apr 24, 2025 at 10:32 AM bibo mao wrote:
>
>
>
> On 2025/4/24 上午10:11, WANG Rui wrote:
> > Hi Song,
> >
> > On Thu, Apr 24, 2025 at 9:40 AM gaosong wrote:
> >>
> >> 在 2025/4/18 下午4:45, bibo mao 写道:
> >>>
> &
Hi Song,
On Thu, Apr 24, 2025 at 9:40 AM gaosong wrote:
>
> 在 2025/4/18 下午4:45, bibo mao 写道:
> >
> >
> > On 2025/4/18 下午4:21, WANG Rui wrote:
> >> This patch replaces uses of the generic TRANS macro with TRANS64 for
> >> instructions that are o
This patch replaces uses of the generic TRANS macro with TRANS64 for
instructions that are only valid when 64-bit support is available.
This improves correctness and avoids potential assertion failures or
undefined behavior during translation on 32-bit-only configurations.
Signed-off-by: WANG
CRC feature flag.
All CRC-related instruction translations are updated to be gated by
the new CRC feature flag instead of hardcoded CPU features.
This ensures correctness and configurability when enabling CRC
instructions based on hardware capabilities.
Signed-off-by: WANG Rui
---
target
available when the floating-point
unit is present.
This improves correctness for CPUs lacking floating-point support.
Signed-off-by: WANG Rui
---
target/loongarch/tcg/insn_trans/trans_branch.c.inc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/loongarch/tcg/insn_trans
Hi Bibo,
On Fri, Apr 18, 2025 at 2:08 PM bibo mao wrote:
>
> Rui,
>
> Thanks for the patch.
> Overall it looks good to me.
>
> Could you split it into three small patches? such as crc/64/fp specified
> small patches.
Thank you for your feedback! I appreciate your suggestion. I'll gladly
split th
This series refines feature gating for LoongArch instruction translation
in TCG to improve correctness and configurability.
v4:
- Split into smaller patches for clarity and easier review.
WANG Rui (3):
target/loongarch: Add CRC feature flag and use it to gate CRC
instructions
target
Previously, some instructions could be executed regardless of CPU mode or
feature support. This patch enforces proper checks so that instructions are
only allowed when the required CPU features are enabled.
Signed-off-by: WANG Rui
---
target/loongarch/cpu.c| 4
Hi,
On Tue, Apr 15, 2025 at 8:25 PM Philippe Mathieu-Daudé
wrote:
>
> Hi,
>
> On 15/4/25 14:06, WANG Rui wrote:
> > Previously, some instructions could be executed regardless of CPU mode or
> > feature support. This patch enforces proper checks so that instructions are
&
Previously, some instructions could be executed regardless of CPU mode or
feature support. This patch enforces proper checks so that instructions are
only allowed when the required CPU features are enabled.
Signed-off-by: WANG Rui
---
target/loongarch/cpu.c| 4
Previously, some instructions could be executed regardless of CPU mode or
feature support. This patch enforces proper checks so that instructions are
only allowed when the required CPU features are enabled.
Signed-off-by: WANG Rui
---
target/loongarch/cpu.c| 2
correctness for programs that rely on BRK to signal
overflow or divide-by-zero conditions.
Signed-off-by: WANG Rui
---
linux-user/loongarch64/cpu_loop.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/linux-user/loongarch64/cpu_loop.c
b/linux-user/loongarch64
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