On Tue, 8 Nov 2011, Arnaldo Carvalho de Melo wrote:
> Em Tue, Nov 08, 2011 at 01:07:55PM +0100, Ingo Molnar escreveu:
> > * Vince Weaver wrote:
> > > as mentioned before I have my own perf_event test suite with 20+ tests.
> > > http://web.eecs.utk.edu/~vw
On Mon, 7 Nov 2011, Ingo Molnar wrote:
> I think we needed to do only one revert along the way in the past two
> years, to fix an unintended ABI breakage in PowerTop. Considering the
> total complexity of the perf ABI our compatibility track record is
> *very* good.
There have been more breakag
On Mon, 7 Nov 2011, Pekka Enberg wrote:
> I've never heard ABI incompatibility used as an argument for perf. Ingo?
Never overtly. They're too clever for that.
In any case, as a primary developer of a library (PAPI) that uses the
perf_events ABI I have to say that having perf in the kernel has
On Sat, 6 Nov 2010, Stefan Hajnoczi wrote:
> On Thu, Nov 4, 2010 at 7:20 PM, Vince Weaver wrote:
> > This is mostly a proof of concept, I'm not sure if anyone is interested in
> > this. It could in theory be useful for tracking down performance problems
> > from is
Hello
The following patch enables simulated perf event support inside of Qemu
for x86_64 systems. It enables support for the AMD performance MSRs enough
to return values for the "retired_instructions" (both user and kernel) and
"cpu_clk_unhalted" events.
This is mostly a proof of concept, I'm
Hello
have you tried older versions of qemu, in an attempt to see if this is a
recent problem?
As of about a year ago I had qemu-sparc32plus running most of SPEC2006
properly, validated against hardware perf counters.
gcc definitely worked. I had issues with calculix, dealII, soplex, wrf,
ze
s re-executed
the calls happen again, as they are part of the TB instruction stream.
> Did you get correct values for your counters in bbvs[bb] ?
yes. And the resuts match valgrind, pin, and hardware performance
counters.
Vince
____
De: Vince Weaver
Para: Boris C
> I think the correct way to get the full instruction trace on a MIPS
> emulated processor is:
the way you describe is slow because you are constantly re-generating the
TBs. The best way to do this is to add your instrumentation to the TBs.
I have code that does that for a recent version of Q
On Sun, 7 Feb 2010, Richard Henderson wrote:
>
> I imagine that QEMU's VDSO would not have the complicated bits that the
> kernel's version does, where it arranges to read the clock without going into
> kernel space. I imagine QEMU would simply stuff a normal syscall sequence in
> there, which wo
at fixes things for me, although it might not be the cleanest
fix.
This issue keeps sixtrack and fma3d spec2k benchmarks from running.
Vince
Signed-off-by: Vince Weaver
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 1acf1f5..f2dd39e 100644
--- a/linux-user/syscall.c
+++ b/linux
On Mon, 14 Dec 2009, Richard Henderson wrote:
> On 12/14/2009 04:31 PM, Richard Henderson wrote:
>
> Hmph. One more patch for correctness. With this 183.equake runs correctly.
I just finished running all of spec2k Alpha through Qemu.
With these patches installed (the 4 fpu ones, and the 5 fro
On Mon, 14 Dec 2009, Richard Henderson wrote:
> On 12/14/2009 04:31 PM, Richard Henderson wrote:
>
> Hmph. One more patch for correctness. With this 183.equake runs correctly.
> I couldn't remember all the hoops to get runspec.pl to work, to do the whole
> testsuite, but I did run this one by h
Hello
The 0.9.1 release segfaults on certain benchmarks under linux-user
emulation (x86 on x86).
Specifically "facerec" from the SPEC2000 benchmarks, and over half of the
SPEC2006 benchmarks.
I tracked this down to a problem in the mmap() code in linux-user.
I've attached a patch that reverts b
> I think this patch is needed for proper implementation of
> the sh4 mov.b @(disp,Rm),R0 instruction.
and of course, I managed to send a reversed patch. That will teach me to
send out things like that late at night. Here's the proper patch.
Vince
--- ./qemu-snapshot-2007-08-14_05/target-sh4/
Hello
I think this patch is needed for proper implementation of
the sh4 mov.b @(disp,Rm),R0 instruction.
Vince
--- ./qemu-snapshot-2007-08-14_05/target-sh4/translate.c2007-08-24
01:48:47.0 -0400
+++ ./qemu-snapshot-2007-08-14_05/target-sh4/translate.c.orig 2007-08-24
01:37:56.
race is proving to
be a bit harder.
Thanks for any help,
Vince Weaver
[EMAIL PROTECTED]
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
16 matches
Mail list logo
