[PATCH 1/2] aspeed: Fix maximum number of spi controller

Commit 6de4aa8dc544 ("hw/arm/aspeed_ast27x0: Add SoC Support for AST2700 A1") extends ast2700a1 spis_num to 3, but ASPEED_SPIS_NUM defines the maximum number of spi controller to 2, result in ehci[0] is being overwritten in runtime. Signed-off-by: Troy Lee --- include/hw/arm/aspeed_soc.h | 2 +-

[PATCH 2/2] hw/arm: ast27x0: Wire up EHCI controllers

AST27x0 has 4 EHCI controllers, where each CPU and I/O die has 2 instances. This patch use existing TYPE_PLATFORM_EHCI. After wiring up the EHCI controller, the ast2700a1-evb can find up to 4 USB EHCI interfaces. ehci-platform 12061000.usb: EHCI Host Controller ehci-platform 12061000.usb: new USB