Re: [PATCH] hw/intc/arm_gicv3: Fix GICv3 redistributor security checking

2021-07-17 Thread Tianrui Wei
On Wed, 14 Jul 2021 at 20:46, Tianrui Wei wrote: > > > > For redistributor to send sgi, we must test NSACR bits in secure mode. > > However, current implementation inverts the security check, wrongly > > skipping this it when the CPU is in secure state, and only carrying out

[PATCH] hw/intc/arm_gicv3: Fix GICv3 redistributor security checking

2021-07-14 Thread Tianrui Wei
. Chapter 12, page 530, when there is only one security state implemented, GICD.CTLR.DS is always 0, thus checking NSACR in non-secure state. When cpu is in secure state, ns = 0, thus the NSACR check is never performed. Signed-off-by: Tianrui Wei Signed-off-by: Jonathan Balkind Tested-by: Tianrui Wei