efore, the comparator register of the HPET timer has correct value. As
a result, the HPET timer generates interruptions at the correct time.
Signed-off-by: TaiseiIto
---
system/memory.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/system/memory.c b/system/memory.c
index 5e6eb
This is a ping for the patch below.
https://lore.kernel.org/qemu-devel/ty0pr0101mb42850337f8917d1f514107fba4...@ty0pr0101mb4285.apcprd01.prod.exchangelabs.com/
alue register. Second, disabled HPET timers never
cause any interrupt. Third, enabled HPET timers cause interrupts correctly
even if an HPET driver writes 0x to its comparator value
register.
Signed-off-by: TaiseiIto
---
Changes in v2:
- Reflect writings to higher 32 bits of a
16b29ae1807b024bd5052301550f5d47dae958a2 but this redirection caused wrong
interruptions. So I deleted the redirection. Finally, I confirmed there is
no problem on 'make check' results and that interruptions from i8254 and
interruptions from HPET are correclty sent to IRQ0 and IRQ2 respectively.
Signed-off-by: TaiseiIto
--
rrupt. Third, enabled HPET timers cause
interrupts correctly even if an HPET driver writes 0x to its
comparator value register.
Signed-off-by: TaiseiIto
---
hw/timer/hpet.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index
QEMU reads registers to make
a 'g' packet, QEMU specifies FPU stack registers by the relative index.
Then, the registers are ordered correctly in the packet. As a result, GDB,
the packet receiver, can print FPU stack registers in the correct order.
Signed-off-by: TaiseiIto
---
target/i3
QEMU reads registers to make
a 'g' packet, QEMU specifies FPU stack registers by the relative index.
Then, the registers are ordered correctly in the packet. As a result, GDB,
the packet receiver, can print FPU stack registers in the correct order.
Signed-off-by: TaiseiIto
---
target/i3
QEMU reads registers to make
a 'g' packet, QEMU specifies FPU stack registers by the relative index.
Then, the registers are ordered correctly in the packet. As a result, GDB,
the packet receiver, can print FPU stack registers in the correct order.
Signed-off-by: TaiseiIto
---
target/i3
QEMU reads registers to make
a 'g' packet, QEMU specifies FPU stack registers by the relative index.
Then, the registers are ordered correctly in the packet. As a result, GDB,
the packet receiver, can print FPU stack registers in the correct order.
Signed-off-by: TaiseiIto
---
target/i3
tly in the packet. As a result, GDB,
the packet receiver, can print FPU stack registers in the correct order.
Signed-off-by: TaiseiIto
---
target/i386/gdbstub.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index c3a2cf6
tly in the packet. As a result, GDB,
the packet receiver, can print FPU stack registers in the correct order.
Signed-off-by: TaiseiIto
---
target/i386/gdbstub.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index c3a2cf6
tly in the packet. As a result, GDB,
the packet receiver, can print FPU stack registers in the correct order.
Signed-off-by: TaiseiIto
---
target/i386/gdbstub.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index c3a2cf6
acket
has been shifted 4 bytes in GDB.
After this commit, GDB can read 'g' packets correctly.
Signed-off-by: TaiseiIto
---
gdb-xml/i386-32bit.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gdb-xml/i386-32bit.xml b/gdb-xml/i386-32bit.xml
index 872fcea9c2..7a66a
acket
has been shifted 4 bytes in GDB.
After this commit, GDB can read 'g' packets correctly.
Signed-off-by: TaiseiIto
---
gdb-xml/i386-32bit.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gdb-xml/i386-32bit.xml b/gdb-xml/i386-32bit.xml
index 872fcea9c2..7a66a
acket
has been shifted 4 bytes in GDB.
After this commit, GDB can read 'g' packets correctly.
Signed-off-by: TaiseiIto
---
gdb-xml/i386-32bit.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gdb-xml/i386-32bit.xml b/gdb-xml/i386-32bit.xml
index 872fcea9c2..7a66a
nd EFER in 'g' packet
has been shifted 4 bytes in GDB.
After this commit, GDB can read 'g' packets correctly.
Signed-off-by: TaiseiIto
---
gdb-xml/i386-32bit.xml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gdb-xml/i386-32bit.xml b/gdb-xml/i386-32bi
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