Signed-off by: Steffen Görtz
On 05.01.19 15:44, Stefan Hajnoczi wrote:
> From: Steffen Görtz
>
> Recent microbit firmwares panic if the TWI magnetometer/accelerometer
> devices are not detected during startup. We don't implement TWI (I2C)
> so let's stub out thes
Hi Thomas,
thank you for your remarks!
>> +int main(int argc, char **argv)
>> +{
>> +int ret;
>> +
>> +g_test_init(&argc, &argv, NULL);
>> +
>> +global_qtest = qtest_initf("-machine microbit");
>> +
>> +qtest_add_func("/microbit/nrf51/nvmc", test_nrf51_nvmc);
>> +
>> +ret = g_
Hi Peter,
thank you for your remarks!
>> +};
>> +
>> +static uint64_t ficr_read(void *opaque, hwaddr offset
>
>> +value &= ~(NRF51_PAGE_SIZE - 1);
>> +if (value < (s->flash_size - NRF51_PAGE_SIZE)) {
>> +memset(s->storage + value / 4, 0xFF, NRF51_PAGE_SIZE
Thank you Stefan and Peter for your thoughtful comments and all the time that
went into this patch series already.
I will send a revision of the patch series today or tomorrow.
Best,
Steffen
On 19.11.18 08:02, Stefan Hajnoczi wrote:
> On Mon, Nov 12, 2018 at 04:42:10PM -0500, Steffen Gö
This patch adds the model for the nRF51 timer peripheral.
Currently, only the TIMER mode is implemented.
Signed-off-by: Steffen Görtz
---
hw/timer/Makefile.objs | 1 +
hw/timer/nrf51_timer.c | 337 +
hw/timer/trace-events | 5
different output driver modes per level are
available (disconnected, standard, high-current).
The GPIO-Peripheral has a mechanism for detecting level changes which is
not featured in this model.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Peter Maydell
---
Makefile.objs
This stubs enables the microbit-micropython firmware to run
on the microbit machine.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw/arm/nrf51_soc.c | 27 +++
include/hw/arm/nrf51_soc.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/hw
Instantiates TIMER0 - TIMER2
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Peter Maydell
---
hw/arm/nrf51_soc.c | 27 +++
include/hw/arm/nrf51_soc.h | 4
2 files changed, 31 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm
Use RNG in SOC.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Peter Maydell
---
hw/arm/nrf51_soc.c | 16
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index
Basic tests for nRF51 Timer Peripheral.
Signed-off-by: Steffen Görtz
---
tests/microbit-test.c | 101 ++
1 file changed, 101 insertions(+)
diff --git a/tests/microbit-test.c b/tests/microbit-test.c
index e606221b58..f8731e7c00 100644
--- a/tests/microbit
, Firmware configuration.
Read and write access to the memories is managed by the
Non-volatile memory controller.
Memory schema:
[ CPU ] -+- [ NVM, either FICR, UICR or CODE ]
| |
\- [ NVMC ]
Signed-off-by: Steffen Görtz
---
hw/nvram/Makefile.objs | 1 +
hw/nvram
Adds a new qtest command "set_irq_in" which allows
to set qemu gpio lines to a given level.
Based on https://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02363.html
which never got merged.
Signed-off-by: Steffen Görtz
Originally-by: Matthew Ogilvie
Reviewed-by: Stefa
The test suite for the nRF51 GPIO peripheral for now
only tests initial state. Additionally a set of
tests testing an implementation detail of the model
are included.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
tests/microbit-test.c | 124
Instantiates GPIO peripheral model
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Peter Maydell
---
hw/arm/nrf51_soc.c | 16
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm
The microbit-test includes tests for the nRF51 NVMC
peripheral and will host future nRF51 peripheral tests
and board-level bbc:microbit tests.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
tests/Makefile.include | 2 +
tests/microbit-test.c | 133
sation
v2:
* Factored out common definitions to won header (Stefan)
* Add set_irq_in command to support tests for GPIO
* Add tests for GPIO
* Removed LED matrix from this patch set
* Small tidy ups on RNG, NVM, GPIO and Timer
Based-on: 20181025005052.27661-1-jus...@mail.ru
Steffen
Adds a header that provides definitions that are used
across nRF51 peripherals
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Peter Maydell
---
hw/arm/nrf51_soc.c | 33 ++
include/hw/arm/nrf51.h | 45
Add a model of the NRF51 random number generator peripheral.
This is a simple random generator that continuously generates
new random values after startup.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
Instantiates UICR, FICR, FLASH and NVMC in nRF51 SOC.
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 43 +++---
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 33 insertions(+), 12 deletions(-)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm
Instantiates TIMER0 - TIMER2
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw/arm/nrf51_soc.c | 27 +++
include/hw/arm/nrf51_soc.h | 4
2 files changed, 31 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 2c4e80892b
This patch adds the model for the nRF51 timer peripheral.
Currently, only the TIMER mode is implemented.
Signed-off-by: Steffen Görtz
---
hw/timer/Makefile.objs | 1 +
hw/timer/nrf51_timer.c | 368 +
hw/timer/trace-events | 5
Adds a header that provides definitions that are used
across nRF51 peripherals
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw/arm/nrf51_soc.c | 33 ++
include/hw/arm/nrf51.h | 45
include/hw/char
Instantiates GPIO peripheral model
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw/arm/nrf51_soc.c | 16
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index d11bb2b99f
The test suite for the nRF51 GPIO peripheral for now
only tests initial state. Additionally a set of
tests testing an implementation detail of the model
are included.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
tests/microbit-test.c | 137
Instantiates UICR, FICR and NVMC in nRF51 SOC.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw/arm/nrf51_soc.c | 37 ++---
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/hw/arm
different output driver modes per level are
available (disconnected, standard, high-current).
The GPIO-Peripheral has a mechanism for detecting level changes which is
not featured in this model.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
Makefile.objs| 1 +
hw
The microbit-test includes tests for the nRF51 NVMC
peripheral and will host future nRF51 peripheral tests
and board-level bbc:microbit tests.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
tests/Makefile.include | 2 +
tests/microbit-test.c | 117
This stubs enables the microbit-micropython firmware to run
on the microbit machine.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw/arm/nrf51_soc.c | 27 +++
include/hw/arm/nrf51_soc.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/hw
Adds a new qtest command "set_irq_in" which allows
to set qemu gpio lines to a given level.
Based on https://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02363.html
which never got merged.
Signed-off-by: Steffen Görtz
Originally-by: Matthew Ogilvie
Reviewed-by: Stefa
, Firmware configuration.
Read and write access to the memories is managed by the
Non-volatile memory controller.
Memory schema:
[ CPU ] -+- [ NVM, either FICR, UICR or CODE ]
| |
\- [ NVMC ]
Signed-off-by: Steffen Görtz
---
hw/nvram/Makefile.objs | 1 +
hw/nvram
Use RNG in SOC.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw/arm/nrf51_soc.c | 16
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 55f8eaafcb..d2a19b8ead 100644
--- a
s for GPIO
* Add tests for GPIO
* Removed LED matrix from this patch set
* Small tidy ups on RNG, NVM, GPIO and Timer
Based-on: 20181025005052.27661-1-jus...@mail.ru
Steffen Görtz (13):
qtest: Add set_irq_in command to set IRQ/GPIO level
arm: Add header to host common definition for
Add a model of the NRF51 random number generator peripheral.
This is a simple random generator that continuously generates
new random values after startup.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw
Hi Stefan,
>
> Does anything rearm a running timer after live migration?
fixed in upcoming version.
Steffen
Hi Peter,
>
>
>> +static void reflect_dir_bit_in_cnf(NRF51GPIOState *s)
>> +{
>> +uint32_t value = s->dir;
>> +for (size_t i = 0; i < NRF51_GPIO_PINS; i++) {
>
> Similarly here, and I think I saw another use somewhere else
> in this patchset too.
I have removed the c99 style declaratio
Hi Stefan,
>
> gcc (GCC) 8.2.1 20181011 doesn't know that extract32(..., 3) can only
> result in values [0, 7] so it warns that state can be uninitialized.
>
> It might be simplest to include a default case that returns false (with
> a comment).
>
thank you for your remarks. Will be in the next v
Hi Stefan,
>
> Indentation is off here. One way of formatting it:
>
> address_space_write(&s->as, i * NRF51_PAGE_SIZE,
> MEMTXATTRS_UNSPECIFIED, s->empty_page,
> NRF51_PAGE_SIZE);
Good catch.
>> +static void
Hi Stefan,
> I'm a fan of '-' instead of '_' in qdev property names. There are more
> instances of '-' than '_', but it's up to you.
Agree. Changed.
Best,
Steffen
Hi Stefan,
>
> Indentation is off here. One way of formatting it:
>
> address_space_write(&s->as, i * NRF51_PAGE_SIZE,
> MEMTXATTRS_UNSPECIFIED, s->empty_page,
> NRF51_PAGE_SIZE);
Good catch.
>> +static void
Hi Julia,
> Why do we need an extra file for this? nrf51_soc.h seemed like a good fit.
nrf51_soc.h is not included in the peripheral devices. It would be possible to
put the definitions into nrf51_soc.h but i just did not want to mix up the
dependency directions.
> What's the purpose of renam
Hi Laurent,
thank you for your remarks! I have fixed the documentation (also added some
explanation for the fields) and switched to int/qemu_strtoi with base=0.
Steffen
Instantiates TIMER0 - TIMER2
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 27 +++
include/hw/arm/nrf51_soc.h | 4
2 files changed, 31 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 695b335dc5..c29b80c0ca 100644
--- a/hw
This patch adds the model for the nRF51 timer peripheral.
Currently, only the TIMER mode is implemented.
Signed-off-by: Steffen Görtz
---
hw/timer/Makefile.objs | 1 +
hw/timer/nrf51_timer.c | 358 +
hw/timer/trace-events | 5
The test suite for the nRF51 GPIO peripheral for now
only tests initial state. Additionally a set of
tests testing an implementation detail of the model
are included.
Signed-off-by: Steffen Görtz
---
tests/microbit-test.c | 122 ++
1 file changed, 122
different output driver modes per level are
available (disconnected, standard, high-current).
The GPIO-Peripheral has a mechanism for detecting level changes which is
not featured in this model.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
Makefile.objs| 1 +
hw
Instantiates UICR, FICR and NVMC in nRF51 SOC.
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 37 ++---
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
, Firmware configuration.
Read and write access to the memories is managed by the
Non-volatile memory controller.
Memory schema:
[ CPU ] -+- [ NVM, either FICR, UICR or CODE ]
| |
\- [ NVMC ]
Signed-off-by: Steffen Görtz
---
hw/nvram/Makefile.objs | 1 +
hw/nvram
The microbit-test includes tests for the nRF51 NVMC
peripheral and will host future nRF51 peripheral tests
and board-level bbc:microbit tests.
Signed-off-by: Steffen Görtz
---
tests/Makefile.include | 2 +
tests/microbit-test.c | 117 +
2 files changed
Use RNG in SOC.
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 16
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 55f8eaafcb..d2a19b8ead 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw
This stubs enables the microbit-micropython firmware to run
on the microbit machine.
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 27 +++
include/hw/arm/nrf51_soc.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm
Adds a new qtest command "set_irq_in" which allows
to set qemu gpio lines to a given level.
Based on https://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02363.html
which never got merged.
Signed-off-by: Steffen Görtz
Originally-by: Matthew Ogilvie
---
qtest.c
Add a model of the NRF51 random number generator peripheral.
This is a simple random generator that continuously generates
new random values after startup.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw
Instantiates GPIO peripheral model
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 16
include/hw/arm/nrf51_soc.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index fd0efd0ee8..695b335dc5 100644
--- a/hw/arm
Adds a header that provides definitions that are used
across nRF51 peripherals
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 33 ++-
include/hw/arm/nrf51.h | 44
include/hw/char/nrf51_uart.h | 1 -
3 files
* Removed LED matrix from this patch set
* Small tidy ups on RNG, NVM, GPIO and Timer
Based-on: 20181025005052.27661-1-jus...@mail.ru
Steffen Görtz (13):
qtest: Add set_irq_in command to set IRQ/GPIO level
arm: Add header to host common definition for nRF51 SOC peripherals
hw/misc/nrf51_rng
different output driver modes per level are
available (disconnected, standard, high-current).
The GPIO-Peripheral has a mechanism for detecting level changes which is
not featured in this model.
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
Makefile.objs| 1 +
hw
This patch adds the model for the nRF51 timer peripheral.
Currently, only the TIMER mode is implemented.
Signed-off-by: Steffen Görtz
---
hw/timer/Makefile.objs | 1 +
hw/timer/nrf51_timer.c | 358 +
hw/timer/trace-events | 5
The microbit-test includes tests for the nRF51 NVMC
peripheral and will host future nRF51 peripheral tests
and board-level bbc:microbit tests.
Signed-off-by: Steffen Görtz
---
tests/Makefile.include | 2 +
tests/microbit-test.c | 117 +
2 files changed
The test suite for the nRF51 GPIO peripheral for now
only tests initial state. Additionally a set of
tests testing an implementation detail of the model
are included.
Signed-off-by: Steffen Görtz
---
tests/microbit-test.c | 122 ++
1 file changed, 122
won header (Stefan)
* Add set_irq_in command to support tests for GPIO
* Add tests for GPIO
* Removed LED matrix from this patch set
* Small tidy ups on RNG, NVM, GPIO and Timer
Steffen Görtz (8):
qtest: Add set_irq_in command to set IRQ/GPIO level
arm: Add header to hosts common
, Firmware configuration.
Read and write access to the memories is managed by the
Non-volatile memory controller.
Memory schema:
[ CPU ] -+- [ NVM, either FICR, UICR or CODE ]
| |
\- [ NVMC ]
Signed-off-by: Steffen Görtz
---
hw/nvram/Makefile.objs | 1 +
hw/nvram
Add a model of the NRF51 random number generator peripheral.
This is a simple random generator that continuously generates
new random values after startup.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
Signed-off-by: Steffen Görtz
Reviewed-by: Stefan Hajnoczi
---
hw
Adds a header that provides definitions that are used
across nRF51 peripherals
Signed-off-by: Steffen Görtz
---
include/hw/arm/nrf51.h | 40
1 file changed, 40 insertions(+)
create mode 100644 include/hw/arm/nrf51.h
diff --git a/include/hw/arm/nrf51.h
Adds a new qtest command "set_irq_in" which allows
to set qemu gpio lines to a given level.
Based on https://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02363.html
which never got merged.
Signed-off-by: Steffen Görtz
Originally-by: Matthew Ogilvie
---
qtest.c
Great news!
I will respin my patch series with the peripherals!
Cheers,
Steffen
On 9/25/18 6:22 AM, Peter Maydell wrote:
> On 31 August 2018 at 23:09, Joel Stanley wrote:
>> v6: Rework based on Peter's review
>> v5: Change back to ARMv7M from ARMMProfile
>> v4: Fix number of IRQs
>> v3: Rebase o
Hi Julia,
> Do you need this stub to run micropython code? Could you delete this,
> please, so that I can post the correct stub structures for js
> directly on Joel's code?
Sure i can remove the code from my patch. micropython will not work but i dont
think this is a problem as long as you provide
Hi Peter,
>> +
>> +static Property nrf51_nvm_properties[] = {
>> +DEFINE_PROP_UINT16("page_size", Nrf51NVMState, page_size, 0x400),
>
> Do the different NRF51 variants really have different NAND page sizes ?
>
it seems that is not the case at least for the NRF51 Series. I removed the
prope
Hi Peter,
object_property_set_bool(soc, true, "realized", &error_abort);>>
>> -armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
>> -NRF51_SOC(soc)->flash_size);
>> +armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 0x00);
>
> Hmm. Using 0x00 here
Hi Peter,
>> +
>> +static uint64_t clock_read(void *opaque, hwaddr addr, unsigned int size)
>> +{
>> +qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n",
>> + __func__, addr, size);
>> +return 1;
>> +}
>> +
>> +static void clock_write(void *opaque, hwaddr addr, uint64
Please ignore this patch.
It will be included in an upcoming patch series.
>> +
>> +arm_m_profile_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
>> +NRF51_SOC(soc)->flash_size);
>> +}
>> +
>> +static void microbit_machine_init(MachineClass *mc)
>> +{
>> +mc->desc = "BBC micro:bit";
>> +mc->init = microbit_init;
>> +mc->max_cpus = 1
Adds a new qtest command "set_irq_in" which allows
to set qemu gpio lines to a given level.
Based on https://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02363.html
which never got merged.
Signed-off-by: Steffen Görtz
Originally-by: Matthew Ogilvie
---
qtest.c
Instantiate the LED matrix and set board-level
pull-up default values to buttons A and B.
This is necessary to calm down the microsoft pxt
javascript runtime available for the micro:bit.
Signed-off-by: Steffen Görtz
---
hw/arm/microbit.c | 52
Instantiate NVMs, NVMC, UART, RNG, GPIO and TIMERs.
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 153 +++--
include/hw/arm/nrf51_soc.h | 16 +++-
2 files changed, 161 insertions(+), 8 deletions(-)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm
r.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
section 10.6
Signed-off-by: Steffen Görtz
---
hw/arm/microbit.c | 4 ++--
hw/arm/nrf51_soc.c | 40 +++---
include/hw/arm/nrf51_soc.h | 15 +++---
3 files changed, 43 insertions(+), 16 deletions(-)
The base address determines a peripherals id, which identifies its
interrupt line, see NRF51 reference manual section 10 peripheral
interface. This little gem calculates the peripheral id based
on its base address.
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 3 +++
1 file changed, 3
This patch series extends the stub of the nRF51 SOC and
bbc:microbit machine with the devices provided in the
previous patch series.
Based-on: 20180806100114.21410-1-cont...@steffen-goertz.de
Steffen Görtz (7):
hw/arm/nrf51_soc: nRF51 Calculate peripheral id from base address
arm: Move nRF51
This patch takes care that errors that occur during
instantiation of the cortex-m0 cpu are properly propagated.
Signed-off-by: Steffen Görtz
---
hw/arm/nrf51_soc.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index
This patch adds a link to the product specification
which contain additional information about the
Nordic Semiconductor nRF51 SOC series.
Furthermore it adds a copyright line to all
files that get changed significantly.
Signed-off-by: Steffen Görtz
---
hw/arm/microbit.c | 1 +
hw/arm
The machine state will be used to host the SOC
and board level devices like the LED matrix and
devices to handle to pushbuttons A and B.
Signed-off-by: Steffen Görtz
---
hw/arm/microbit.c | 38 --
include/hw/arm/microbit.h | 29
Hi Stefan,
thank you for your review!
>
> There is asymmetry here: uicr_read() doesn't check offset before
> indexing the array but uicr_write() does. Either the check is
> necessary or it's not.
>
> I think this check isn't necessary since the memory region is sized
> appropriately:
>
> me
>> Microbit board-level Devices:
>> - LED Matrix
>>
>> Instantiate of the devices is done in an upcoming patch series.
>
> Thanks for gathering together these patches in one series.
> This and the other Cortex-M0-related patchsets are on my queue
> to review, but I won't be able to get to them f
different output driver modes per level are
available (disconnected, standard, high-current).
The GPIO-Peripheral has a mechanism for detecting level changes which is
not featured in this model.
Signed-off-by: Steffen Görtz
---
Makefile.objs| 1 +
hw/gpio/Makefile.objs| 1
assumed that the LEDs are connected in forward
direction from rows to columns.
The demultiplexed LEDs are drawn to the canvas of a graphics console.
In the future it is planed to send QMP events with the updated
matrix image.
Signed-off-by: Steffen Görtz
---
hw/display/Makefile.objs
Registers (UICR)
+ *
+ * Copyright 2018 Steffen Görtz
+ *
+ * This code is licensed under the GPL version 2 or later. See
+ * the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/log.h"
+#include "exec/ad
The test suite for the nRF51 GPIO peripheral for now
only tests initial state. Additionally a set of
tests testing an implementation detail of the model
are included.
Signed-off-by: Steffen Görtz
---
tests/microbit-test.c | 96 +++
1 file changed, 96
This patch adds the model for the nRF51 timer peripheral.
Currently, only the TIMER mode is implemented.
Signed-off-by: Steffen Görtz
---
hw/timer/Makefile.objs | 1 +
hw/timer/nrf51_timer.c | 382 +
hw/timer/trace-events | 5
Add a model of the NRF51 random number generator peripheral.
This is a simple random generator that continuously generates
new random values after startup.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
Signed-off-by: Steffen Görtz
---
hw/misc/Makefile.objs
purpose I/O
- Timer
Microbit board-level Devices:
- LED Matrix
Instantiate of the devices is done in an upcoming patch series.
Based-on: 20180726023645.13927-1-j...@jms.id.au
Steffen Görtz (7):
hw/misc/nrf51_rng: Add NRF51 random number generator peripheral
hw/nvram/nrf51_nvm: Add nRF51 non
The microbit-test includes tests for the nRF51 NVMC
peripheral and will host future nRF51 peripheral tests
and board-level bbc:microbit tests.
Signed-off-by: Steffen Görtz
---
tests/Makefile.include | 2 +
tests/microbit-test.c | 126 +
2 files changed
Signed-off-by: Steffen Görtz
---
tests/microbit-test.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tests/microbit-test.c b/tests/microbit-test.c
index c502ee3976..a1e2f67855 100644
--- a/tests/microbit-test.c
+++ b/tests/microbit-test.c
@@ -101,6 +101,12 @@ static void
Signed-off-by: Steffen Görtz
---
Changes in v2:
- Only call QEMU GPIO update handlers if value changes
- Code style changes
- Removed unused includes
hw/gpio/Makefile.objs| 1 +
hw/gpio/nrf51_gpio.c | 320 +++
include/hw/gpio
Signed-off-by: Steffen Görtz
---
The general purpose i/o implementation supports
tri-state inputs and outputs (HIGH-Z, LOW, HIGH).
SENSE output is not supported and tests will follow in V2.
hw/gpio/Makefile.objs| 1 +
hw/gpio/nrf51_gpio.c | 302
Signed-off-by: Steffen Görtz
---
Test stubs for GIPO. Tests will follow in v2.
tests/microbit-test.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tests/microbit-test.c b/tests/microbit-test.c
index c502ee3976..a1e2f67855 100644
--- a/tests/microbit-test.c
+++ b/tests/microbit
Add a model of the NRF51 random number generator peripheral.
Signed-off-by: Steffen Görtz
---
Changes since v3:
- Replace bitfields
- Add VMState / reset
- Add reference to reference manual
Changes since v2:
- Add missing 'qapi/error.h' for error_abort
Changes since v1
Changes in V3:
- NVMs consolidated in one file
- Removed bitfields
- Add VMState
- Add reset
Changes in V1/V2:
- Code style changes
Signed-off-by: Steffen Görtz
---
hw/nvram/Makefile.objs | 1 +
hw/nvram/nrf51_nvm.c | 401 +++
include/hw/arm
The microbit-test includes tests for the nRF51 NVMC
peripheral and will host future nRF51 peripheral tests
and board-level bbc:microbit tests.
Signed-off-by: Steffen Görtz
---
tests/Makefile.include | 2 +
tests/microbit-test.c | 118 +
2 files changed
safely ignore all writes.
More:
https://github.com/douzepouze/gsoc18-qemu/blob/master/notes.md#test-nvmc-behavior-out-of-micropython-repl
The CODE/FLASH NVM is not currently included in this
peripheral. It is hosted in the SOC and must be read-only
to provide an accurate model.
Steffen Görtz (2
Hi Peter,
> Hi -- a couple of general notes about device modelling
> which might apply to other devices in this series as well:
>
>> +static void nrf51_rng_class_init(ObjectClass *klass, void *data)
>> +{
>> +DeviceClass *dc = DEVICE_CLASS(klass);
>> +
>> +dc->props = nrf51_rng_properties
Hello Peter,
thank you for your very elaborate remarks!
> [ CPU ] -+- [ NVM, either FICR, UICR or CODE ]
> | |
> \- [ NVMC ]
>
> where the CPU can talk to either the NVMC or the NVMs, and the
> NVMC also has a control connection to the NVM. (See the block
> diagram in th
1 - 100 of 121 matches
Mail list logo
