rate"}
Buglink: https://issues.redhat.com/browse/RHEL-82826
Signed-off-by: Arun Menon
Reviewed-by: Stefan Berger
---
backends/tpm/tpm_emulator.c | 39 ---
include/migration/vmstate.h | 1 +
migration/vmstate.c | 4 +++-
3 files changed,
e uint8_t *buf = g_malloc(n);
+
memcpy(buf, &cmd_no, sizeof(cmd_no));
memcpy(buf + sizeof(cmd_no), msg, msg_len_in);
With the typo fixed:
Reviewed-by: Thomas Huth
Reviewed-by: Stefan Berger
On 6/5/25 3:35 PM, Philippe Mathieu-Daudé wrote:
tpm_emulator_ctrlcmd() is not in hot path.
Use the heap instead of the stack, removing
the g_alloca() call.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
---
backends/tpm/tpm_emulator.c | 4 ++--
1 file changed, 2
100644
--- a/tests/unit/meson.build
+++ b/tests/unit/meson.build
@@ -159,6 +159,7 @@ if have_system
'test-qdev-global-props': [qom, hwcore]
}
endif
+ tests += {'test-qdev': [qom, hwcore]}
endif
if have_ga and host_os == 'linux'
Reviewed-by: Stefan Berger
}
+*alenptr = 0;
+g_clear_pointer(arrayptr, g_free);
}
/*
Reviewed-by: Stefan Berger
: Stefan Berger
);
blk_detach_dev(*ptr, dev);
+*ptr = NULL;
}
}
Reviewed-by: Stefan Berger
= opaque;
-g_free(*(char **)object_field_prop_ptr(obj, prop));
+
+g_clear_pointer((char **)object_field_prop_ptr(obj, prop), g_free);
}
static void get_string(Object *obj, Visitor *v, const char *name,
Reviewed-by: Stefan Berger
it is also part of the device's state, so it would not
be so easy to remove once we have it.
thank you,
---
dan tan
power simulation
phone:+1.7373.099.138
email:dan...@linux.ibm.com
On 2025-02-17 14:12, Stefan Berger wrote:
On 2/16/25 5:11 PM, dan tan wrote:
*** BLURB HERE ***
Version
On 2/16/25 5:11 PM, dan tan wrote:
*** BLURB HERE ***
Version 9 summary:
1/3 tpm/tpm_tis_spi: Support TPM for SPI
- rebased with the master, and conform with the latest
device property definition
3/3 tests/qtest/tpm: add unit test to tis-spi
- remove unn
On 1/25/25 1:13 PM, Philippe Mathieu-Daudé wrote:
Because the TPM TIS sysbus device can be optionally plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_tis_sysbus.c | 3
On 12/13/24 2:07 PM, Richard Henderson wrote:
Signed-off-by: Richard Henderson
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_crb.c| 2 +-
hw/tpm/tpm_spapr.c | 2 +-
hw/tpm/tpm_tis_i2c.c| 2 +-
hw/tpm/tpm_tis_isa.c| 2 +-
hw/tpm/tpm_tis_sysbus.c | 2 +-
5 files
On 12/13/24 9:21 AM, Jean-Philippe Brucker wrote:
On Mon, Dec 09, 2024 at 05:08:37PM -0500, Stefan Berger wrote:
typedef struct {
hwaddr base;
hwaddr size;
+uint8_t *data;
+RmeLogFiletype *filetype;
} RmeRamRegion;
+typedef struct {
+charsignature[16
/pc-client-specific-platform-firmware-profile-specification/
Cc: Stefan Berger
Signed-off-by: Jean-Philippe Brucker
---
v2->v3: New
---
qapi/tpm.json| 14 ++
include/hw/tpm/tpm_log.h | 89 +++
hw/tpm/tpm_log.c | 325 +++
h
uess where everything is loaded
and in what order.
Mention that the verifier can pull out the signature from somewhere as
well...
Cc: Stefan Berger
Signed-off-by: Jean-Philippe Brucker
---
v2->v3: New
---
qapi/qom.json| 9 +-
target/arm/kvm_arm.h | 27 +++
target/arm/kv
On 12/5/24 7:33 AM, Jean-Philippe Brucker wrote:
On Mon, Dec 02, 2024 at 10:58:01AM -0500, Stefan Berger wrote:
On 11/26/24 11:21 AM, Jean-Philippe Brucker wrote:
On Tue, Nov 26, 2024 at 01:45:55PM +, Daniel P. Berrangé wrote:
On Mon, Nov 25, 2024 at 05:23:44PM -0500, Stefan Berger
On 11/26/24 11:21 AM, Jean-Philippe Brucker wrote:
On Tue, Nov 26, 2024 at 01:45:55PM +, Daniel P. Berrangé wrote:
On Mon, Nov 25, 2024 at 05:23:44PM -0500, Stefan Berger wrote:
On 11/25/24 2:56 PM, Jean-Philippe Brucker wrote:
Create an event log, in the format defined by Trusted
On 11/25/24 2:56 PM, Jean-Philippe Brucker wrote:
Create an event log, in the format defined by Trusted Computing Group
for TPM2. It contains information about the VMM, the Realm parameters,
any data loaded into guest memory before boot and the initial vCPU
state.
The guest can access this lo
On 11/4/24 12:18 PM, dan tan wrote:
Implement support for TPM via SPI interface. The SPI bus master
is provided by PowerNV SPI device which is an SSI peripheral.
It can uses the tpm_emulator driver backend with the external
swtpm.
Signed-off-by: dan tan
---
diff --git a/hw/tpm/tpm_tis_sp
ch changes up to 0736038408308012ed34aa2135ea3b458d9cff41:
tests: Adjust path for swtpm state to use path under /var/tmp/ (2024-11-07
07:58:04 -0500)
Stefan Berger (1):
tests: Adjust path for swtpm state to use path under /var/tmp/
tests/functional/test_arm_aspeed.py | 6 +++---
1 file
nges up to e3edada526f3ac28f71dc8ae7a0acbc76f8e2050:
tests: Adjust path for swtpm state to use path under /var/tmp/ (2024-11-07
09:57:20 -0500)
v2:
- Added missing comment into test file; generalized it a bit from Peter's
suggestion
Stefan Berger (1):
tests: Adjust path for swtpm st
d machine tests")
Reviewed-by: Cédric Le Goater
Signed-off-by: Stefan Berger
---
tests/functional/test_arm_aspeed.py | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/functional/test_arm_aspeed.py
b/tests/functional/test_arm_aspeed.py
index 9761fc06a4..274
d machine tests")
Reviewed-by: Cédric Le Goater
Signed-off-by: Stefan Berger
---
tests/functional/test_arm_aspeed.py | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/functional/test_arm_aspeed.py
b/tests/functional/test_arm_aspeed.py
index 9761fc06a4..a574b1e52
On 11/7/24 6:09 AM, Peter Maydell wrote:
On Wed, 6 Nov 2024 at 18:08, Stefan Berger wrote:
From: Stefan Berger
To avoid AppArmor-related test failures when functional test are run from
somewhere under /mnt, adjust the path to swtpm's state to use an AppArmor-
supported path, such as
From: Stefan Berger
To avoid AppArmor-related test failures when functional test are run from
somewhere under /mnt, adjust the path to swtpm's state to use an AppArmor-
supported path, such as /var/tmp, which is provided by the python function
tempfile.TemporaryDirectory().
An update to sw
On 11/5/24 4:50 PM, Stefan Berger wrote:
> > One of swtpm or apparmor must be wrong here and I think it should
be fixed. In particular, having the failure mode be "something
As stated, we were going to fix the AppArmor path in the swtpm Ubuntu
package.
But AIUI t
On 11/5/24 4:34 PM, Peter Maydell wrote:
On Tue, 5 Nov 2024 at 20:12, Stefan Berger wrote:
On 11/5/24 2:54 PM, Peter Maydell wrote:
On Tue, 5 Nov 2024 at 18:36, Stefan Berger wrote:
Anyway, the thing here is that we run swtpm like this:
swtpm socket -d --tpm2 --tpmstate dir=/path/to
On 11/5/24 2:54 PM, Peter Maydell wrote:
On Tue, 5 Nov 2024 at 18:36, Stefan Berger wrote:
On 11/5/24 1:12 PM, Peter Maydell wrote:
On Tue, 5 Nov 2024 at 18:02, Stefan Berger wrote:
On 11/5/24 12:13 PM, Peter Maydell wrote:
Is there no way to just have apparmor not apply at all
here? I
On 11/5/24 1:12 PM, Peter Maydell wrote:
On Tue, 5 Nov 2024 at 18:02, Stefan Berger wrote:
On 11/5/24 12:13 PM, Peter Maydell wrote:
On Tue, 5 Nov 2024 at 17:02, Stefan Berger wrote:
On 11/5/24 11:14 AM, Peter Maydell wrote:
Q1: why is apparmor forbidding swtpm from doing something
On 11/5/24 12:13 PM, Peter Maydell wrote:
On Tue, 5 Nov 2024 at 17:02, Stefan Berger wrote:
On 11/5/24 11:14 AM, Peter Maydell wrote:
Q1: why is apparmor forbidding swtpm from doing something that
it needs to do to work?
What distro and version is this?
The profile may be too strict and
On 11/5/24 11:14 AM, Peter Maydell wrote:
On Thu, 24 Oct 2024 at 07:39, Cédric Le Goater wrote:
This is a simple conversion of the tests with some cleanups and
adjustments to match the new test framework. Replace the zephyr image
MD5 hashes with SHA256 hashes while at it.
(ccing Stefan
On 11/4/24 12:18 PM, dan tan wrote:
*** BLURB HERE ***
Series:
Reviewed-by: Stefan Berger
On 11/4/24 1:43 AM, dan tan wrote:
Add qtest cases to exercise main TPM functionality
The TPM device emulation is provided by swtpm, which is TCG
TPM 2.0, and TCG TPM TIS compliant. See
https://trustedcomputinggroup.org/wp-content/uploads/TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1.03_v22.pd
On 11/4/24 1:43 AM, dan tan wrote:
Implement support for TPM via SPI interface. The SPI bus master
is provided by PowerNV SPI device which is an SSI peripheral.
It can uses the tpm_emulator driver backend with the external
swtpm.
Although the implementation is endian neutral, the SPI
bus mast
On 11/2/24 10:01 AM, Stefan Berger wrote:
On 11/1/24 4:27 PM, dan tan wrote:
Add qtest cases to exercise main TPM locality functionality
When running `ninja -C build test` I get this output that should have
its lines prefixed with '#' 'somehow':
'somehow
On 11/1/24 4:27 PM, dan tan wrote:
Implement support for TPM via SPI interface. The SPI bus master
is provided by PowerNV SPI device which is an SSI peripheral.
It can uses the tpm_emulator driver backend with the external
swtpm.
Although the implementation is endian neutral, the SPI
bus mast
On 11/1/24 4:27 PM, dan tan wrote:
Add qtest cases to exercise main TPM locality functionality
It's not just locality. -> main TPM functionality.
The TPM device emulation is provided by swtpm, which is TCG
TPM 2.0, and TCG TPM TIS compliant. See
https://trustedcomputinggroup.org/wp-content
On 11/1/24 4:27 PM, dan tan wrote:
The addition to ppc/Kconfig is for building this into the
qemu-system-ppc64 binary. The enablement requires the
following command line argument:
-device tpm-tis-spi,tpmdev=tpm0,bus=pnv-spi-bus.4
Signed-off-by: dan tan
Reviewed-by: Stefan Berger
On 11/1/24 2:57 PM, dan tan wrote:
*** BLURB HERE ***
Support TPM for SPI (Serial Peripheral Interface)
Revision 3 summary:
device support:
- moved variable tis_addr from TPMStateSPI struct to local
- added the VM suspend/resume support:
- added vmstate_tpm_tis_spi declar
On 10/25/24 4:12 PM, dan tan wrote:
Add qtest cases to exercise main TPM locality functionality
The TPM device emulation is provided by swtpm, which is TCG
TPM 2.0, and TCG TPM TIS compliant. See
https://trustedcomputinggroup.org/wp-content/uploads/TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1
On 10/25/24 4:12 PM, dan tan wrote:
Add qtest cases to exercise main TPM locality functionality
The TPM device emulation is provided by swtpm, which is TCG
TPM 2.0, and TCG TPM TIS compliant. See
https://trustedcomputinggroup.org/wp-content/uploads/TCG_PC_Client_Platform_TPM_Profile_PTP_2.0_r1
On 10/25/24 4:12 PM, dan tan wrote:
Implement support for TPM via SPI interface. The SPI bus master
is provided by PowerNV SPI device which is an SSI peripheral.
It can uses the tpm_emulator driver backend with the external
swtpm.
Although the implementation is endian neutral, the SPI
bus mas
On 10/18/24 12:23 PM, Michael Tokarev wrote:
16.10.2024 18:21, Stefan Berger wrote:
Rather than waiting for the completion of migration on the source side,
wait for it on the destination QEMU side to avoid accessing the TPM TIS
memory mapped registers before QEMU could restore their state
U to avoid failures
(2024-10-18 07:58:04 -0400)
Stefan Berger (3):
tpm: Use new ptm_cap_n structure for PTM_GET_CAPABILITY
tpm_emulator: Read control channel response in 2 passes
tests: Wait for migration completion on destination QEMU to avoid
failures
backends/tpm/tpm_emula
buffer.
Cc:
Reported-by: Fabiano Rosas
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Stefan Berger
---
tests/qtest/tpm-tests.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/tpm-tests.c b/tests/qtest/tpm-tests.c
index fb94496bbd..197714f8d9 100644
--- a/tests
now clear that the 1st 32bit word carries the
tpm_result like all the other response structures of all other commands
do.
The changes are taken from the swtpm project's tpm_ioctl.h.
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emulator.c
needed. This avoids getting stuck while waiting for too many
bytes in case of an error. The 'getting stuck' condition has not been
observed in practice so far, though.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2615
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Ste
it now clear that the 1st 32bit word carries the
tpm_result like all the other response structures of all other commands
do.
The changes are taken from the swtpm project's tpm_ioctl.h.
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emulator.c | 14 --
backends/tpm/tpm_io
needed. This avoids getting stuck while waiting for too many
bytes in case of an error. The 'getting stuck' condition has not been
observed in practice so far, though.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2615
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emula
expect in case of an error and read that many bytes in a first step. Check
for an error code in the first 4 bytes and return if there is an error.
Read the rest in a 2nd step, if needed.
Stefan
Stefan Berger (2):
tpm: Use new ptm_cap_n structure for PTM_GET_CAPABILITY
tpm_emulator: Read
On 10/16/24 11:03 AM, Daniel P. Berrangé wrote:
On Wed, Oct 16, 2024 at 10:57:07AM -0400, Stefan Berger wrote:
Use the new ptm_cap_n structure for getting the PTM_GET_CAPABILITY response
from swtpm. Previously only 17 bits could possibly have been set in ptm_cap
(=uint64_t) in big endian
buffer.
Cc: qemu-sta...@nongnu.org
Reported-by: Fabiano Rosas
Signed-off-by: Stefan Berger
---
tests/qtest/tpm-tests.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/tpm-tests.c b/tests/qtest/tpm-tests.c
index fb94496bbd..197714f8d9 100644
--- a/tests/qtest/tpm
expect in case of an error and read that many bytes in a first pass. Check
for an error code in the first 4 bytes. Read the rest in a 2nd pass.
Stefan
v3:
- 2/2: Pass size of return response for error as parameter
v2:
- 2/2: Added special handling of CMD_GET_STATEBLOB
Stefan Berger (2
needed. This avoids getting stuck while waiting for too many
bytes. The 'getting stuck' condition has not been observed in practice so
far, though.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2615
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emula
it now clear that the 1st 32bit word carries the
tpm_result like all the other response structures of all other commands
do.
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emulator.c | 14 --
backends/tpm/tpm_ioctl.h| 13 -
backends/tpm/trace-events | 2 +-
3
On 10/16/24 9:34 AM, Stefan Berger wrote:
In case swtpm was to return a control channel message with an error code it
would only return 4 bytes. However, some of the commands expect a response
with more bytes and QEMU would get stuck in qemu_chr_fe_read_all() waiting
for bytes following the
needed. This avoids getting stuck while waiting for too many bytes if only
4 bytes were sent due to an error message. The 'getting stuck' condition
has not been observed in practice so far, though.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2615
Signed-off-by: Stefan Berger
---
it now clear that the 1st 32bit word carries the
tpm_result like all the other response structures of all other commands
do.
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emulator.c | 14 --
backends/tpm/tpm_ioctl.h| 13 -
backends/tpm/trace-events | 2 +-
3
passes stopping if an error code is received in the first 4 bytes to avoid
getting stuck. Implement an exception for CMD_GET_STATEBLOB that has always
been sending the header in case of error.
Stefan
v2:
-
Stefan Berger (2):
tpm: Use new ptm_cap_n structure for PTM_GET_CAPABILITY
On 10/15/24 7:35 PM, Stefan Berger wrote:
On 10/15/24 6:02 PM, Fabiano Rosas wrote:
Stefan Berger writes:
Yes, I've been using that method to reproduce live migration race
conditions as well. It's quite effective.
If you don't think you'll be able to find the r
On 10/15/24 6:02 PM, Fabiano Rosas wrote:
Stefan Berger writes:
On 10/15/24 3:57 PM, Fabiano Rosas wrote:
Stefan Berger writes:
So this here is failing for you every time?
QTEST_QEMU_BINARY=build/qemu-system-aarch64
./build/tests/qtest/tpm-tis-device-swtpm-test
Sorry, I was
On 10/15/24 3:57 PM, Fabiano Rosas wrote:
Stefan Berger writes:
So this here is failing for you every time?
QTEST_QEMU_BINARY=build/qemu-system-aarch64
./build/tests/qtest/tpm-tis-device-swtpm-test
Sorry, I was unclear. No, that runs for about 30 iterations before it
fails. I just
On 10/15/24 3:22 PM, Fabiano Rosas wrote:
Stefan Berger writes:
On 10/15/24 2:11 PM, Fabiano Rosas wrote:
Hi Stefan,
I see the tpm-tis-device-swtpm test timing out, could you take a look?
qemu:qtest+qtest-aarch64 / qtest-aarch64/tpm-tis-device-swtpm-test time out
(After 60.0 seconds
On 10/15/24 2:11 PM, Fabiano Rosas wrote:
Hi Stefan,
I see the tpm-tis-device-swtpm test timing out, could you take a look?
qemu:qtest+qtest-aarch64 / qtest-aarch64/tpm-tis-device-swtpm-test time out
(After 60.0 seconds)
135/138 qemu:qtest+qtest-aarch64 /
qtest-aarch64/tpm-tis-device-swtpm-
On 10/11/24 6:35 PM, Stefan Berger wrote:
Error responses from swtpm are always only 4 bytes long. Therefore, read
the entire response in 2 passes and stop if the first 4 bytes indicate an
error response with no subsequent bytes readable. Read the rest in a 2nd
pass, if needed. This avoids
On 10/13/24 10:36 PM, dan tan wrote:
Hi Stefan,
Thank you for the review comments! Please see my response below.
thank you,
---
dan tan
power simulation
phone:+1.7373.099.138
email:dan...@linux.ibm.com
On 2024-09-12 13:02, Stefan Berger wrote:
On 9/12/24 12:09 PM, dan tan wrote:
From
only 4 bytes were sent due to an error message. The 'getting stuck'
condition has not been observed in practice so far, though.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2615
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emulator.c | 25 +++--
1 fi
it now clear that the 1st 32bit word carries the
tpm_result like all the other response structures of all other commands
do.
Signed-off-by: Stefan Berger
---
backends/tpm/tpm_emulator.c | 14 --
backends/tpm/tpm_ioctl.h| 13 -
backends/tpm/trace-events | 2 +-
3
passes stopping if an error code is received in the first 4 bytes to avoid
getting stuck.
Stefan
Stefan Berger (2):
tpm: Use new ptm_cap_n structure for PTM_GET_CAPABILITY
tpm_emulator: Read control channel response in 2 passes
backends/tpm/tpm_emulator.c | 39
On 9/12/24 12:09 PM, dan tan wrote:
From: dan tan
SPI interface to TPM TIS implementation via swtpm
Apart from Cedric's comments:
Can you say a bit more about the specs you followed and details how many
localities are supported etc. Is this device pnv-specific or can it be
used on other
(const char *buf) "%s"
# tpm_emulator.c
tpm_emulator_set_locality(uint8_t locty) "setting locality to %d"
Reviewed-by: Stefan Berger
On 5/1/24 12:52, James Bottomley wrote:
On Wed, 2024-05-01 at 12:31 -0400, Stefan Berger wrote:
On 5/1/24 12:21, James Bottomley wrote:
On Tue, 2024-04-30 at 17:12 -0400, Stefan Berger wrote:
On 4/30/24 15:08, James Bottomley wrote:
[...]
+The mssim backend supports snapshotting and
On 5/1/24 12:21, James Bottomley wrote:
On Tue, 2024-04-30 at 17:12 -0400, Stefan Berger wrote:
On 4/30/24 15:08, James Bottomley wrote:
[...]
+The mssim backend supports snapshotting and migration by not
resetting
I don't thing snapshotting is supported because snapshooting
On 4/30/24 15:08, James Bottomley wrote:
The requested feedback was to convert the tpmdev handler to being json
based, which requires rethreading all the backends. The good news is
this reduced quite a bit of code (especially as I converted it to
error_fatal handling as well, which removes th
On 4/30/24 15:08, James Bottomley wrote:
The Microsoft Simulator (mssim) is the reference emulation platform
for the TCG TPM 2.0 specification.
https://github.com/Microsoft/ms-tpm-20-ref.git
It exports a fairly simple network socket based protocol on two
sockets, one for command (default 232
^ >
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Berger
---
backends/tpm/tpm_util.c | 24
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/backends/tpm/tpm_util.c b/backends/tpm/tpm_util.c
index 1856589c3b..0747af2d1c 100644
--- a/
On 2/7/24 11:08, Chalapathi V wrote:
In this commit SPI shift engine and sequencer logic is implemented.
Shift engine performs serialization and de-serialization according to the
control by the sequencer and according to the setup defined in the
configuration registers. Sequencer implements th
On 2/7/24 11:08, Chalapathi V wrote:
Serial pheripheral interface provides full-duplex synchronous serial
communication between single controller and multiple responder devices.
One SPI Controller is implemented and supported on a SPI Bus, there is
no support for multiple controllers on the SP
On 3/7/24 13:54, Stefan Berger wrote:
On 2/7/24 11:08, Chalapathi V wrote:
SPI controller device model supports a connection to a single SPI
responder.
This provide access to SPI seeproms, TPM, flash device and an ADC
controller.
All SPI function control is mapped into the SPI register
On 2/7/24 11:08, Chalapathi V wrote:
This commit implements a Serial EEPROM utilizing the Serial Peripheral
Interface (SPI) compatible bus.
Currently implemented SEEPROM is Microchip's 25CSM04 which provides 4 Mbits
of Serial EEPROM utilizing the Serial Peripheral Interface (SPI) compatible
bu
On 3/7/24 13:54, Stefan Berger wrote:
On 2/7/24 11:08, Chalapathi V wrote:
+#define COUNTER_CONFIG_REG_SHIFT_COUNT_N1 PPC_BITMASK(0 , 7)
No space before the ',' ==> PPC_BITMASK(0, 7)
On 2/7/24 11:08, Chalapathi V wrote:
SPI controller device model supports a connection to a single SPI responder.
This provide access to SPI seeproms, TPM, flash device and an ADC controller.
All SPI function control is mapped into the SPI register space to enable full
control by firmware. In
On 1/22/24 15:46, Peter Maydell wrote:
On Mon, 22 Jan 2024 at 19:30, Stefan Berger wrote:
On 1/22/24 12:16, Peter Maydell wrote:
On Thu, 18 Jan 2024 at 16:04, Manolo de Medici wrote:
The Hurd currently doesn't have any TPM driver, compilation fails
for missing symbols unless
On 1/22/24 12:16, Peter Maydell wrote:
On Thu, 18 Jan 2024 at 16:04, Manolo de Medici wrote:
The Hurd currently doesn't have any TPM driver, compilation fails
for missing symbols unless these are left undefined.
Signed-off-by: Manolo de Medici
---
backends/tpm/tpm_ioctl.h | 2 +-
1 fil
On 11/24/23 21:39, Joelle van Dyne wrote:
On Fri, Nov 24, 2023 at 8:26 AM Stefan Berger wrote:
On 11/24/23 11:21, Joelle van Dyne wrote:
On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote:
On 11/23/23 19:56, Joelle van Dyne wrote:
On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger
On 11/24/23 11:21, Joelle van Dyne wrote:
On Fri, Nov 24, 2023 at 8:17 AM Stefan Berger wrote:
On 11/23/23 19:56, Joelle van Dyne wrote:
On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wrote:
On 11/14/23 16:05, Stefan Berger wrote:
On 11/14/23 13:03, Stefan Berger wrote:
On 11
On 11/23/23 19:56, Joelle van Dyne wrote:
On Tue, Nov 14, 2023 at 4:12 PM Stefan Berger wrote:
On 11/14/23 16:05, Stefan Berger wrote:
On 11/14/23 13:03, Stefan Berger wrote:
On 11/14/23 04:36, Marc-André Lureau wrote:
Hi
On Tue, Nov 14, 2023 at 6:12 AM Joelle van Dyne wrote
d to the device realize as CRB does not support TPM 1.0. It will error in
that case.
- Dropped the patch to fix crash when PPI is enabled on TIS SysBus device since
a separate patch submitted by Stefan Berger disables such an option.
- Fixed an issue where we default tpmEstablished=0 when it shou
On 11/14/23 16:05, Stefan Berger wrote:
On 11/14/23 13:03, Stefan Berger wrote:
On 11/14/23 04:36, Marc-André Lureau wrote:
Hi
On Tue, Nov 14, 2023 at 6:12 AM Joelle van Dyne wrote:
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
nit: you also added tests for x86
On 11/14/23 13:03, Stefan Berger wrote:
On 11/14/23 04:36, Marc-André Lureau wrote:
Hi
On Tue, Nov 14, 2023 at 6:12 AM Joelle van Dyne wrote:
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
nit: you also added tests for x86, could be a different patch?
For arm, the test
On 11/14/23 04:36, Marc-André Lureau wrote:
Hi
On Tue, Nov 14, 2023 at 6:12 AM Joelle van Dyne wrote:
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
nit: you also added tests for x86, could be a different patch?
For arm, the test fails until next patch with:
# starting
On 11/14/23 11:37, Stefan Berger wrote:
On 11/13/23 21:09, Joelle van Dyne wrote:
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h | 2 ++
hw/i386
On 11/13/23 21:09, Joelle van Dyne wrote:
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
Signed-off-by: Joelle van Dyne
---
hw/tpm/tpm_crb.h| 2 ++
hw/i386/acpi-build.c| 16 +---
hw/tpm/
: Stefan Berger
---
hw/tpm/tpm_crb.h| 5 +-
hw/tpm/tpm_crb.c| 30 -
hw/tpm/tpm_crb_common.c | 145 +++-
3 files changed, 114 insertions(+), 66 deletions(-)
diff --git a/hw/tpm/tpm_crb.h b/hw/tpm/tpm_crb.h
index da3a0cf256
On 11/14/23 04:36, Marc-André Lureau wrote:
Hi
On Tue, Nov 14, 2023 at 6:12 AM Joelle van Dyne wrote:
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
nit: you also added tests for x86, could be a different patch?
For arm, the test fails until next patch with:
# starting
On 11/2/23 22:37, Joelle van Dyne wrote:
On Thu, Nov 2, 2023 at 11:50 AM Stefan Berger wrote:
On 10/31/23 00:00, Joelle van Dyne wrote:
This logic is similar to TPM TIS ISA device. Since TPM CRB can only
support TPM 2.0 backends, we check for this in realize.
The problem on x86_64 is
rking under Linux. The
problem seems to be
.parent = TYPE_DEVICE
When I change this to TYPE_ISA_DEVICE it starts generating the ACPI
table. I am not sure what other side effects this may have, though.
Stefan
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
hw/tpm/tpm_
On 10/31/23 00:00, Joelle van Dyne wrote:
On Apple Silicon, when Windows performs a LDP on the CRB MMIO space,
the exception is not decoded by hardware and we cannot trap the MMIO
read. This led to the idea from @agraf to use the same mapping type as
ROM devices: namely that reads should be se
ice,tpmdev=tpm0
```
along with SWTPM:
```
$ swtpm \
--ctrl type=unixio,path=tpm.sock,terminate \
--tpmstate backend-uri=file://tpm.data \
--tpm2
```
Signed-off-by: Joelle van Dyne
I wonder whether we will get someone to test this on loongarch and/or riscv.
Reviewed-by: Ste
On 10/31/23 00:00, Joelle van Dyne wrote:
TPM needs to know its own base address in order to generate its DSDT
device entry.
Signed-off-by: Joelle van Dyne
Reviewed-by: Stefan Berger
---
include/sysemu/tpm.h | 4
hw/tpm/tpm-sysbus.c | 47
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