On 7/12/23 11:56 AM, Cédric Le Goater wrote:
> Hello Shawn,
>
> On 7/12/23 18:13, Shawn Anastasio wrote:
>> Change radix model to always generate a storage interrupt when the R/C
>> bits are not set appropriately in a PTE instead of setting the bits
>> itself. Accordin
ot;
Signed-off-by: Shawn Anastasio
---
Changes in v2:
- Raise interrupt in ppc_radix64_process_scoped_xlate and
ppc_radix64_partition_scoped_xlate instead of ppc_radix64_check_rc
target/ppc/mmu-radix64.c | 74 ++--
1 file changed, 49 insertions(+), 25
Hi Cédric,
On 7/12/23 3:27 AM, Cédric Le Goater wrote:
> Hello Shawn,
>
> On 7/12/23 00:24, Shawn Anastasio wrote:
>> Change radix64_set_rc to always generate a storage interrupt when the
>> R/C bits are not set appropriately instead of setting the bits itself.
>>
ER9 Processor User's Manual, Section 4.10.13.1: "When
performing Radix translation, the POWER9 hardware triggers the
appropriate interrupt ... for the mode and type of access whenever
Reference (R) and Change (C) bits require setting in either the guest or
host page-table entry (PTE)."
Si
