Re: Status update for maintainers file

2021-04-01 Thread Sarah Harris
On Thu, 1 Apr 2021 09:53:38 +0200 Philippe Mathieu-Daudé wrote: > Thank you Sarah for your AVR reviews the last years, they > have been of great value for the project and community. I'm glad my work has been of use, much appreciated! Kind regards, Sarah Harris

Re: [PATCH] MAINTAINERS: Drop the lines with Sarah Harris

2021-04-01 Thread Sarah Harris
+174,6 @@ F: include/hw/arm/smmu* > > AVR TCG CPUs > M: Michael Rolnik > -R: Sarah Harris > S: Maintained > F: docs/system/target-avr.rst > F: gdb-xml/avr-cpu.xml > @@ -1045,7 +1044,6 @@ AVR Machines > > AVR MCUs > M: Michael Rolnik > -R: Sarah Harr

Status update for maintainers file

2021-03-31 Thread Sarah Harris
s for removing my reviewer entry, but I assume if someone needs to be notified they'll be a member of this list. Kind regards, Sarah Harris

Re: [PATCH 03/11] hw/avr: Add limited support for avr gpio registers

2021-03-15 Thread Sarah Harris
= TYPE_AVR_GPIO, > +.parent= TYPE_SYS_BUS_DEVICE, > +.instance_size = sizeof(AVRGPIOState), > +.instance_init = avr_gpio_init, > +.class_init= avr_gpio_class_init, > +}; > + > +static void avr_gpio_register_types(void) > +{ > +type_register_static(&avr_gpio_info); > +} > + > +type_init(avr_gpio_register_types) > diff --git a/hw/avr/Kconfig b/hw/avr/Kconfig > index d31298c3cce..16a57ced11f 100644 > --- a/hw/avr/Kconfig > +++ b/hw/avr/Kconfig > @@ -3,6 +3,7 @@ config AVR_ATMEGA_MCU > select AVR_TIMER16 > select AVR_USART > select AVR_POWER > +select AVR_GPIO > > config ARDUINO > select AVR_ATMEGA_MCU > diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig > index f0e7405f6e6..fde7019b2ba 100644 > --- a/hw/gpio/Kconfig > +++ b/hw/gpio/Kconfig > @@ -13,3 +13,6 @@ config GPIO_PWR > > config SIFIVE_GPIO > bool > + > +config AVR_GPIO > +bool > diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build > index 79568f00ce3..366aca52ca2 100644 > --- a/hw/gpio/meson.build > +++ b/hw/gpio/meson.build > @@ -13,3 +13,4 @@ > softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_gpio.c')) > softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_gpio.c')) > softmmu_ss.add(when: 'CONFIG_SIFIVE_GPIO', if_true: files('sifive_gpio.c')) > +softmmu_ss.add(when: 'CONFIG_AVR_GPIO', if_true: files('avr_gpio.c')) > -- > 2.26.2 Regards, Sarah Harris

Re: [PATCH rc3 02/30] target/avr: Introduce AVR CPU class object

2020-01-29 Thread Sarah Harris
are power-on events). I'm not sure what, if anything, needs to be done about it but it might be worth fixing now we're emulating specific chips. Kind regards, Sarah Harris [1] http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-7810-Automotive-Microcontrollers-ATmega328P_Datasheet.

Re: [PATCH rc2 12/25] hw/timer: Add limited support for Atmel 16 bit timer peripheral

2020-01-24 Thread Sarah Harris
ther contexts. Only a subset of the functions > >> of each peripheral is implemented, mainly due to the lack of a standard > >> way to handle electrical connections (like GPIO pins). > >> > >> Signed-off-by: Sarah Harris > >> Message-Id: <202001181

Re: [PATCH v37 00/17] QEMU AVR 8 bit cores

2019-11-29 Thread Sarah Harris
> Sarah, > do you mind if use the same license I use for my code? I'm happy to use the same license. Kind regards, Sarah Harris On Thu, 28 Nov 2019 14:28:19 +0200 Michael Rolnik wrote: > On Wed, Nov 27, 2019 at 11:06 PM Aleksandar Markovic < > aleksandar.m.m...@gmail.com&g

Re: [PATCH v35 10/13] target/avr: Add limited support for USART and 16 bit timer peripherals

2019-11-29 Thread Sarah Harris
Hi Aleksandar, Yes, adding a note about the limitations of the USART emulation sounds like a good idea. Yes, I'm happy with switching to the (L)GPL license that's being used elsewhere. Kind regards, Sarah Harris On Thu, 28 Nov 2019 12:02:38 +0100 Aleksandar Markovic wrote: >

Re: [PATCH v36 17/17] target/avr: Update MAINTAINERS file

2019-11-28 Thread Sarah Harris
Yes, I don't have time to do maintenance, but I can manage reviewing. Kind regards, Sarah Harris On Tue, 26 Nov 2019 22:41:32 +0200 Michael Rolnik wrote: > Ah. I think Sarah was ok with reviewer role. > > On Tue, Nov 26, 2019 at 9:39 PM Aleksandar Markovic < > aleksan

Re: [PATCH v35 10/13] target/avr: Add limited support for USART and 16 bit timer peripherals

2019-11-28 Thread Sarah Harris
disabled) Kind regards, Sarah Harris On Mon, 25 Nov 2019 19:57:48 +0100 Aleksandar Markovic wrote: > On Mon, Nov 25, 2019 at 4:57 PM Sarah Harris wrote: > > > > Hi Aleksandar, > > > > > - Is there a place in docs that explain its implementation in gener

Re: [PATCH v35 10/13] target/avr: Add limited support for USART and 16 bit timer peripherals

2019-11-25 Thread Sarah Harris
. I decided it wasn't enough to justify crashing, but the user should be made aware that data is being lost and the output might not be what they would otherwise expect. Kind regards, Sarah Harris On Fri, 22 Nov 2019 16:10:02 +0100 Aleksandar Markovic wrote: > On Tue, Oct 29, 20

Re: [PATCH v35 10/13] target/avr: Add limited support for USART and 16 bit timer peripherals

2019-11-25 Thread Sarah Harris
s I'm aware this is undefined behaviour, so returning zero is reasonable) Kind regards, Sarah Harris On Fri, 22 Nov 2019 17:48:56 +0100 Aleksandar Markovic wrote: > On Tue, Oct 29, 2019 at 10:25 PM Michael Rolnik wrote: > > > > From: Sarah Harris > > > > Thes

Re: [PATCH v35 10/13] target/avr: Add limited support for USART and 16 bit timer peripherals

2019-11-25 Thread Sarah Harris
ese functions use existing QEMU APIs (the read and write functions are passed via the MemoryRegionOps struct, the receive function is passed to qemu_chr_fe_set_handlers), so the size parameters are required to match the existing interfaces. Kind regards, Sarah Harris On Fri, 22 Nov 2019 15:

Re: [Qemu-devel] [PATCH v1 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file

2019-10-17 Thread Sarah Harris
is message comes from my work email so the details should be correct, i.e. Sarah Harris Kind regards, Sarah Harris On Sat, 12 Oct 2019 09:31:07 +0200 Philippe Mathieu-Daudé wrote: > Hi Sarah, > > On 5/10/19 1:17 PM, Sarah Harris wrote: > > Hi Richard, > > > > Ha

Re: [Qemu-devel] [PATCH v29 1/8] target/avr: Add outward facing interfaces and core CPU logic

2019-08-27 Thread Sarah Harris
I don't mind if you want to drop my signed-off-by for commits that were based on Michael's work. You probably want to keep my sign-off for the USART/timer commit though as that was new code. Regards, Sarah Harris On Mon, 26 Aug 2019 10:00:51 +0200 Thomas Huth wrote: > On 26/

Re: [Qemu-devel] [PATCH v27 5/8] target/avr: Add limited support for USART and 16 bit timer peripherals

2019-07-26 Thread Sarah Harris
red registers in the 2560 USART are the PRR's, which >we implemented by adding single byte memory regions during board >initialisation (so that the memory region wasn't part of any one device). I expect there are cleaner ways to do it. Kind regards, Sarah Harris On Thu, 25 Jul

Re: [Qemu-devel] [PATCH v1 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file

2019-05-10 Thread Sarah Harris
for anyone who wants to use it. Kind regards, Sarah Harris On Sun, 5 May 2019 09:10:00 -0700 Michael Rolnik wrote: > Hi Richard. > > I can maintain it > > Sent from my cell phone, please ignore typos > > On Sun, May 5, 2019, 8:57 AM Richard Henderson > wrote: >

Re: [Qemu-devel] [PATCH v1 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file

2019-05-07 Thread Sarah Harris
t fixing them. Kind regards, Sarah Harris On Sun, 5 May 2019 09:10:00 -0700 Michael Rolnik wrote: > Hi Richard. > > I can maintain it > > Sent from my cell phone, please ignore typos > > On Sun, May 5, 2019, 8:57 AM Richard Henderson > wrote: > > > On 5/4/19 1:

[Qemu-devel] [PATCH v1 5/8] target/avr: Add instruction translation

2019-05-04 Thread Sarah Harris
This includes: - table of instruction bit patterns - intermediate translation functions that extract parameters from opcodes - TCG translations for each instruction Signed-off-by: Sarah Harris --- target/avr/translate-inst.h | 695 target/avr/translate.c | 3013

[Qemu-devel] [PATCH v1 3/8] target/avr: Add outward facing interfaces and core CPU logic

2019-05-04 Thread Sarah Harris
This includes: - CPU data structures - object model classes and functions - migration functions - GDB hooks Signed-off-by: Sarah Harris --- target/avr/cpu-qom.h | 83 +++ target/avr/cpu.c | 570 +++ target/avr/cpu.h | 238

[Qemu-devel] [PATCH v1 7/8] target/avr: Add example board configuration

2019-05-04 Thread Sarah Harris
A simple board setup that configures an AVR CPU to run a given firmware image. This is all that's useful to implement without peripheral emulation as AVR CPUs include a lot of on-board peripherals. Signed-off-by: Sarah Harris --- hw/Kconfig | 1 + hw/avr/Kconfig | 4

[Qemu-devel] [PATCH v1 4/8] target/avr: Add instruction helpers

2019-05-04 Thread Sarah Harris
access instructions are implemented here because some address ranges actually refer to CPU registers. Signed-off-by: Sarah Harris --- target/avr/helper.c | 343 target/avr/helper.h | 28 2 files changed, 371 insertions(+) create mode 100644

[Qemu-devel] [PATCH v1 6/8] target/avr: Add limited support for USART and 16 bit timer peripherals

2019-05-04 Thread Sarah Harris
These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). Signed-off-by: Sarah Harris

[Qemu-devel] [PATCH v1 1/8] target/avr: Add instruction decoder

2019-05-04 Thread Sarah Harris
this seemed simpler to implement than adding a new build step. Signed-off-by: Sarah Harris --- target/avr/decode.c | 441 target/avr/decode.h | 68 +++ 2 files changed, 509 insertions(+) create mode 100644 target/avr/decode.c create mode 100644

[Qemu-devel] [PATCH v1 0/8] DRAFT AVR Patches

2019-05-04 Thread Sarah Harris
ear comments, making code easier to follow) On a personal note, I'm unfamiliar with this style of submission so I hope I haven't broken anything! Sarah Harris (8): target/avr: Add instruction decoder target/avr: Add mechanism to check for active debugger connection target/avr:

[Qemu-devel] [PATCH v1 8/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file

2019-05-04 Thread Sarah Harris
Signed-off-by: Sarah Harris --- MAINTAINERS | 6 ++ arch_init.c | 2 ++ configure | 6 ++ default-configs/avr-softmmu.mak | 5 + include/disas/dis-asm.h | 6 ++ include/sysemu/arch_init.h | 1 + qapi

[Qemu-devel] [PATCH v1 2/8] target/avr: Add mechanism to check for active debugger connection

2019-05-04 Thread Sarah Harris
whether a GDB session is attached. Signed-off-by: Sarah Harris --- gdbstub.c | 5 + include/exec/gdbstub.h | 4 2 files changed, 9 insertions(+) diff --git a/gdbstub.c b/gdbstub.c index d54abd17cc..a254a364e6 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -1793,6 +1793,11