RISCV architecture supports an optional big endian mode of operation.
In this mode, data accesses are treated as big endian, while code is
always in little endian format. This is similar to how the ARM
architecture treats it's optional bi-endian support. This patch adds
support for big endian RISCV
Rory Bolt (1):
linux-user: add support for big endian variants of riscv
configs/targets/riscv64be-linux-user.mak| 7 +++
configure | 1 +
linux-user/elfload.c| 10 ++
linux-user/include/host/riscv/host-signal.h | 3