Hi Edger,
I'm going to look at the PCI parts and get back to you with
> comments on that.
>
> Please do, by the time, I'll address your and Eric's comments.
> I've put another round of comments inline:
>
> Thanks
> > +inline void
> > +smmu_write_sysmem(hwaddr addr, void *buf, int len, bool se
On Fri, Sep 23, 2016 at 6:40 PM, Auger Eric wrote:
> Hi Prem,
>
> On 12/09/2016 22:42, Prem Mallappa wrote:
> > On Fri, Sep 9, 2016 at 8:54 PM, Auger Eric
> wrote:
> >
> >> Hi Prem,
> >>
> >> On 22/08/2016 18:17, Prem Mallappa wrote:
> >&
On Fri, Sep 9, 2016 at 8:54 PM, Auger Eric wrote:
> Hi Prem,
>
> On 22/08/2016 18:17, Prem Mallappa wrote:
> > Added ACPI IORT tables, was needed for internal project purpose, but
> > posting here for anyone looking for testing ACPI on ARM platforms.
> > (P.S: Linu
On Fri, Sep 9, 2016 at 9:06 PM, Auger Eric wrote:
> Hi Prem,
>
> Missing commit message
>
> > Signed-off-by: Prem Mallappa
> > ---
> > include/qemu/log.h | 1 +
> > util/log.c | 2 ++
> > 2 files changed, 3 insertions(+)
> >
> >
q", "eventq", "cmdq-sync";
> >
> > This patch introduces helper function to add entries like above
> >
> > Signed-off-by: Prem Mallappa
> > ---
> > device_tree.c| 35 +++
> > include/sysemu
On Fri, Sep 9, 2016 at 10:01 PM, Auger Eric wrote:
> Hi Prem,
>
> > Default virt platform now creates SMMU device.
> > Default config to build SMMU device along is in previous patches.
> >
> > Signed-off-by: Prem Mallappa
> >
Oops, my mistake, copy-paste from different part.
I'll correct it in next spin.
Eric, you are most welcome to review though :)
On Thu, Sep 1, 2016 at 3:14 AM, Auger Eric wrote:
> Hi Prem,
> On 22/08/2016 18:17, Prem Mallappa wrote:
> > v1 -> v2:
> > - Adopted
Big patch adds SMMUv3 model to Qemu
- As per SMMUv3 spec 16.0
- Works with SMMUv3 driver in Linux 4.7rc1
- Only LPAE mode translation supported
- BE mode is not supported yet
- Stage1, Stage2 and S1+S2
- Suspend/resume not tested
Signed-off-by: Prem Mallappa
---
hw/arm/smmu-common.c
Added ACPI IORT tables, was needed for internal project purpose, but
posting here for anyone looking for testing ACPI on ARM platforms.
(P.S: Linux side IORT patches are WIP)
Signed-off-by: Prem Mallappa
---
hw/arm/virt-acpi-build.c| 43 +++
include/hw/acpi/acpi-defs.h
SMMUv3 needs device tree entry like below
interrupt-names = "gerror", "priq", "eventq", "cmdq-sync";
This patch introduces helper function to add entries like above
Signed-off-by: Prem Mallappa
---
device_tree.c| 35 +++
Signed-off-by: Prem Mallappa
---
include/qemu/log.h | 1 +
util/log.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/include/qemu/log.h b/include/qemu/log.h
index 234fa81..3dd2131 100644
--- a/include/qemu/log.h
+++ b/include/qemu/log.h
@@ -42,6 +42,7 @@ static inline bool
Current libqos PCI helpers are x86 only, this addes a generic interface.
Signed-off-by: Prem Mallappa
---
tests/libqos/pci-generic.c | 197 +
tests/libqos/pci-generic.h | 58 +
2 files changed, 255 insertions(+)
create mode 100644 tests
Default virt platform now creates SMMU device.
Default config to build SMMU device along is in previous patches.
Signed-off-by: Prem Mallappa
---
hw/arm/virt.c | 62 +++
include/hw/arm/smmu.h | 33 +++
include/hw
- initializes SMMU device
- initializes Test device
- allocates page tables 1:1 mapping va == pa
- allocates STE/CD accordingly for S1, S2, S1+S2
- initiates DMA via PCI test device
- verifies transfered data
Signed-off-by: Prem Mallappa
---
tests/Makefile.include | 4 +
tests/smmuv3
M platforms.
(P.S: Linux side IORT patches are WIP)
Repo:
https://github.com/pmallappa/qemu/tree/upstream/smmuv3/v2
To Test:
$ make tests/smmuv3-test
$ QTEST_QEMU_BINARY=aarch64-softmmu/qemu-system-aarch64 tests/smmuv3-test
<< expect lot of prints >>
Any comments welcome..
Che
A simple PCI device which does DMA from 'src' to 'dst' given
src_addr, dst_addr and size, and is used by unit test. uses
pci_dma_read and pci_dma_write in a crude way but serves the purpose.
Signed-off-by: Prem Mallappa
---
hw/misc/Makefile.objs | 2 +-
hw/misc/pci-
Signed-off-by: Prem Mallappa
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/Makefile.objs| 1 +
2 files changed, 2 insertions(+)
diff --git a/default-configs/aarch64-softmmu.mak
b/default-configs/aarch64-softmmu.mak
index 2449483..83a2932 100644
--- a/default-configs
Hi Edger,
>
> A few first pass comments inline
>
Thanks for review.
>> +typedef struct SMMUTransCfg {
>> +union {
>> +hwaddr va; /* Input to S1 */
>> +hwaddr ipa; /* Input to S2 */
>> +};
>
> I think we could just use va here.
>
Agreed
>> +u
- initializes SMMU device
- initializes Test device
- allocates page tables 1:1 mapping va == pa
- allocates STE/CD accordingly for S1, S2, S1+S2
- initiates DMA via PCI test device
- verifies transfered data
Signed-off-by: Prem Mallappa
---
tests/Makefile.include | 4 +
tests/smmuv3
A simple PCI device which does DMA from 'src' to 'dst' given
src_addr, dst_addr and size, and is used by unit test. uses
pci_dma_read and pci_dma_write in a crude way but serves the purpose.
Signed-off-by: Prem Mallappa
---
hw/misc/Makefile.objs | 2 +-
hw/misc/pci-
Default virt platform now creates SMMU device.
Default config to build SMMU device along is in previous patches.
Signed-off-by: Prem Mallappa
---
hw/arm/virt.c | 62 +++
include/hw/arm/smmu.h | 33 +++
include/hw
Added ACPI IORT tables, was needed for internal project purpose, but
posting here for anyone looking for testing ACPI on ARM platforms.
(P.S: Linux side IORT patches are WIP)
Signed-off-by: Prem Mallappa
---
hw/arm/virt-acpi-build.c| 43 +++
include/hw/acpi/acpi-defs.h
Current libqos PCI helpers are x86 only, this addes a generic interface.
Signed-off-by: Prem Mallappa
---
tests/libqos/pci-generic.c | 197 +
tests/libqos/pci-generic.h | 58 +
2 files changed, 255 insertions(+)
create mode 100644 tests
Signed-off-by: Prem Mallappa
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/Makefile.objs| 1 +
2 files changed, 2 insertions(+)
diff --git a/default-configs/aarch64-softmmu.mak
b/default-configs/aarch64-softmmu.mak
index 2449483..83a2932 100644
--- a/default-configs
SMMUv3 needs device tree entry like below
interrupt-names = "gerror", "priq", "eventq", "cmdq-sync";
This patch introduces helper function to add entries like above
Signed-off-by: Prem Mallappa
---
device_tree.c| 35 +++
Big patch adds SMMUv3 model to Qemu
- As per SMMUv3 spec 16.0
- Works with SMMUv3 driver in Linux 4.7rc1
- Only LPAE mode translation supported
- BE mode is not supported yet
- Stage1, Stage2 and S1+S2
- Suspend/resume not tested
Signed-off-by: Prem Mallappa
---
hw/arm/smmu-common.c
uv3-test
<< expect lot of prints >>
Any comments welcome..
Cheers
/Prem
Prem Mallappa (8):
hw: arm: SMMUv3 emulation model
hw: arm: Added SMMUv3 files for build
devicetree: Added new APIs to make use of more fdt functions
hw: arm: Add SMMUv3 to virt platform, create DTS accor
.
Thanks
On Mon, Apr 4, 2016 at 4:38 PM, Peter Maydell
wrote:
> On 17 February 2016 at 04:39, Prem Mallappa
> wrote:
> > Hi Peter,
> >
> > I have access till
> > "PRD03-GENC-010952 Version 11.0" updated 18/04/15.
> >
> > infocenter.arm.com has
I am not expecting any fundamental operation changes. However, I'll take a
look if theres a new version.
Cheers,
/Prem
On Tue, Feb 16, 2016 at 4:20 PM, Peter Maydell
wrote:
> On 11 January 2016 at 14:16, wrote:
> > From: Prem Mallappa
> >
> > Implementation Notes
On 10/25/2015 10:30 PM, Leonid Bloch wrote:
Hello qemu-devel,
This patch series is an RFC for the new networking device emulation
we're developing for QEMU.
Thanks for the patch
/Prem
Tested By: Prem Mallappa
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