On Wed, Feb 19, 2020 at 11:06:20AM -0300, Fabiano Rosas wrote:
> David Gibson writes:
>
> > When running guests under a hypervisor, the hypervisor obviously needs to
> > be protected from guest accesses even if those are in what the guest
> > considers real mode (translation off). The POWER hard
On Tue, Jan 07, 2020 at 06:36:38PM +0100, Greg Kurz wrote:
> On Tue, 7 Jan 2020 18:32:15 +0100
> Greg Kurz wrote:
>
> > On Tue, 7 Jan 2020 15:48:19 +1100
> > David Gibson wrote:
> >
> > > The PowerPC 970 CPU was a cut-down POWER4, which had hypervisor
> > > capability.
> > > However, it can b
uest will
receive an uncorrupted stream whether or not they have the workaround.
Fixes: 6c3bc244d3cb ("spapr: Implement bug in spapr-vty device to be compatible
with PowerVM")
Signed-off-by: Paul Mackerras
---
hw/char/spapr_vty.c | 30 --
1 file changed,
On Thu, Aug 24, 2017 at 02:02:43PM +1000, David Gibson wrote:
> On Thu, Aug 24, 2017 at 12:54:48PM +1000, Paul Mackerras wrote:
> > On Mon, Aug 21, 2017 at 05:00:36PM -0300, Thiago Jung Bauermann wrote:
> > > LoPAPR says:
> > >
> > > “ibm,processor-storage-
On Mon, Aug 21, 2017 at 05:00:36PM -0300, Thiago Jung Bauermann wrote:
> LoPAPR says:
>
> “ibm,processor-storage-keys”
>
> property name indicating the number of virtual storage keys supported
> by the processor described by this node.
>
> prop-encoded-array: Consists of two cell
On Thu, Feb 23, 2017 at 03:29:53PM +, Peter Maydell wrote:
> On 23 February 2017 at 15:21, Paolo Bonzini wrote:
> >
> >
> > On 23/02/2017 15:35, Peter Maydell wrote:
> >> On 23 February 2017 at 12:53, Paolo Bonzini wrote:
> >>>
> >>>
> >>> On 23/02/2017 13:26, Peter Maydell wrote:
> On 2
I thought it might help to explain some more of the background to Yong
Ji's recent patch "memory: make ram device read/write endian
sensitive". I don't know whether that patch touches the right code or
not, but with a bit more background, maybe somebody can tell us what
code does need to be fixed.
On Mon, Apr 04, 2016 at 09:09:28PM +1000, Anton Blanchard wrote:
> We don't support transactional memory in PR KVM, so don't tell
> the OS that we do.
This assumes PR KVM won't ever support TM, which is hopefully not
true. If PR KVM does get TM support in future, then QEMU will have no
clear way
On Thu, Jan 28, 2016 at 10:04:58PM +0100, Alexander Graf wrote:
>
> Does this work on real hardware? Say, a G5?
Do you mean, could a bare-metal kernel change its hashed page table?
It could - it would have to allocate a new table, copy over the bolted
mappings (at least), switch to real mode, cha
On Mon, Nov 16, 2015 at 10:01:25AM +0100, Thomas Huth wrote:
> On 16/11/15 04:50, Paul Mackerras wrote:
> > On Thu, Nov 12, 2015 at 09:09:59AM +0100, Thomas Huth wrote:
> >>
> >> Shouldn't you also check MSR_ME here first and enter checkstop when
> >> mac
On Thu, Nov 12, 2015 at 09:09:59AM +0100, Thomas Huth wrote:
>
> Shouldn't you also check MSR_ME here first and enter checkstop when
> machine checks are disabled?
MSR_ME is a hypervisor resource and is not able to be controlled by HV
KVM guests, or in fact by the OS running on the pseries machin
On Sun, Aug 09, 2015 at 03:53:02PM +0200, Alexander Graf wrote:
>
>
> On 07.08.15 05:37, Sam Bobroff wrote:
> > The RTAS call being discussed in this thread actually has two vectors to
> > patch
> > (System Reset and Machine Check), and the patches so far only address the
> > Machine Check part.
On Thu, Sep 03, 2015 at 03:05:21PM +1000, David Gibson wrote:
> On Thu, Sep 03, 2015 at 01:24:21PM +1000, Sam Bobroff wrote:
> > PAPR only says SPRGs 0 to 3 are for software use, but the kernel (see
> > arch/powerpc/include/asm/reg.h) defines SPRG2 as an exception scratch
> > register
> > so it sh
On Tue, Feb 03, 2015 at 05:10:51PM +1100, David Gibson wrote:
> qemu currently implements the hypercalls H_LOGICAL_CI_LOAD and
> H_LOGICAL_CI_STORE as PAPR extensions. These are used by the SLOF firmware
> for IO, because performing cache inhibited MMIO accesses with the MMU off
> (real mode) is v
On Thu, Dec 19, 2013 at 12:25:57PM +0530, Aneesh Kumar K.V wrote:
> Alexander Graf writes:
>
> > This breaks if you run a 64-bit guest on a 32-bit host trying to
> > access memory beyond 4GB. In that case htab_base is hwaddr (64bit)
> > while uint8_t is only 32bit wide.
>
> Wow!! didn't know tha
On Mon, Sep 30, 2013 at 01:25:32PM +0200, Alexander Graf wrote:
>
> On 27.09.2013, at 10:06, Alexey Kardashevskiy wrote:
>
> > To be able to boot on newer hardware that the software support,
> > PowerISA defines a logical PVR, one per every PowerISA specification
> > version from 2.04.
[snip]
> >
On Tue, Nov 05, 2013 at 10:06:04AM +0100, Paolo Bonzini wrote:
> Il 30/09/2013 14:57, Alexey Kardashevskiy ha scritto:
> >> > Why is the option under -machine instead of -cpu?
> > Because it is still the same CPU and the guest will still read the real
> > PVR from the hardware (which it may not sup
On Tue, Nov 05, 2013 at 05:16:33PM +0100, Andreas Färber wrote:
> Am 05.11.2013 07:05, schrieb Alexander Graf:
> >
> >
> > Am 05.11.2013 um 05:00 schrieb Paul Mackerras :
> >
> >> On Mon, Nov 04, 2013 at 10:05:58AM +0100, Alexander Graf wrote:
> >&
On Mon, Nov 04, 2013 at 10:05:58AM +0100, Alexander Graf wrote:
>
> Yeah, we really need to check that guest vpcu == host vcpu for HV KVM.
In general I agree, but the one difficulty I see is that a check for
exact equality will interact badly with qemu's habit of picking a
specific processor vers
On Thu, Sep 05, 2013 at 12:19:09PM +0200, Alexander Graf wrote:
>
> On 05.09.2013, at 12:16, Paul Mackerras wrote:
>
> > On Wed, Sep 04, 2013 at 04:32:20PM -0500, Anthony Liguori wrote:
> >> On Wed, Sep 4, 2013 at 8:37 AM, Alexander Graf wrote:
> >>>
>
On Wed, Sep 04, 2013 at 04:32:20PM -0500, Anthony Liguori wrote:
> On Wed, Sep 4, 2013 at 8:37 AM, Alexander Graf wrote:
> >
> >>
> >>> So IMHO this whole thing should be orthogonal to -cpu.
> >>
> >> Well, since we cannot change CPU class on the fly, yes, it should be a
> >> "compatibility" flags
On Thu, Aug 29, 2013 at 01:33:07PM +1000, Paul Mackerras wrote:
> On Wed, Aug 28, 2013 at 12:49:27PM +0200, Andreas Färber wrote:
>
> > According to the only reply I received, it's "POWER7", not "POWER7+" -
> > see my patch description. If that in
On Wed, Aug 28, 2013 at 12:49:27PM +0200, Andreas Färber wrote:
> According to the only reply I received, it's "POWER7", not "POWER7+" -
> see my patch description. If that information was wrong, we'll need to
> move POWER7P introduction before my fw_name patch and update it accordingly.
It shoul
On Fri, Aug 02, 2013 at 06:14:46PM +0200, Andreas Färber wrote:
> Am 02.08.2013 04:59, schrieb Alexey Kardashevskiy:
> > This patch adds CPU PVR definition for POWER7+.
> >
> > Signed-off-by: Alexey Kardashevskiy
> > ---
> > target-ppc/cpu-models.c | 2 ++
> > target-ppc/cpu-models.h | 1 +
> >
On Tue, May 21, 2013 at 09:39:53AM +0100, Daniel P. Berrange wrote:
> On Tue, May 21, 2013 at 09:31:26AM +0100, Peter Maydell wrote:
> > On 21 May 2013 09:19, Li Zhang wrote:
> > > We encounter this problem in openstack which always use
> > > default machine type. Currently, QEMU sets mac99 as def
On Wed, Jul 25, 2012 at 08:53:06AM -0600, Alex Williamson wrote:
> Hi Linus,
>
> This series includes the VFIO userspace driver interface for the
> 3.6 kernel merge window. This driver is intended to provide a
> secure interface for device access using IOMMU protection for
> applications like ass
Is anyone working on adding support for the set/get_thread_area system
calls in qemu for the i386-user target? NPTL will need that, and I
guess the futex system call too.
In linux-user/syscall.c, it seems like the target doing a clone system
call with CLONE_VM results in the emulator doing a clon
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