Re: [PATCH] RISC-V: Increase max vlen to 4096

Hi Phil, On 11/23/23 02:21, Philippe Mathieu-Daudé wrote: Hi Patrick, On 23/11/23 01:17, Patrick O'Neill wrote: QEMU currently limits the max vlenb to 1024. GCC sets the upper bound to 4096 [1]. There doesn't seem to be an upper bound set by the spec [2] so this patch just chang

[PATCH] RISC-V: Increase max vlen to 4096

4de7ee/gcc/testsuite/gcc.target/riscv/rvv/base/zvl-unimplemented-2.c#L4 [2] https://github.com/riscv/riscv-v-spec/issues/204 Signed-off-by: Patrick O'Neill --- Tested by applying to QEMU v8.1.2 and running the GCC testsuite in QEMU user mode with rv64gcv_zvl4096b. Failures are somewhat reasonab