On Mon, Jul 21, 2025 at 1:01 PM Manos Pitsidianakis
wrote:
>
> Hi Paolo,
>
> On Mon, Jul 21, 2025 at 1:53 PM Paolo Bonzini wrote:
> >
> > This is only cosmetic for now, but hopefully later on Meson will parse more
> > of Cargo.toml. Devices are linked into a st
This is only cosmetic for now, but hopefully later on Meson will parse more
of Cargo.toml. Devices are linked into a staticlib but are not staticlibs
themselves.
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/Cargo.toml | 3 ---
rust/hw/timer/hpet/Cargo.toml | 3 ---
2 files changed, 6
On 7/18/25 11:12, Manos Pitsidianakis wrote:
Add a CLI argument that takes fnmatch(3)-style patterns as value and can
be specified many times. Only tests that match the pattern will be
executed. This argument is passed to unittest.main which takes the same
argument.
Signed-off-by: Manos Pitsidia
On 7/18/25 09:21, Michael Tokarev wrote:
On 17.07.2025 18:23, Paolo Bonzini wrote:
KVM emulates the ARCH_CAPABILITIES on x86 for both Intel and AMD
cpus, although the IA32_ARCH_CAPABILITIES MSR is an Intel-specific
MSR and it makes no sense to emulate it on AMD.
As a consequence, VMs created
Queued, thanks. But for 10.2 maybe we could alternate in preparing pull
requests? We'll see.
Paolo
https://lore.kernel.org/r/20250717131256.157383-1-sgarz...@redhat.com
Signed-off-by: Paolo Bonzini
---
scripts/meson-buildoptions.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/meson-buildoptions.sh b/scripts/meson-buildoptions.sh
index e8504689e80..0ebe6bc52a6 1
Take tdx_guest->lock when injecting the event notification interrupt into
the guest.
Fixes CID 1612364.
Reported-by: Peter Maydell
Cc: Xiaoyao Li
Reviewed-by: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx.c | 10 +++---
1 file changed, 7 insertions(+), 3 deleti
n-buildoptions.sh
--------
Paolo Bonzini (2):
target/i386: do not expose ARCH_CAPABILITIES on AMD CPU
target/i386: tdx: fix locking for interrupt injection
Stefano Garzarella (1):
meson: re-generate scripts/meson-buildoptions.sh to fix IGVM ent
ned-off-by: Xiaoyao Li
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20250716063117.602050-1-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/host-cpu.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/i386/host-cpu.h b/target
Signed-off-by: Xiaoyao Li
Reviewed-by: Daniel P. Berrangé
Link: https://lore.kernel.org/r/20250717103707.688929-1-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
ind
u_instance_init to
.instance_init")
Reported-by: Paolo Abeni
Tested-by: Paolo Abeni
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250717023933.2502109-1-zhao1@intel.com
Reviewed-by: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 22 +++
Reviewed-by: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/kvm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index e8c8be09bae..369626f8c8d 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -
ned-off-by: Xiaoyao Li
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20250716063117.602050-1-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/host-cpu.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/i386/host-cpu.h b/target
Signed-off-by: Xiaoyao Li
Reviewed-by: Daniel P. Berrangé
Link: https://lore.kernel.org/r/20250717103707.688929-1-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
ind
n-buildoptions.sh
--------
Paolo Bonzini (2):
target/i386: do not expose ARCH_CAPABILITIES on AMD CPU
target/i386: tdx: fix locking for interrupt injection
Stefano Garzarella (1):
meson: re-generate scripts/meson-buildoptions.sh to fix IGVM ent
u_instance_init to
.instance_init")
Reported-by: Paolo Abeni
Tested-by: Paolo Abeni
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250717023933.2502109-1-zhao1@intel.com
Reviewed-by: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 22 +++
https://lore.kernel.org/r/20250717131256.157383-1-sgarz...@redhat.com
Signed-off-by: Paolo Bonzini
---
scripts/meson-buildoptions.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/meson-buildoptions.sh b/scripts/meson-buildoptions.sh
index e8504689e80..0ebe6bc52a6 1
Take tdx_guest->lock when injecting the event notification interrupt into
the guest.
Fixes CID 1612364.
Reported-by: Peter Maydell
Cc: Xiaoyao Li
Reviewed-by: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx.c | 10 +++---
1 file changed, 7 insertions(+), 3 deleti
Reviewed-by: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/kvm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index e8c8be09bae..369626f8c8d 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -
Queued, thanks.
Paolo
Queued, thanks.
Paolo
Queued, thanks.
Paolo
Il gio 17 lug 2025, 11:18 Manos Pitsidianakis <
manos.pitsidiana...@linaro.org> ha scritto:
> Looks OK to me but are we sure it's necessary? This dependency is just
> a syn::parse wrapper under the hood. Even serde's derive macros use
> syn directly:
> https://github.com/serde-rs/serde/blob/babafa
Take tdx_guest->lock when injecting the event notification interrupt into
the guest.
Fixes CID 1612364.
Reported-by: Peter Maydell
Cc: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/target/i
e this is not a problematic breakage.
If a future AMD machine does include the MSR, that would re-expose the
Windows guest bug; but it would not be KVM/QEMU's problem at that
point, as we'd be following a genuine physical CPU impl.
Reported-by: Alexandre Chartre
Suggested-by: Daniel P. Berra
Queued, thanks.
Paolo
attrs is a simple crate that provides parser combinators for
attribute arguments. Use it instead of a handwritten parser,
and adjust tests.
Signed-off-by: Paolo Bonzini
---
rust/qemu-api-macros/src/lib.rs | 84 +++
rust/qemu-api-macros/src/tests.rs | 8 +--
2
Signed-off-by: Paolo Bonzini
---
rust/qemu-api-macros/src/tests.rs | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/rust/qemu-api-macros/src/tests.rs
b/rust/qemu-api-macros/src/tests.rs
index 4fbff97bffb..0e5a5728908 100644
--- a/rust/qemu-api-macros/src/tests.rs
+++ b
Update to a version that is accepted by the attrs crate.
Signed-off-by: Paolo Bonzini
---
rust/Cargo.lock | 8
subprojects/.gitignore| 4 ++--
subprojects/packagefiles/proc-macro2-1-rs/meson.build | 2 +-
subprojects
The attrs crate is a simple combinator-based parser for Rust attributes.
It will be used instead of a handwritten parser.
Signed-off-by: Paolo Bonzini
---
rust/Cargo.lock | 11 +++
rust/meson.build | 2 ++
rust/qemu-api-macros
to lower
his crate's minimum supported Rust version to 1.83.
Paolo
Paolo Bonzini (4):
subprojects: update proc-macro2 and syn
subprojects: add attrs crate
rust: qemu-api-macros: support matching more than one error
rust: qemu-api-macros: switch #[property] parsing to use combin
On Wed, Jul 16, 2025 at 5:26 PM Paolo Abeni wrote:
> On 7/16/25 5:22 PM, Paolo Bonzini wrote:
> > On 7/16/25 16:44, Paolo Abeni wrote:
> >> I'm observing boot failure for a rhel-9.7 VM. I'm using qemu git tree at
> >> commit c079d3a31e.
> >
> > N
On 7/16/25 16:44, Paolo Abeni wrote:
Hi,
I'm observing boot failure for a rhel-9.7 VM. I'm using qemu git tree at
commit c079d3a31e.
No and I cannot reproduce it.
What host is it (processor) and kernel version?
Paolo
it core dumps with the following error:
qemu-system-x86_64: ../target/i3
While I have generally given a three months cadence to the update,
this one is a bit early---mostly due to the upcoming freeze, and
many subprojects having reached a point where an update is useful.
Summary
'''
Achievements
Almost full safety for device code; logging and initial work on t
g
> some parameters into a new type.
>
> Specifically:
>
> error: this function has too many arguments (8/7)
> -->
> /builds/mstredhat/qemu/build/rust/qemu-api/rust-qemu-api-tests.p/structured/bindings.inc.rs:3840
> :5
>
Acked-by: Paolo Bonzini
|
&g
eviewed-by: Stefano Garzarella
Reviewed-by: Ani Sinha
Link:
https://lore.kernel.org/r/2eca2611d372facbffa65ee8244cf2d321eb9d17.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
docs/interop/firmware.json | 30 --
1 file changed, 28 insertions(+), 2
rg/qemu-devel/478b65c8.2080...@csgraf.de/
Cc: Alexander Graf
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-5-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 7 +++
hw/i386/pc.c | 4 +++-
target/i386/cpu.c | 7 +++
From: Zhao Liu
Host YongFeng CPU has 0x1f leaf by default, so that enable it for
Guest CPU by default as well.
Suggested-by: Ewan Hai
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711104603.1634832-10-zhao1@intel.com
Signed-off-by: Paolo Bonzini
From: Xiaoyao Li
There are code using "env->cpuid_vendor1 == CPUID_VENDOR_INTEL_1" to
check if it is Intel vcpu. Cleanup them to just use IS_INTEL_CPU()
Signed-off-by: Xiaoyao Li
Link: https://lore.kernel.org/r/20250630080610.3151956-3-xiaoyao...@intel.com
Signed-off-by:
on the vendor.
Reviewed-by: Dapeng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-14-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 1 +
target/i386/cpu.c | 47 +--
2 file
lue written to
EBX[23:16] to 255 as the HW does.
Cc: qemu-sta...@nongnu.org
Reviewed-by: Xiaoyao Li
Signed-off-by: Qian Wen
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250714080859.1960104-6-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 9 +++--
1 f
i Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-18-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
/b2f986aae04e1da2aee530c9be22a54c0c59a560.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
backends/igvm.h | 2 +-
include/system/igvm-cfg.h | 5 +-
backends/igvm.c | 17 +++-
hw/i386/pc_piix.c | 2 +-
hw/i386/pc_q35.c | 2 +-
target/i386/sev.c | 161
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250714080859.1960104-7-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 608fdcf7578
From: Zhao Liu
Sort the CPUID leaves strictly by index to facilitate checking and
changing.
Signed-off-by: Zhao Liu
Reviewed-by: Tao Su
Link: https://lore.kernel.org/r/20250627035129.2755537-5-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 60
Liu
Link: https://lore.kernel.org/r/20250711104603.1634832-5-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 104 ++
1 file changed, 104 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index b3b29f69666
y: Guixiong Wei
Signed-off-by: Yipeng Yin
Signed-off-by: Chuang Xu
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250714080859.1960104-5-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
dif
or.
Reviewed-by: Dapeng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-15-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 43 ++-
1 file changed, 34 insertions(+), 9 delet
Tests that require machines older than 4.2 are now unconditionally skipped.
Remove them if they test legacy behavior, or use the latest machine if
they test current behavior.
Signed-off-by: Paolo Bonzini
---
.../functional/test_x86_cpu_model_versions.py | 110 ++
1 file changed
/20250630080610.3151956-2-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 3 ++-
target/i386/cpu.c | 8
target/i386/host-cpu.c | 1 -
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9829824ac89..b3bb9888579 100644
ff-by: Roy Hopkins
Acked-by: Michael S. Tsirkin
Acked-by: Stefano Garzarella
Acked-by: Gerd Hoffman
Reviewed-by: Ani Sinha
Link:
https://lore.kernel.org/r/57707230bef331b53e9366ce6a23ed25cd6f1293.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
backends/ig
From: Xiaoyao Li
It's more proper to put is_host_cpu_intel() in host-cpu.c instead of
vmsr_energy.c.
Signed-off-by: Xiaoyao Li
Link: https://lore.kernel.org/r/20250701075738.3451873-3-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/host-cpu.h| 1 +
target/i38
-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250714080859.1960104-3-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 533c9d9abc7..1a2cae6ea1f 100644
--- a
he actual measurements and the
signatures are valid.
Signed-off-by: Roy Hopkins
Acked-by: Michael S. Tsirkin
Acked-by: Stefano Garzarella
Acked-by: Gerd Hoffman
Reviewed-by: Ani Sinha
Link:
https://lore.kernel.org/r/99e82ddec4ad2970c790db8bea16ea3f57eb0e53.1751554099.git.roy.hopk...@random
r TDX.
Signed-off-by: Xiaoyao Li
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20250625035710.2770679-1-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
Babu Moger
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250714080859.1960104-8-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index fdc677614d8..d
-off-by: Paolo Bonzini
---
target/i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 668f3e63b7b..c15082e8afa 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5393,6 +5393,7 @@ static const X86CPUDefinition builtin_x86_defs
to
handle compatibility later.
Reviewed-by: Dapeng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-13-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 112 ++
1 file changed
Signed-off-by: Paolo Bonzini
---
target/i386/sev.h | 110
target/i386/sev.c | 326 +-
2 files changed, 401 insertions(+), 35 deletions(-)
diff --git a/target/i386/sev.h b/target/i386/sev.h
index 373669eaace..38caa849f5e 100644
--- a/target
Link:
https://lore.kernel.org/r/7145835f729e6195f2fbda308aa90e089a96ae6e.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
target/i386/sev.h | 2 +
target/i386/sev.c | 254 --
2 files changed, 246 insertions(+), 10 deletions
ted-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711104603.1634832-2-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 96 +++
1 file changed, 96 insertions(+)
diff --git a/target/i386/cpu.c b/target/
..@zhaoxin.com/
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-9-zhao1....@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/t
zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index ae508fa962d..533c9d9abc7 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8376,7 +8376,11 @@ void cpu_x86_
in X86CPUState, a unified cache_info is
enough. It only needs to be initialized and configured with the
corresponding legacy cache model based on the vendor.
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-17-zhao1@intel.com
Signed-off-by:
40da501d8989 ("i386/tdx: handle TDG.VP.VMCALL")
Signed-off-by: Xiaoyao Li
Reviewed-by: Zhao Liu
Link: https://lore.kernel.org/r/20250625035505.2770580-1-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx-quote-generator.c | 4 +++-
1 file changed, 3 insertions(+)
applied
for Intel CPUs..
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-10-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/i386
v2 should be initernal only, QEMU doesn't
support "internal" property. To avoid any other unexpected issues, check
the dependency.
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-8-zhao1@intel.com
Signed-off-by: Paolo Bonzini
--
Reviewed-by: Stefano Garzarella
Reviewed-by: Ani Sinha
Link:
https://lore.kernel.org/r/23bc66ae4504ba5cf2134826e055b25df3fc9cd9.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
include/hw/i386/x86.h | 3 +++
hw/i386/pc.c | 12
hw/i386/pc_piix.c
ility")
Signed-off-by: Zhenzhong Duan
Reviewed-by: Daniel P. Berrangé
Link: https://lore.kernel.org/r/20250710035538.303136-1-zhenzhong.d...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/i386
unified cache_info in X86CPUState, and during its initialization, set
different legacy cache models based on the vendor.
Reviewed-by: Dapeng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-19-zhao1@intel.com
Signed-off-by: Paolo Bonzini
implementations.
Signed-off-by: Roy Hopkins
Acked-by: Michael S. Tsirkin
Acked-by: Gerd Hoffman
Reviewed-by: Stefano Garzarella
Reviewed-by: Ani Sinha
Link:
https://lore.kernel.org/r/23e34a106da87427899f93178102e4a6ef50c966.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
ng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-7-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 3 ++-
target/i386/cpu.c | 31 +++
2 files changed, 13 insertions(+), 21 deletions(-)
diff
1102143.1622339-16-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 35 ---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 565eaf0071c..e98ffb11c31 100644
--- a/target/i386/cpu.c
+++ b/targ
From: Xiaoyao Li
The indentation of one of the } inside kvm_cpu_realizefn() isn'f
correct. fix it.
Signed-off-by: Xiaoyao Li
Link: https://lore.kernel.org/r/20250630080610.3151956-4-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/kvm-cpu.c | 2 +-
1 file chang
Signed-off-by: Paolo Bonzini
---
tests/vm/freebsd | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/vm/freebsd b/tests/vm/freebsd
index 74b3b1e520a..2e96c9eba52 100755
--- a/tests/vm/freebsd
+++ b/tests/vm/freebsd
@@ -28,8 +28,8 @@ class FreeBSDVM(basevm.BaseVM
tly encode 0xFF in 0x2 leaf. This
makes sense, as in the 0x2 leaf era, all supported caches should have
the corresponding descriptor.
Reviewed-by: Dapeng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-6-zhao1@intel.com
Signed-off-by
...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
backends/igvm.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/backends/igvm.c b/backends/igvm.c
index 2a31021d449..ebdb4594d10 100644
--- a/backends/igvm.c
+++ b/backends/igvm.c
@@ -786,6 +786,27 @@ int qigvm_process_file
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-11-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 8a97272b4a
NVMM and WHPX are virtualizers, and therefore they need to use
(at least by default) the host vendor for the guest CPUID.
Add a cpu_instance_init implementation to these accelerators.
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 3 ++-
target/i386/nvmm/nvmm-all.c | 25
Reviewed-by: Tao Su
Link: https://lore.kernel.org/r/20250627035129.2755537-2-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 4f0c9734461..ae508fa962d
compatibility later.
Reviewed-by: Dapeng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-12-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 101 +-
1 file changed, 54
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711104603.1634832-3-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 96 +++
1 file changed, 96 insertions(+)
diff --git a/target/i386/cpu.c b/target/
-off-by: Paolo Bonzini
---
target/i386/cpu.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 482979a4437..668f3e63b7b 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5389,8 +5389,11 @@ static const X86CPUDefinition
rnel.org/r/d59721f7b99cfc87aab71f8f551937e98e983615.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
target/i386/sev.c | 68 +++
1 file changed, 33 insertions(+), 35 deletions(-)
diff --git a/target/i386/sev.c b/target/i386/sev.c
index 1a12f0671cc..a84f5f5d
From: Xiaoyao Li
To fetch the update of TDX
Signed-off-by: Xiaoyao Li
Link: https://lore.kernel.org/r/20250703024021.3559286-3-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
linux-headers/asm-x86/kvm.h | 8 +++-
linux-headers/linux/kvm.h | 4
2 files changed, 11 insertions
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index a11e9bb1117..216e0232df4 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5081,8 +5081,12 @@ static const X86CPUDefinition
by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711104603.1634832-4-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 96 +++
1 file changed, 96 insertions(+)
diff --git a/target/i386/cpu.c b/target/
Reviewed-by: Stefano Garzarella
Reviewed-by: Pankaj Gupta
Acked-by: Michael S. Tsirkin
Acked-by: Gerd Hoffman
Reviewed-by: Ani Sinha
Link:
https://lore.kernel.org/r/b4dc920a30717e19cd79bbbe2cc769f3b9ff3d37.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
docs
pentium2" and
"pentium3") won't be used for migration, there's no need to add new
versioned CPU models
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-4-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cp
This makes it possible to lock the log file; it also makes log_mask_ln!
not allocate memory when logging a constant string.
Reviewed-by: Zhao Liu
Reviewed-by: Manos Pitsidianakis
Signed-off-by: Paolo Bonzini
---
include/qemu/log.h | 2 +
util/log.c | 12 ++
rust/qemu
D leaf 1, with the correct calculation
formula.
Signed-off-by: Xiaoyao Li
Link: https://lore.kernel.org/r/20250630080610.3151956-5-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 30 ++
target/i386/cpu.c | 12
target/i386/ho
orce-cpuid-0x1f" property
Manos Pitsidianakis (4):
rust/qemu-api-macros: use syn::Error directly
rust/bindings: allow unnecessary_transmutes (1.88)
rust/qemu-api-macros: normalize TryInto output
rust/qemu-api-macros: add unit tests
Paolo Bonzini (8):
rust/qemu-ap
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c15082e8afa..a11e9bb1117 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5239,8 +5239,12 @@ static const X86CPUDefinition
d-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711104603.1634832-6-zhao1@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 40f3b5eac88..482979a4437 100644
--- a/target/i386/cpu.c
igned-off-by: Paolo Bonzini
---
target/i386/cpu.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index f107e586734..4386b60ff6c 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -129,7 +129,18 @@ s
Hopkins
Acked-by: Michael S. Tsirkin
Acked-by: Gerd Hoffman
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Stefano Garzarella
Reviewed-by: Ani Sinha
Link:
https://lore.kernel.org/r/45945a83a638c3f08e68c025f378e7b7f4f6d593.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
From: Zhao Liu
Refer to SDM vol.3 table 1-21, add the notes about the missing
descriptor, and fix the typo and comment format.
Reviewed-by: Dapeng Mi
Tested-by: Yi Lai
Signed-off-by: Zhao Liu
Link: https://lore.kernel.org/r/20250711102143.1622339-2-zhao1@intel.com
Signed-off-by: Paolo
/20250703024021.3559286-5-xiaoyao...@intel.com
Signed-off-by: Paolo Bonzini
---
target/i386/kvm/tdx.h | 7 ++
target/i386/kvm/kvm.c | 3 +++
target/i386/kvm/tdx-stub.c | 4
target/i386/kvm/tdx.c | 48 +-
4 files changed, 61 insertions(+), 1
: Michael S. Tsirkin
Acked-by: Gerd Hoffman
Reviewed-by: Stefano Garzarella
Link:
https://lore.kernel.org/r/ae3a07d8f514d93845a9c16bb155c847cb567b0d.1751554099.git.roy.hopk...@randomman.co.uk
Signed-off-by: Paolo Bonzini
---
qapi/qom.json | 17 +
backends/igvm.h | 22
: Xiaoyao Li
Reviewed-by: Zhao Liu
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 24
target/i386/kvm/kvm-cpu.c | 2 ++
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 8fb74b56ddd..9c5cef2c7cc
1 - 100 of 25182 matches
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