[PATCH v2 2/3] hw/arm/stm32f100: Add DMA support for stm32f100

From: Nikita Shubin Add STM32 DMA support for stm32f100 SoC. Signals from periphery to DMA are not connected, as no STM32 periphery currently supports DMA. Signed-off-by: Nikita Shubin --- hw/arm/Kconfig | 1 + hw/arm/stm32f100_soc.c | 51

[PATCH v2 1/3] hw/dma: Add STM32 platfrom DMA controller emulation

From: Nikita Shubin STMicroelectronics STM32 SoCs integrate DMA engine that supports: * Independent concurrent DMA transfers using 7/5 DMA channels * Generation of interrupts on various conditions during execution * PERIPH to MEMORY transactions, invoked by peripheral device models * MEMORY to

[PATCH v2 0/3] Add STM32 DMA model

From: Nikita Shubin Add STM32 DMA model and include it in STM32F100 SoC. The model is fully compatible with GD32F303x DMA. To: qemu-devel@nongnu.org Cc: Paolo Bonzini Cc: Alistair Francis Cc: Peter Maydell Cc: qemu-...@nongnu.org Cc: Alexandre Iooss Cc: Fabiano Rosas Cc: Laurent Vivier

[PATCH v2 3/3] tests/qtest: add qtests for STM32 DMA

From: Nikita Shubin Signed-off-by: Nikita Shubin --- tests/qtest/meson.build | 1 + tests/qtest/stm32-dma-test.c | 421 +++ 2 files changed, 422 insertions(+) create mode 100644 tests/qtest/stm32-dma-test.c diff --git a/tests/qtest/meson.build b/tests

[PATCH PoC 3/7] gpiodev: Add GPIO device frontend

From: Nikita Shubin Add GPIO device front end with helper functions to provide information about GPIO Port to Backends and to allow Frontend to set data. To use it GPIO device should register with qemu_gpio_fe_init() and provide handlers with qemu_gpio_fe_set_handlers(). Notifications about

[PATCH 0/3] Add STM32 DMA model

From: Nikita Shubin Add STM32 DMA model and include it in STM32F100 SoC. The model is fully compatible with GD32F30x DMA. To: qemu-devel@nongnu.org Cc: Paolo Bonzini Cc: Alistair Francis Cc: Peter Maydell Cc: qemu-...@nongnu.org Cc: Alexandre Iooss Cc: Fabiano Rosas Cc: Laurent Vivier Cc

[PATCH 1/3] hw/dma: Add STM32 platfrom DMA controller emulation

From: Nikita Shubin STMicroelectronics STM32 SoCs integrate DMA engine that supports: * Independent concurrent DMA transfers using 7/5 DMA channels * Generation of interrupts on various conditions during execution * PERIPH to MEMORY transactions, invoked by peripheral device models * MEMORY to

[PATCH 3/3] tests/qtest: add qtests for STM32 DMA

From: Nikita Shubin Signed-off-by: Nikita Shubin --- tests/qtest/meson.build | 1 + tests/qtest/stm32-dma-test.c | 415 +++ 2 files changed, 416 insertions(+) create mode 100644 tests/qtest/stm32-dma-test.c diff --git a/tests/qtest/meson.build b/tests

[PATCH 2/3] hw/arm/stm32f100: Add DMA support for stm32f100

From: Nikita Shubin Add STM32 DMA support for stm32f100 SoC. Signals from periphery to DMA are not connected, as no STM32 periphery currently supports DMA. Signed-off-by: Nikita Shubin --- hw/arm/Kconfig | 1 + hw/arm/stm32f100_soc.c | 51

[PATCH PoC 0/7] Interact with QEMU GPIO models via gpiodev

ing we can get from it is monitoring lines set by QEMU guest. So i didn't bother implementing it yet. I prepare a suite with whing nessary if someone wants to test/tinker with current series: Link: git://git.maquefel.me/qemu-gpiodev/qemu-guse-suite.git Signed-off-by: Nikita Shubin --- Nikit

[PATCH PoC 7/7] gpiodev: Add gpiobackend over GUSE

From: Nikita Shubin Add GUSE (FUSE based kernel module similiar to CUSE) based backend. This allows transparent usage of Linux GPIO UAPI based tools like in kernel tools/gpio or libgpiod. libgpiod requires some modification to allow "/sys/class/guse" in gpiod_check_gpiochip_dev

[PATCH PoC 1/7] QAPI: gpio JSON

From: Nikita Shubin Signed-off-by: Nikita Shubin --- qapi/gpio.json| 68 +++ qapi/meson.build | 1 + qapi/qapi-schema.json | 1 + 3 files changed, 70 insertions(+) diff --git a/qapi/gpio.json b/qapi/gpio.json new file mode 100644

[PATCH PoC 4/7] gpiodev: Add GPIO backend over chardev

From: Nikita Shubin Currently based on passing linux GPIO UAPI structs over UNIX socket. This is more a PoC than a real application, still this is something to start with. Signed-off-by: Nikita Shubin --- gpiodev/gpio-chardev.c | 479 + gpiodev

[PATCH PoC 5/7] hw/gpio/aspeed: Add gpiodev support

From: Nikita Shubin Add gpiodev support for: - getting line info - getting/setting lines - monitoring line events - monitoting config events Binding is done via id, i.e.: ... -gpiodev chardev,id=aspeed-gpio0 Signed-off-by: Nikita Shubin --- hw/gpio/aspeed_gpio.c | 127

[PATCH PoC 2/7] Add gpiodev dummy

From: Nikita Shubin Add gpiodev stub with single help option. Signed-off-by: Nikita Shubin --- gpiodev/gpio.c | 145 + gpiodev/meson.build| 5 ++ include/gpiodev/gpio.h | 34 meson.build| 11 +++- qemu

[PATCH PoC 6/7] hw/arm: ast2600: set id for gpio

From: Nikita Shubin Set device id for gpios to allow gpiodev binding. Signed-off-by: Nikita Shubin --- hw/arm/aspeed_ast2600.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 07210483bb29a50824c8312021bebf1ca32cac95

[PATCH] system: fix assertion when cannot get/set rlimit

If cannot get/set rlinit warn_print called, which uses monitor_lock mutex. monitor_lock mutex initialized in monitor_init_globals, then monitor_init_globals should be called before os_setup_limits. Signed-off-by: Nikita Ostrenkov --- system/runstate.c | 1 - system/vl.c | 2 ++ 2 files

[PATCH v2] hw/char: stm32f2xx_usart: replace print with trace

From: Nikita Shubin Drop debug printing macros and replace them with according trace functions. Signed-off-by: Nikita Shubin --- v1->v2: Phil: - fix typo s/recieve/receive/ - initialize 'retvalue' with zero --- hw/char/stm32f2xx_usart.c | 49 ++-

[PATCH] hw/char: stm32f2xx_usart: replace print with trace

From: Nikita Shubin Drop debug printing macros and replace them with according trace functions. Signed-off-by: Nikita Shubin --- hw/char/stm32f2xx_usart.c | 47 ++- hw/char/trace-events | 6 + 2 files changed, 28 insertions(+), 25 deletions

Re: [PATCH v17 00/16] TCG code quality tracking

ope for another spin ? Especially with graphs, which are missing in latest series. --- Yours, Nikita Shubin

[PATCH] hw/block: m25p80: support RDID_90 for Winbond

From: Nikita Shubin Make Winbond support RDID_90 as all winbond SPI NOR Flashes support Read Manufacturer/Device ID (90h) command. Signed-off-by: Nikita Shubin --- hw/block/m25p80.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index

[PATCH v2 2/2] hw/sparc/leon3: add second uart with extended interrupt usage

Signed-off-by: Nikita Shushura --- hw/sparc/leon3.c | 63 +++- 1 file changed, 46 insertions(+), 17 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 6aaa04cb19..c559854e5e 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c

[PATCH v2 1/2] hw/intc/grlib_irqmp: add support for extended interrupts

Signed-off-by: Nikita Shushura --- hw/intc/grlib_irqmp.c | 69 +++ 1 file changed, 50 insertions(+), 19 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 37ac63fd80..e9414c054a 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc

[PATCH 2/2] hw/sparc/leon3: add second uart with extended interrupt usage

Signed-off-by: Nikita Shushura --- hw/sparc/leon3.c | 63 +++- 1 file changed, 46 insertions(+), 17 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 6aaa04cb19..c559854e5e 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c

[PATCH 1/2] hw/intc/grlib_irqmp: add support for extended interrupts

--- hw/intc/grlib_irqmp.c | 68 +++ 1 file changed, 49 insertions(+), 19 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 37ac63fd80..2fd76dd1b4 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -1,8 +1,6 @@ /*

Re: [PATCH 1/2] hw/intc/grlib_irqmp: add support for extended interrupts

Forgot to add 'Signed-off-by', so can be deleted. Sent with Proton Mail secure email. On Saturday, September 21st, 2024 at 1:48 AM, Nikita Shushura wrote: > --- > hw/intc/grlib_irqmp.c | 68 +++ > 1 file changed, 49 insertio

Re: [PATCH 2/2] hw/sparc/leon3: add second uart with extended interrupt usage

Forgot to add 'Signed-off-by', so can be deleted. Sent with Proton Mail secure email. On Saturday, September 21st, 2024 at 1:48 AM, Nikita Shushura wrote: > --- > hw/sparc/leon3.c | 63 +++- > 1 file changed, 46 insertio

[PATCH 2/2] hw/sparc/leon3: add second uart with extended interrupt usage

--- hw/sparc/leon3.c | 63 +++- 1 file changed, 46 insertions(+), 17 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 6aaa04cb19..c559854e5e 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -54,10 +54,14 @@ #define LEON3_PROM_

[PATCH 1/2] hw/intc/grlib_irqmp: add support for extended interrupts

Signed-off-by: Nikita Shushura --- hw/intc/grlib_irqmp.c | 68 +++ 1 file changed, 49 insertions(+), 19 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 37ac63fd80..2fd76dd1b4 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc

[PATCH] hw/char/riscv_htif: Fix 64-bit var write order in 32-bit system

) because of machine instructions order swapping. That causes wrong behaviour of HTIF device. This patch is removing dependency of writing order, so the device will work correctly regardless of compilers. Signed-off-by: Nikita Novikov --- hw/char/riscv_htif.c | 43

[PATCH] hw/char/riscv_htif: Fix 64-bit var write order in 32-bit system

) because of machine instructions order swapping. That causes wrong behaviour of HTIF device. This patch is removing dependency of writing order, so the device will work correctly regardless of compilers. Signed-off-by: Nikita Novikov --- hw/char/riscv_htif.c | 43

[PATCH] hw/dma: Add Intel I/OAT DMA controller emulation

From: Nikita Shubin Add a memcpy only model of I/OAT DMA found on some Xeon based motherboards. Signed-off-by: Nikita Shubin --- Changes from RFC: - replaced all read()/write() with pci_dma_read/write() Link: https://patchwork.kernel.org/project/qemu-devel/patch/20240524114547.28801-1

[RFC PATCH] hw/dma: Add Intel I/OAT DMA controller emulation

From: Nikita Shubin Add a memcpy only model of I/OAT DMA found on some Xeon based motherboards. Signed-off-by: Nikita Shubin --- Started as complementary device for a driver that can't get working without any DMA. So it's worth (at least) mentioning it on mail lists. Tested

Re: [PATCH v3] hw/usb: fix xhci port notify

(+Michael) ping https://patchew.org/QEMU/20231117173916.3658-1-n.ostren...@gmail.com/ чт, 25 янв. 2024 г. в 23:06, Nikita Ostrenkov : > ping > https://patchew.org/QEMU/20231117173916.3658-1-n.ostren...@gmail.com/ > > пн, 18 дек. 2023 г., 13:40 Nikita Ostrenkov : > >> ping &

Re: [PATCH v2] hw/arm: add PCIe to Freescale i.MX6

Ping https://patchew.org/QEMU/20240108140325.1291-1-n.ostren...@gmail.com/ пн, 8 янв. 2024 г., 17:03 Nikita Ostrenkov : > Signed-off-by: Nikita Ostrenkov > --- > hw/arm/Kconfig| 2 ++ > hw/arm/fsl-imx6.c | 25 ++ > include/hw/arm/

Re: [PATCH v3] hw/usb: fix xhci port notify

ping https://patchew.org/QEMU/20231117173916.3658-1-n.ostren...@gmail.com/ пн, 18 дек. 2023 г., 13:40 Nikita Ostrenkov : > ping > https://patchew.org/QEMU/20231117173916.3658-1-n.ostren...@gmail.com/ > > пт, 17 нояб. 2023 г., 20:39 Nikita Ostrenkov : > >> From MCF5253 Refe

[PATCH v2] hw/arm: add PCIe to Freescale i.MX6

Signed-off-by: Nikita Ostrenkov --- hw/arm/Kconfig| 2 ++ hw/arm/fsl-imx6.c | 25 ++ include/hw/arm/fsl-imx6.h | 44 --- 3 files changed, 50 insertions(+), 21 deletions(-) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig

Re: [PATCH] hw/arm: add PCIe to Freescale i.MX6

Hi! Thanks! I'll send a new version of this patch. But what about fsl imx7? Should it also have PCIE_DEVICES? пн, 8 янв. 2024 г. в 15:20, Philippe Mathieu-Daudé : > Hi Nikita, > > On 7/1/24 17:57, Nikita Ostrenkov wrote: > > Signed-off-by: Nikita Ostrenkov > >

[PATCH] hw/arm: add PCIe to Freescale i.MX6

Signed-off-by: Nikita Ostrenkov --- hw/arm/Kconfig| 3 +++ hw/arm/fsl-imx6.c | 25 ++ include/hw/arm/fsl-imx6.h | 44 --- 3 files changed, 51 insertions(+), 21 deletions(-) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig

Re: [PATCH] hw/arm: add cache controller for Freescale i.MX6

thanks for letting me know! Enjoy your holidays. вт, 19 дек. 2023 г., 19:08 Peter Maydell : > On Tue, 19 Dec 2023 at 10:55, Nikita Ostrenkov > wrote: > > > > Signed-off-by: Nikita Ostrenkov > > --- > > hw/arm/Kconfig| 1 + > > hw/arm/fsl-imx6.c | 3 ++

[PATCH] hw/arm: add cache controller for Freescale i.MX6

Signed-off-by: Nikita Ostrenkov --- hw/arm/Kconfig| 1 + hw/arm/fsl-imx6.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 3ada335a24..386f06840c 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -536,6 +536,7 @@ config FSL_IMX6 select

Re: [PATCH v3] hw/usb: fix xhci port notify

ping https://patchew.org/QEMU/20231117173916.3658-1-n.ostren...@gmail.com/ пт, 17 нояб. 2023 г., 20:39 Nikita Ostrenkov : > From MCF5253 Reference manual > https://www.nxp.com/docs/en/reference-manual/MCF5253RM.pdf > > Host mode: Port Change Detect. The controller sets this bit t

[PATCH v5] fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards

Signed-off-by: Nikita Ostrenkov --- hw/misc/imx7_snvs.c | 93 ++--- hw/misc/trace-events| 4 +- include/hw/misc/imx7_snvs.h | 7 ++- 3 files changed, 94 insertions(+), 10 deletions(-) diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c index

[PATCH v4] fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards

Signed-off-by: Nikita Ostrenkov --- hw/misc/imx7_snvs.c | 93 ++--- hw/misc/trace-events| 4 +- include/hw/misc/imx7_snvs.h | 7 ++- 3 files changed, 94 insertions(+), 10 deletions(-) diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c index

Re: [PATCH v3] fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards

version of the patch. Thanks! чт, 14 дек. 2023 г., 20:23 Peter Maydell : > On Thu, 14 Dec 2023 at 11:49, Nikita Ostrenkov > wrote: > > > > Signed-off-by: Nikita Ostrenkov > > --- > > hw/misc/imx7_snvs.c | 91 ++--- > >

[PATCH v3] fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards

Signed-off-by: Nikita Ostrenkov --- hw/misc/imx7_snvs.c | 91 ++--- hw/misc/trace-events| 4 +- include/hw/misc/imx7_snvs.h | 7 ++- 3 files changed, 92 insertions(+), 10 deletions(-) diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c index

[PATCH v2] fsl-imx: add simple RTC emulation for i.MX6 and i.MX7 boards

Signed-off-by: Nikita Ostrenkov --- hw/misc/imx7_snvs.c | 70 + hw/misc/trace-events| 4 +-- include/hw/misc/imx7_snvs.h | 7 +++- 3 files changed, 71 insertions(+), 10 deletions(-) diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c

Re: [PATCH] fsl-imx: Add simple RTC emulation for i.MX6 and i.MX7 boards

Hi! Thanks for your feedback. I've considered your comments and I'm sending a new patch. вт, 12 дек. 2023 г. в 17:18, Peter Maydell : > On Sun, 12 Nov 2023 at 09:22, Nikita Ostrenkov > wrote: > > Hi; thanks for this patch, and sorry I haven't got round > to revi

[PATCH v3] hw/usb: fix xhci port notify

Resume bit is set as theresult of a J-K transition on the suspended port. Signed-off-by: Nikita Ostrenkov --- hw/usb/hcd-xhci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 4b60114207..1b2f4ac721 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-

[PATCH v2] hw/usb: fix xhci port notify

set as theresult of a J-K transition on the suspended port. Signed-off-by: Nikita Ostrenkov --- hw/usb/hcd-xhci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 4b60114207..1b2f4ac721 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -2627,6 +

[PATCH] hw/usb: fix xhci port notify

>From MCF5253 Reference manual >https://www.nxp.com/docs/en/reference-manual/MCF5253RM.pdf Host mode: The controller sets this bit to a one when on any port a Connect Status occurs, a PortEnable/Disable Change occurs, an Over Current Change occurs, or the Force Port Resume bit is set as theresu

[PATCH v3] target/arm/tcg: enable pmu feature for cortex a9

According to the technical reference manual Cortex A9 like Cortex A7 and Cortex A15 has Perfomance Unit Monitor (PMU) https://developer.arm.com/documentation/100511/0401/performance-monitoring-unit/about-the-performance-monitoring-unit Signed-off-by: Nikita Ostrenkov --- target/arm/tcg/cpu32.c

[PATCH v2] target/arm/tcg: enable pmu feature for cortex a9

From: Nikita Ostrenkov According to the technical reference manual Cortex A9 like Cortex A7 and Cortex A15 has Perfomance Unit Monitor (PMU) https://developer.arm.com/documentation/100511/0401/performance-monitoring-unit/about-the-performance-monitoring-unit --- target/arm/tcg/cpu32.c | 1 + 1

[PATCH] target/arm/tcg: enable pmu feature for cortex a9

From: Nikita Ostrenkov According to the technical reference manual Cortex A9 like Cortex A7 and Cortex A15 has Perfomance Unit Monitor (PMU) https://developer.arm.com/documentation/100511/0401/performance-monitoring-unit/about-the-performance-monitoring-unit --- target/arm/tcg/cpu32.c | 1 + 1

[PATCH] fsl-imx: Add simple RTC emulation for i.MX6 and i.MX7 boards

Signed-off-by: Nikita Ostrenkov --- hw/misc/imx7_snvs.c | 59 - hw/misc/trace-events| 4 +-- include/hw/misc/imx7_snvs.h | 14 - 3 files changed, 67 insertions(+), 10 deletions(-) diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c

Re: [RFC PATCH v2 1/2] hw/riscv: hart: replace array access with qemu_get_cpu()

Hello Alistair! On Mon, 2023-09-18 at 11:50 +1000, Alistair Francis wrote: > On Thu, Sep 14, 2023 at 6:09 PM Nikita Shubin > wrote: > > > > From: Nikita Shubin > > > > Replace all RISCVHartArrayState->harts[idx] with > > qemu_get_cpu()/cpu_by_arch_id()

[PATCH] gdbstub: Fix SEGFAULT in find_cpu_clusters()

From: Nikita Shubin target_xml is a dynamic GString, use NULL to initialize it. Fixes: 56e534bd11 ("gdbstub: refactor get_feature_xml") Signed-off-by: Nikita Shubin --- Observed with: build-qemu/qemu-system-riscv64 -M sifive_u -bios none -nographic -s Segmentation fault --- gdbstub

[RFC PATCH v2 1/2] hw/riscv: hart: replace array access with qemu_get_cpu()

From: Nikita Shubin Replace all RISCVHartArrayState->harts[idx] with qemu_get_cpu()/cpu_by_arch_id(). cpu_index is guaranteed to be continuus by cpu_get_free_index(), so they can be accessed in same order they were added. "Hart IDs might not necessarily be numbered contiguou

[RFC PATCH v2 0/2] hw/riscv: hart: allow other cpu instance

From: Nikita Shubin Currently it is not possible to overload instance of RISCVCPU, i.e. something like this: static const TypeInfo riscv_cpu_type_infos[] = { { .name = TYPE_ANOTHER_RISCV_CPU, .parent = TYPE_RISCV_CPU, .instance_size = sizeof(MyCPUState

[RFC PATCH v2 2/2] hw/riscv: hart: allow other cpu instance

From: Nikita Shubin Allow using instances derivative from RISCVCPU Signed-off-by: Nikita Shubin --- hw/riscv/riscv_hart.c | 20 include/hw/riscv/riscv_hart.h | 2 +- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/hw/riscv/riscv_hart.c b/hw/riscv

[PATCH v3] target/riscv: don't read CSR in riscv_csrrw_do64

From: Nikita Shubin As per ISA: "For CSRRWI, if rd=x0, then the instruction shall not read the CSR and shall not cause any of the side effects that might occur on a CSR read." trans_csrrwi() and trans_csrrw() call do_csrw() if rd=x0, do_csrw() calls riscv_csrrw_do64(), via h

Re: [RFC PATCH] hw/riscv: hart: allow other cpu instance

Hello Deniel! On Mon, 2023-07-31 at 11:12 -0300, Daniel Henrique Barboza wrote: > > > > > > On 7/27/23 05:05, Nikita Shubin wrote: > > > > From: Nikita Shubin > > > > > > > > Allow using instances derivative from

[PATCH v2] target/riscv: don't read write-only CSR

From: Nikita Shubin In case of write-only CSR don't return illegal inst error when CSR is written and lacks read op. Signed-off-by: Nikita Shubin --- Changelog: - fixed uninitialized old_value Anyway it not might be a good idea to read CSR when we are not asked for, during CSRRW or C

[RFC PATCH] hw/riscv: hart: allow other cpu instance

From: Nikita Shubin Allow using instances derivative from RISCVCPU Signed-off-by: Nikita Shubin --- Currently it is not possible to overload instance of RISCVCPU, i.e. something like this: static const TypeInfo riscv_cpu_type_infos[] = { { .name = TYPE_ANOTHER_RISCV_CPU

[PATCH] target/riscv: don't read write-only CSR

From: Nikita Shubin In case of write-only CSR don't return illegal inst error when CSR is written and lacks read op. Signed-off-by: Nikita Shubin --- Anyway it not might be a good idea to read CSR when we are not asked for, during CSRRW or CSRRWI: "For CSRRWI, if rd=x0, then the i

Re: [PATCH v4 0/2] Refactoring: expand usage of TFR() macro

Hi! Is there any update on this? I haven't received any comments. On Sun, Oct 23, 2022 at 12:04 PM Nikita Ivanov wrote: > At the moment, TFR() macro has a vague name and is not used > where it possibly could be. In order to make it more transparent > and useful, it was decided to

[PATCH v4 1/2] Refactoring: refactor TFR() macro to RETRY_ON_EINTR()

Rename macro name to more transparent one and refactor it to expression. Signed-off-by: Nikita Ivanov --- chardev/char-fd.c | 2 +- chardev/char-pipe.c| 8 +--- include/qemu/osdep.h | 8 +++- net/tap-bsd.c | 6 +++--- net/tap-linux.c| 2 +- net/tap-solaris.c

[PATCH v4 0/2] Refactoring: expand usage of TFR() macro

RETRY_ON_EINTR(). All the places where RETRY_ON_EINTR() macro code be applied were covered. Nikita Ivanov (2): Refactoring: refactor TFR() macro to RETRY_ON_EINTR() error handling: Use RETRY_ON_EINTR() macro where applicable block/file-posix.c| 37 - chardev

[PATCH v4 2/2] error handling: Use RETRY_ON_EINTR() macro where applicable

There is a defined RETRY_ON_EINTR() macro in qemu/osdep.h which handles the same while loop. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/415 Signed-off-by: Nikita Ivanov --- block/file-posix.c| 37 - chardev/char-pty.c| 4 +--- hw

Re: [PATCH v3 2/2] error handling: Use RETRY_ON_EINTR() macro where applicable

Hi! Thanks for clarification! Corrected it in v4. On Wed, Oct 19, 2022 at 6:24 PM Christian Schoenebeck < qemu_...@crudebyte.com> wrote: > On Tuesday, October 18, 2022 10:43:41 AM CEST Nikita Ivanov wrote: > > There is a defined RETRY_ON_EINTR() macro in qemu/osdep.h > > w

Re: [PATCH v3 1/2] Refactoring: refactor TFR() macro to RETRY_ON_EINTR()

Hi! Thanks for mentioning the issue. Corrected it in v4. On Wed, Oct 19, 2022 at 6:40 PM Christian Schoenebeck < qemu_...@crudebyte.com> wrote: > On Dienstag, 18. Oktober 2022 10:43:40 CEST Nikita Ivanov wrote: > > Rename macro name to more transparent one and refactor >

[PATCH v3 2/2] error handling: Use RETRY_ON_EINTR() macro where applicable

There is a defined RETRY_ON_EINTR() macro in qemu/osdep.h which handles the same while loop. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/415 Signed-off-by: Nikita Ivanov --- block/file-posix.c| 37 - chardev/char-pty.c| 4 +--- hw

[PATCH v3 1/2] Refactoring: refactor TFR() macro to RETRY_ON_EINTR()

Rename macro name to more transparent one and refactor it to expression. Signed-off-by: Nikita Ivanov --- chardev/char-fd.c | 2 +- chardev/char-pipe.c| 8 +--- include/qemu/osdep.h | 8 +++- net/tap-bsd.c | 6 +++--- net/tap-linux.c| 2 +- net/tap-solaris.c

[PATCH v3 0/2] Refactoring: expand usage of TFR() macro

RETRY_ON_EINTR(). All the places where RETRY_ON_EINTR() macro code be applied were covered. Nikita Ivanov (2): Refactoring: refactor TFR() macro to RETRY_ON_EINTR() error handling: Use RETRY_ON_EINTR() macro where applicable block/file-posix.c| 37 - chardev

Re: [PATCH v2 2/2] error handling: Use RETRY_ON_EINTR() macro where applicable

Hi! Execuse me, my fault. Overlooked TFR occurrences in second patch. I will correct it. ср, 12 окт. 2022 г., 18:43 Christian Schoenebeck : > On Mittwoch, 12. Oktober 2022 17:17:46 CEST Bin Meng wrote: > > Hi, > > > > On Wed, Oct 12, 2022 at 8:32 PM Nikita Ivanov >

[PATCH v2 2/2] error handling: Use RETRY_ON_EINTR() macro where applicable

There is a defined RETRY_ON_EINTR() macro in qemu/osdep.h which handles the same while loop. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/415 Signed-off-by: Nikita Ivanov --- block/file-posix.c| 37 - chardev/char-pty.c| 4 +--- hw

[PATCH v2 1/2] Refactoring: refactor TFR() macro to RETRY_ON_EINTR()

Rename macro name to more transparent one and refactor it to expression. Signed-off-by: Nikita Ivanov --- chardev/char-fd.c| 2 +- chardev/char-pipe.c | 8 +--- include/qemu/osdep.h | 8 +++- net/tap-bsd.c| 6 +++--- net/tap-linux.c | 2 +- net/tap-solaris.c| 8

[PATCH v2 0/2] Refactoring: expand usage of TFR() macro

RETRY_ON_EINTR(). All the places where RETRY_ON_EINTR() macro code be applied were covered. Nikita Ivanov (2): Refactoring: refactor TFR() macro to RETRY_ON_EINTR() error handling: Use RETRY_ON_EINTR() macro where applicable block/file-posix.c| 37 - chardev

Re: [PATCH] error handling: Use TFR() macro where applicable

e (errno == EINTR) > > +#define TEMP_FAILURE_RETRY(expr) \ > > We can't call the macro this, because the glibc system headers already > may define a macro of that name, so the compiler will complain if they're > both defined at the same time, and depending on header ordering it might > not be clear which version you're getting. > Sorry, my fault. I will rename it to "RETRY_ON_EINTR" as it was proposed earlier in this thread. -- Best Regards, *Nikita Ivanov* | C developer

Re: [PATCH] error handling: Use TFR() macro where applicable

Hi! Sorry for such a long absence, I've been resolving some other issues in my life for a while. I've adjusted the patch according to your latest comments. Could you check it out, please? >From 5389c5ccc8789f8f666ab99e50d38af728bd2c9c Mon Sep 17 00:00:00 2001 From: Nikita Ivanov Dat

Re: [PATCH] error handling: Use TFR() macro where applicable

: > On Wed, 17 Aug 2022 at 15:06, Nikita Ivanov > wrote: > > > > Hi! Are there any updates? I have not received any comments since the > last email. > > Looking at the thread, I don't think we (yet) have consensus on the > right thing to do here... > > than

Re: [PATCH] error handling: Use TFR() macro where applicable

Hi! Are there any updates? I have not received any comments since the last email. On Mon, Aug 8, 2022 at 9:03 PM Nikita Ivanov wrote: > And summing up the discussion about TEMP_FAILURE_RETRY() usage examples, > I've come up with a new patch for TFR() to TEMP_FAILURE_RETRY() > ref

Re: [PATCH] error handling: Use TFR() macro where applicable

And summing up the discussion about TEMP_FAILURE_RETRY() usage examples, I've come up with a new patch for TFR() to TEMP_FAILURE_RETRY() refactoring. I've decided to stick to expression realisation. >From 94217dfacf12b3211cfab6e19d750e57d679e851 Mon Sep 17 00:00:00 2001 From: Nikita

Re: [PATCH] error handling: Use TFR() macro where applicable

Hi! During our discussion, I found that I've missed a couple of places where TFR() macro could be applied. Here is an updated first patch: >From 8a68f50aac4a8549f416b9350cf339cf0501a712 Mon Sep 17 00:00:00 2001 From: Nikita Ivanov Date: Wed, 3 Aug 2022 12:54:00 +0300 Subject: [PATC

Re: [PATCH] error handling: Use TFR() macro where applicable

Good point, thank you! I think it's a bad idea to keep it like I proposed. Though, could I just copy the definition that Markus has posted or there are any objections? On Mon, Aug 8, 2022 at 11:06 AM Markus Armbruster wrote: > Nikita Ivanov writes: > > > Summing up the di

Re: [PATCH] error handling: Use TFR() macro where applicable

Summing up the discussion above, I suggest the following patch for TFR() macro refactoring. (The patch is sequential to the first one I introduced in the start of the discussion). >From 6318bee052900aa93bba6620b53c7cb2290e5001 Mon Sep 17 00:00:00 2001 From: Nikita Ivanov Date: Mon, 8 Aug 2022

[PATCH] error handling: Use TFR() macro where applicable

>From 0ceb04ada1ed5a863914f4449469d7572d3443ed Mon Sep 17 00:00:00 2001 From: Nikita Ivanov Date: Wed, 3 Aug 2022 12:54:00 +0300 Subject: [PATCH] error handling: Use TFR() macro where applicable There is a defined TFR() macro in qemu/osdep.h which handles the same while loop. Resolves: ht

Re: [PATCH 1/8] migration: Implemented new parameter stream_content

On 6/16/22 4:10 PM, Daniel P. Berrangé wrote: On Thu, Jun 16, 2022 at 03:53:29PM +0300, Nikita wrote: On 6/16/22 1:32 PM, Daniel P. Berrangé wrote: On Thu, Jun 16, 2022 at 01:19:57PM +0300, nikita.laps...@openvz.org wrote: From: Nikita Lapshin This new optional parameter contains

Re: [PATCH v3 11/17] migration/qemu-file: Fix qemu_ftell() for non-writable file

On 6/16/22 2:20 PM, Daniel P. Berrangé wrote: On Thu, Jun 16, 2022 at 01:28:05PM +0300, nikita.laps...@openvz.org wrote: From: Nikita Lapshin qemu_ftell() will return wrong value for non-writable QEMUFile. This happens due to call qemu_fflush() inside qemu_ftell(), this function won't

Re: [PATCH 1/8] migration: Implemented new parameter stream_content

On 6/16/22 1:32 PM, Daniel P. Berrangé wrote: On Thu, Jun 16, 2022 at 01:19:57PM +0300, nikita.laps...@openvz.org wrote: From: Nikita Lapshin This new optional parameter contains inormation about migration stream parts to be sent (such as RAM, block, bitmap). This looks better than using

[PATCH v3 17/17] migration/snapshot: Postcopy load implemented

From: Nikita Lapshin It is a modified load part from previous patch. Implemented new rp listen thread for snapshot-tool. Also implemented functions for starting postcopy. This mode can be turned on by specifying --postcopy flag. Signed-off-by: Nikita Lapshin --- include/qemu-snapshot.h

[PATCH v3 16/17] migration/snapshot: Precopy load implemented

From: Nikita Lapshin Load snapshot from qcow2 file. This part also work only with ram part and send vmstate part as it was saved previously without parsing. Here also migration code was reused but now it is savevm part. Tool replace ram handlers as it did before in tool save part but now it is

[PATCH v3 15/17] migration/snapshot: Save part implement

From: Nikita Lapshin Snapshot save are done in two stages. First tool save vmstate part. It must be guaranteed that tool will get vmstate part only. This is because tool won't parse this stream and will just save it non-modified. Second stage is ram sending. Also it must be guarantee tha

[PATCH v3 13/17] migration/snapshot: Block layer support in qemu-snapshot

From: Nikita Lapshin This commit enables few functions to simplify block layer work for qemu-snapshot tool. Signed-off-by: Nikita Lapshin --- include/qemu-snapshot.h | 3 + migration/meson.build| 1 + migration/qemu-snapshot-io.c | 112 +++ 3

[PATCH v3 09/17] migration/snapshot: Introduce qemu-snapshot tool

From: Nikita Lapshin Execution environment, command-line argument parsing, usage/version info etc. Signed-off-by: Nikita Lapshin --- include/qemu-snapshot.h | 65 ++ migration/qemu-snapshot.c | 57 + qemu-snapshot.c | 433 ++ 3 files

[PATCH v3 12/17] migration/snapshot: Move RAM_SAVE_FLAG_xxx defines to migration/ram.h

From: Nikita Lapshin Move RAM_SAVE_FLAG_xxx defines from migration/ram.c to migration/ram.h Signed-off-by: Nikita Lapshin --- migration/ram.c | 16 migration/ram.h | 16 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/migration/ram.c b

[PATCH v3 11/17] migration/qemu-file: Fix qemu_ftell() for non-writable file

From: Nikita Lapshin qemu_ftell() will return wrong value for non-writable QEMUFile. This happens due to call qemu_fflush() inside qemu_ftell(), this function won't flush if file is readable. Signed-off-by: Nikita Lapshin --- migration/qemu-file.c | 3 ++- 1 file changed, 2 insertions(

[PATCH v3 06/17] migration: Add RAM part of migration stream

From: Nikita Lapshin 'ram' parameter enable RAM sections in migration stream. If it isn't specified it will be skipped. Signed-off-by: Nikita Lapshin --- migration/migration.c | 17 - migration/migration.h | 1 + migration/ram.c | 6 ++ 3 fi

[PATCH v3 02/17] migration: should_skip() implemented

From: Nikita Lapshin For next changes it is convenient to make all decisions about sections skipping in one function. Signed-off-by: Nikita Lapshin --- migration/savevm.c | 54 -- 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a

[PATCH v3 08/17] migration: Test for RAM and vmstate parts

From: Nikita Lapshin All other parts works just like existed capabilities. Thus there is no need to make new tests. Though RAM and vmstate are new so here is new test for that parts. Signed-off-by: Nikita Lapshin --- .../tests/migrate-ram-stream-content-test | 96

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