On 09/21/16 03:00, David Gibson wrote:
On Wed, Sep 21, 2016 at 01:20:57PM +1000, David Gibson wrote:
On Tue, Aug 30, 2016 at 01:02:47AM +, Nathan Whitehorn wrote:
These are mandatory per PAPR and available on Linux 4.3 and newer kernels. The
calls in question are required to run FreeBSD
These are mandatory per PAPR and available on Linux 4.3 and newer kernels. The
calls in question are required to run FreeBSD guests with reasonable
performance, so enable them if possible.
Signed-off-by: Nathan Whitehorn
---
hw/ppc/spapr.c | 3 +++
target-ppc/kvm.c | 6
On 01/03/14 08:27, Paolo Bonzini wrote:
> Il 02/01/2014 19:23, Nathan Whitehorn ha scritto:
>>>> Let me try to grasp what you're doing here. You're trying to
>>>> figure out how many devices there are attached to the bus. For
>>>> every device y
commands addressed to any other LUN is not specified
by the standard and so is left unchanged. This preserves behavior under Linux
and SLOF, which enumerate possible LUNs by hand and so address no commands
either to LUN 0 or the well-known REPORT_LUNS LUN.
Signed-off-by: Nathan Whitehorn
--
hw/scsi
On 01/02/14 10:31, Alexander Graf wrote:
> On 18.10.2013, at 14:33, Nathan Whitehorn wrote:
>
>> Intercept REPORT_LUNS commands addressed either to SRP LUN 0 or the
>> well-known
>> LUN for REPORT_LUNS commands. This is required to implement the SAM and SPC
>> s
On 01/02/14 10:41, Alexander Graf wrote:
> On 02.01.2014, at 16:31, Alexander Graf wrote:
>
>> On 18.10.2013, at 14:33, Nathan Whitehorn wrote:
>>
>>> Intercept REPORT_LUNS commands addressed either to SRP LUN 0 or the
>>> well-known
>>> LUN
On 01/02/14 10:56, ronnie sahlberg wrote:
> On Thu, Jan 2, 2014 at 7:41 AM, Alexander Graf wrote:
>> On 02.01.2014, at 16:31, Alexander Graf wrote:
>>
>>> On 18.10.2013, at 14:33, Nathan Whitehorn wrote:
>>>
>>>> Intercept REPORT_LUNS commands ad
On 12/02/13 12:58, Paolo Bonzini wrote:
> Il 02/12/2013 18:51, Nathan Whitehorn ha scritto:
>> Any news on this? FreeBSD is unbootable from CDROM devices in
>> QEMU/pseries without this patch.
>> -Nathan
> Acked-by: Paolo Bonzini
>
> Alex, can you pick it up?
Any updates?
-Nathan
Any news on this? FreeBSD is unbootable from CDROM devices in
QEMU/pseries without this patch.
-Nathan
On 10/18/13 07:33, Nathan Whitehorn wrote:
Intercept REPORT_LUNS commands addressed either to SRP LUN 0 or the well-known
LUN for REPORT_LUNS commands. This is required to implement the SAM
commands addressed to any other LUN is not specified
by the standard and so is left unchanged. This preserves behavior under Linux
and SLOF, which enumerate possible LUNs by hand and so address no commands
either to LUN 0 or the well-known REPORT_LUNS LUN.
Signed-off-by: Nathan Whitehorn
---
hw/scsi
On Mar 17, 2012, at 11:20 AM, Blue Swirl wrote:
On Sat, Mar 3, 2012 at 16:34, Nathan Whitehorn
wrote:
Fix a missing header required to build on recent FreeBSD.
Signed-off-by: Nathan Whitehorn
---
os-posix.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/os
On 03/09/12 07:13, Alexander Graf wrote:
On 09.03.2012, at 04:42, David Gibson wrote:
On Thu, Mar 08, 2012 at 09:24:53AM -0600, Nathan Whitehorn wrote:
On Mar 7, 2012, at 7:25 PM, David Gibson wrote:
On Sat, Mar 03, 2012 at 10:39:34AM -0600, Nathan Whitehorn wrote:
Fix large page support
On Mar 7, 2012, at 7:25 PM, David Gibson wrote:
On Sat, Mar 03, 2012 at 10:39:34AM -0600, Nathan Whitehorn wrote:
Fix large page support in TCG. The old code would overwrite the
large page table entry with the fake 4 KB
one generated here whenever the ref/change bits were updated,
causing it
.
Signed-off-by: Nathan Whitehorn
---
target-ppc/helper.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 928fbcf..0f5ad2e 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -597,12 +597,6 @@ static inline int
Recent changes to the signature of usb_host_device_open() have broken
the stub USB backend. This updates the stub version of
usb_host_device_open() to correspond to the new API.
Signed-off-by: Nathan Whitehorn
---
usb-stub.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff
: Nathan Whitehorn
---
target-ppc/translate_init.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 8a7233f..01f4030 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6537,6
Fix a missing header required to build on recent FreeBSD.
Signed-off-by: Nathan Whitehorn
---
os-posix.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/os-posix.c b/os-posix.c
index dbf3b24..83b14a0 100644
--- a/os-posix.c
+++ b/os-posix.c
@@ -45,6 +45,10
On 06/13/11 05:20, Alexander Graf wrote:
Am 12.06.2011 um 17:49 schrieb Nathan Whitehorn:
The mtmsr instruction is required not to modify the upper 32-bits of the
machine state register, but checks the current value of MSR[SF] to decide
whether to do this. This has the effect of zeroing
The PIR register is architecturally specified on all PowerPC
non-embedded CPUs, but currently is only available on the 604, 620, and
G4. Add it to all 601-derived CPUs.
Signed-off-by: Nathan Whitehorn
---
target-ppc/translate_init.c | 20 +---
1 files changed, 5 insertions
the upper 32-bits in mtmsr for TARGET_PPC64.
Signed-off-by: Nathan Whitehorn
---
target-ppc/translate.c |5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 59aef85..38d2e2e 100644
--- a/target-ppc/translate.c
+++ b
On 06/02/11 10:01, Andreas Färber wrote:
Am 31.05.2011 um 16:57 schrieb Nathan Whitehorn:
Add some includes required to build qemu on FreeBSD.
Missing Sob.
Oops, I'll resubmit.
---
bsd-user/syscall.c |2 ++
iohandler.c|1 +
os-posix.c |4
3 files chang
On 06/05/11 08:33, Nathan Whitehorn wrote:
On 06/05/11 04:00, Alexander Graf wrote:
On 04.06.2011, at 21:28, Nathan Whitehorn wrote:
On 05/31/11 12:40, Richard Henderson wrote:
On 05/31/2011 07:56 AM, Nathan Whitehorn wrote:
#if defined(TARGET_PPC64)
-if (!ctx->sf_m
On 06/05/11 04:00, Alexander Graf wrote:
On 04.06.2011, at 21:28, Nathan Whitehorn wrote:
On 05/31/11 12:40, Richard Henderson wrote:
On 05/31/2011 07:56 AM, Nathan Whitehorn wrote:
#if defined(TARGET_PPC64)
-if (!ctx->sf_mode) {
TCGv t0 = tcg_temp_
On 05/31/11 12:40, Richard Henderson wrote:
On 05/31/2011 07:56 AM, Nathan Whitehorn wrote:
#if defined(TARGET_PPC64)
-if (!ctx->sf_mode) {
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
You're removing a scope in which these variables were
Add some includes required to build qemu on FreeBSD.
---
bsd-user/syscall.c |2 ++
iohandler.c|1 +
os-posix.c |4
3 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/bsd-user/syscall.c b/bsd-user/syscall.c
index eb1cdf2..7b49f54 100644
--- a/bsd-user/
The mtmsr instruction is required not to modify the upper 32-bits of the
machine state register, but checks the current value of MSR[SF] to
decide whether to do this. This has the effect of zeroing the upper 32
bits of the MSR whenever mtmsr is executed in 64-bit mode.
Unconditionally preserve
The PIR register is architecturally specified on all PowerPC
non-embedded CPUs, but currently is only available on the 604, 620, and
G4. Add it to all 601-derived CPUs.
target-ppc/translate_init.c | 20 +---
1 files changed, 5 insertions(+), 15 deletions(-)
diff --git a/targ
On 05/26/11 18:47, agraf wrote:
> On 27.05.2011, at 01:33, Nathan Whitehorn wrote:
>
>> On 05/26/11 11:45, agraf wrote:
>>> On 26.05.2011, at 18:09, Nathan Whitehorn wrote:
>>>
>>>> ** Patch added: "mtmstr.diff"
>>>>
>&g
On 05/26/11 11:45, agraf wrote:
> On 26.05.2011, at 18:09, Nathan Whitehorn wrote:
>
>> ** Patch added: "mtmstr.diff"
>>
>> https://bugs.launchpad.net/bugs/788697/+attachment/2143748/+files/mtmstr.diff
>>
>> --
>> You received this bug notifi
** Patch added: "mtmstr.diff"
https://bugs.launchpad.net/bugs/788697/+attachment/2143748/+files/mtmstr.diff
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/788697
Title:
[PowerPC] [patch] mtmsr do
Public bug reported:
The mtmsr instruction on 64-bit PPC does not preserve the high-order
32-bits of the MSR the way it is supposed to, instead setting them to 0,
which takes 64-bit code out of 64-bit mode. There is some code that does
the right thing, but it brokenly only preserves these bits whe
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