On Fri, May 31, 2024 at 11:14:00AM +0100, Jonathan Cameron wrote:
> On Wed, 29 May 2024 22:17:44 +0200
> Nam Cao wrote:
>
> > Set link width to x1 and link speed to 2.5 Gb/s as specified by the
> > datasheet. Without this, these fields in the link status register re
quot;)
Signed-off-by: Nam Cao
---
v2: implement this in .realize() instead
---
hw/pci-bridge/xio3130_downstream.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/pci-bridge/xio3130_downstream.c
b/hw/pci-bridge/xio3130_downstream.c
index 38a2361fa2..2df1ee203d 100644
--- a/hw/pci-bridge/
On Wed, May 29, 2024 at 04:17:04PM +0200, Nam Cao wrote:
> On Wed, May 29, 2024 at 03:50:14PM +0200, Philippe Mathieu-Daudé wrote:
> > On 29/5/24 15:21, Nam Cao wrote:
> > > Set link width to x1 and link speed to 2.5 Gb/s as specified by the
> > > datasheet. Without thi
On Wed, May 29, 2024 at 03:50:14PM +0200, Philippe Mathieu-Daudé wrote:
> On 29/5/24 15:21, Nam Cao wrote:
> > Set link width to x1 and link speed to 2.5 Gb/s as specified by the
> > datasheet. Without this, these fields in the link status register read
> > zero, which is inc
quot;)
Signed-off-by: Nam Cao
---
hw/pci-bridge/xio3130_downstream.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/pci-bridge/xio3130_downstream.c
b/hw/pci-bridge/xio3130_downstream.c
index 38a2361fa2..d949431191 100644
--- a/hw/pci-bridge/xio3130_downstream.c
+++ b/hw/pci-bridge/
