Thank you Alistair Francis.
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https://bugs.launchpad.net/bugs/1885350
Title:
RISCV dynamic rounding mode is not behaving correctly
Status in QEMU:
New
Bug description:
Hello,
I
After checking RISCY RTL code, i found the implementation is straight forward
as stated in specs as follows:
if (FPU == 1) begin
if (fp_rnd_mode == 3'b111)
apu_flags = frm_i;
else
apu_flags = fp_rnd_mode;
Public bug reported:
Hello,
I’ve gone through the RISC-V code in latest QEMU release
(qemu-5.0.0-rc2) and when checking the Floating point encodings I found
the rounding mode is only updated if the opcode field “rm” is changed
“ctx->frm == rm”. But according to RISC-V Volume I: Unprivileged ISA,
