27;t
supported". Ugh - to avoid storing up a problem for the future, I think
I better think it out again!
best regards,
Mike H.
On 05/09/15 14:02, Peter Maydell wrote:
On 5 September 2015 at 12:28, Mike Haben wrote:
Most ARM cores switch unconditionally to ARM mode when an exception
related to the version of instruction set, and some earlier cores use
the same bit (30) in the control register for a completely different
purpose, so seems sensible to handle it as yet another ARM feature.
Signed-off-by: Mike Haben
---
target-arm/cpu.c| 4
target-arm/cpu.h| 1 +
On 03/09/15 17:58, Peter Crosthwaite wrote:
Hi Mike,
On Thu, Sep 3, 2015 at 2:27 AM, GitNoviceMikeH
wrote:
From: GitNoviceMikeH
Most ARM cores switch unconditionally to ARM mode when an exception occurs;
a few (Cortex) variants have a "Thumb-exception enable" bit in the system
control regist
