know if we have a match.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 5 +++-
include/hw/ppc/xive2.h | 1 +
hw/intc/pnv_xive2.c| 33 ++---
hw/intc/xive.c | 56 +---
hw/intc/xive2.c
From: Frederic Barrat
When the hypervisor or OS pushes a new value to the CPPR, if the LSMFB
value is lower than the new CPPR value, there could be a pending group
interrupt in the backlog, so it needs to be scanned.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw
block and index actually point to
a NVP.
Suggested-by: Michael Kowal
Fixes: ("ppc/xive2: Support crowd-matching when looking for target")
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive2.c | 78 -
1 file c
Miles
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 10 +++---
include/hw/ppc/xive2.h | 3 +-
hw/intc/pnv_xive.c | 10 +++---
hw/intc/pnv_xive2.c| 12 +++
hw/intc/spapr_xive.c | 8 ++---
hw/intc/xive.c | 40 ++
hw/intc
t now because they're running at too
high a priority.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 5 ++
include/hw/ppc/xive2.h | 1 +
hw/intc/pnv_xive2.c| 42 +
hw/intc/xive2.c
From: Glenn Miles
XIVE crowd sizes are encoded into a 2-bit field as follows:
0: 0b00
2: 0b01
4: 0b10
16: 0b11
A crowd size of 8 is not supported.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 21 -
1 file changed, 20 insertions
From: Glenn Miles
Added new test for pool interrupts. Removed all printfs from pnv-xive2-*
qtests.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
tests/qtest/pnv-xive2-flush-sync.c | 6 +-
tests/qtest/pnv-xive2-nvpg_bar.c | 7 +--
tests/qtest/pnv-xive2-test.c | 98
are due to passing the extra argument 'crowd' all
the way to the function checking for matches.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 10 +++---
include/hw/ppc/xive2.h | 3 +-
hw/intc/pnv_xive.c | 5 +--
hw/intc/pnv_xive2.c|
From: Frederic Barrat
Add support for the NVPG and NVC BARs. Access to the BAR pages will
cause backlog counter operations to either increment or decriment
the counter.
Also added qtests for the same.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h
From: Frederic Barrat
When the hypervisor or OS pushes a new value to the CPPR, if the LSMFB
value is lower than the new CPPR value, there could be a pending group
interrupt in the backlog, so it needs to be scanned.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw
know if we have a match.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 5 +++-
include/hw/ppc/xive2.h | 7 ++---
hw/intc/pnv_xive2.c| 38 +++-
hw/intc/xive.c | 56 +---
hw/intc/xive2.c
is part of
the END notification processing.
This change was taken from a patch provided by Michael Kowal
Suggested-by: Michael Kowal
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h | 1 +
include/hw/ppc/xive2_regs.h | 13 +---
hw/intc/xive2.c
From: Frederic Barrat
When processing a backlog scan for group interrupts, also take
into account crowd interrupts.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2_regs.h | 4 ++
hw/intc/xive2.c | 82 +
2
From: Frederic Barrat
Add XIVE2 tests for group interrupts and group interrupts that have
been backlogged.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
tests/qtest/pnv-xive2-test.c | 160 +++
1 file changed, 160 insertions(+)
diff --git a
From: Frederic Barrat
When processing a backlog scan for group interrupts, also take
into account crowd interrupts.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2_regs.h | 4 ++
hw/intc/xive2.c | 82 +
2
From: Frederic Barrat
Add support for the NVPG and NVC BARs. Access to the BAR pages will
cause backlog counter operations to either increment or decriment
the counter.
Also added qtests for the same.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h
From: Frederic Barrat
Add XIVE2 tests for group interrupts and group interrupts that have
been backlogged.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
tests/qtest/pnv-xive2-test.c | 160 +++
1 file changed, 160 insertions(+)
diff --git a
NVP
belongs to a group.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
hw/intc/xive2.c | 100 ++--
1 file changed, 97 insertions(+), 3 deletions(-)
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index a6dc6d553f..7130892482 100644
Renamed function to follow the convention of the other function names.
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 16
hw/intc/xive.c| 22 ++
2 files changed, 18 insertions(+), 20 deletions(-)
diff --git a/include/hw/ppc/xive.h b
NVP
belongs to a group.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
hw/intc/xive2.c | 97 +
1 file changed, 97 insertions(+)
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 05cb17518d..bb18a56e8f 100644
--- a/hw/intc/xive2
/accepting an interrupt.
It also renames xive_tctx_ipb_update() to xive_tctx_pipr_update() as
the IPB is only used for VP-specific target, whereas the PIPR always
needs to be updated.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 19 +++-
include
/accepting an interrupt.
It also renames xive_tctx_ipb_update() to xive_tctx_pipr_update() as
the IPB is only used for VP-specific target, whereas the PIPR always
needs to be updated.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 9 +++-
include/hw
t now because they're running at too
high a priority.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 5 ++
include/hw/ppc/xive2.h | 1 +
hw/intc/pnv_xive2.c| 42 +
hw/intc/xive2.c
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2_regs.h | 10 +++---
hw/intc/xive2.c | 23 ++-
2 files changed, 25 insertions(+), 8 deletions(-)
diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index
problem with treating NVGC as a NVP
qtest/xive: Add test of pool interrupts
Michael Kowal (1):
ppc/xive: Rename ipb_to_pipr() to xive_ipb_to_pipr()
include/hw/ppc/xive.h | 41 +-
include/hw/ppc/xive2.h | 25 +-
include/hw/ppc/xive2_regs.h| 30 +-
include/hw
From: Glenn Miles
Added new test for pool interrupts.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
tests/qtest/pnv-xive2-test.c | 77
1 file changed, 77 insertions(+)
diff --git a/tests/qtest/pnv-xive2-test.c b/tests/qtest/pnv-xive2-test.c
From: Glenn Miles
XIVE crowd sizes are encoded into a 2-bit field as follows:
0: 0b00
2: 0b01
4: 0b10
16: 0b11
A crowd size of 8 is not supported.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 21 -
1 file changed, 20 insertions
know if we have a match.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 5 +++-
include/hw/ppc/xive2.h | 1 +
hw/intc/pnv_xive2.c| 33 ++---
hw/intc/xive.c | 56 +---
hw/intc/xive2.c
t now because they're running at too
high a priority.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 5 ++
include/hw/ppc/xive2.h | 1 +
hw/intc/pnv_xive2.c| 42 +
hw/intc/xive2.c
From: Frederic Barrat
Add support for the NVPG and NVC BARs. Access to the BAR pages will
cause backlog counter operations to either increment or decriment
the counter.
Also added qtests for the same.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h
block and index actually point to
a NVP.
Suggested-by: Michael Kowal
Fixes: 6d4c4f70262 ("ppc/xive2: Support crowd-matching when looking for target")
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive2.c | 78 -
1 fi
From: Frederic Barrat
Add XIVE2 tests for group interrupts and group interrupts that have
been backlogged.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
tests/qtest/pnv-xive2-test.c | 160 +++
1 file changed, 160 insertions(+)
diff --git a
From: Frederic Barrat
When processing a backlog scan for group interrupts, also take
into account crowd interrupts.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2_regs.h | 4 ++
hw/intc/xive2.c | 82 +
2
are due to passing the extra argument 'crowd' all
the way to the function checking for matches.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 10 +++---
include/hw/ppc/xive2.h | 3 +-
hw/intc/pnv_xive.c | 5 +--
hw/intc/pnv_xive2.c|
is part of
the END notification processing.
This change was taken from a patch provided by Michael Kowal
Suggested-by: Michael Kowal
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h | 1 +
include/hw/ppc/xive2_regs.h | 13 +---
hw/intc/xive2.c
/accepting an interrupt.
It also renames xive_tctx_ipb_update() to xive_tctx_pipr_update() as
the IPB is only used for VP-specific target, whereas the PIPR always
needs to be updated.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 19 +++-
include
From: Frederic Barrat
When the hypervisor or OS pushes a new value to the CPPR, if the LSMFB
value is lower than the new CPPR value, there could be a pending group
interrupt in the backlog, so it needs to be scanned.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw
NVP
belongs to a group.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
hw/intc/xive2.c | 100 ++--
1 file changed, 97 insertions(+), 3 deletions(-)
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index a6dc6d553f..7130892482 100644
XIVE2 has the concepts of a Group of interrupts and a Crowd of interrupts
(where a crowd is a group of Groups). These patch sets are associated with:
- NVGC tables
- Group/Crowd level notification
- Incrementing backlog countets
- Backlog processing
- NVPG and NVC Bar MMIO operations
- Group/
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2_regs.h | 5 +
hw/intc/xive2.c | 18 --
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h
index 1d00c8df64..
inject operations
Co-authored-by: Frederic Barrat
Co-authored-by: Glenn Miles
Co-authored-by: Michael Kowal
Signed-off-by: Frederic Barrat
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
MAINTAINERS| 1 +
tests/qtest/pnv-xive2-common.h | 111
inject operations
Co-authored-by: Frederic Barrat
Co-authored-by: Glenn Miles
Co-authored-by: Michael Kowal
Signed-off-by: Frederic Barrat
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
MAINTAINERS| 1 +
tests/qtest/pnv-xive2-common.h | 112
inject operations
Co-authored-by: Frederic Barrat
Co-authored-by: Glenn Miles
Co-authored-by: Michael Kowal
Signed-off-by: Frederic Barrat
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
MAINTAINERS| 3 +-
tests/qtest/pnv-xive2-common.h | 246
From: Frederic Barrat
The OGEN field at offset 0x1F is a new field for Gen2 TIMA. This
patch defines it.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 4
2 files changed, 5
From: Michael Kowal
Making some pre-requisite alignment changes ahead of the following patch
sets. Making these changes now will ease the review of the patch sets.
Checkpatch wants the closing comment '*/' on a separate line, unless it is
on the same line as the starting comment &#
. Return the number of bytes requested in step 1 to a register.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 2 ++
hw/intc/xive.c | 15 +++
2 files changed, 17 insertions(+)
diff --git a/include/hw
Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 36 ++--
1 file changed, 26 insertions(+), 10 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 9d85da0999..5c5c3a2dd6 100644
--- a/hw/intc/xive.c
+++ b/hw/i
fails to check for unpresented
pending interrupts for that context.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 2 ++
hw/intc/xive2.c | 24 +++-
2 files changed, 21 insertions(+), 5 deletions(-)
diff --git
From: Frederic Barrat
The 'info pic' HMP command dumps the state of the interrupt controller.
Add the dump of the NVG and NVC tables to its output to ease debug.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive2.h
THREAD CAM entry.
Note that this operation is almost identical to what we are already doing
for the "Pull OS Context to Odd Thread Reporting Line" operation except
that it also invalidates the Pool and Thread Contexts.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by:
: cdd4de68edb6 ("ppc/xive: notify the CPU when the interrupt priority is
more privileged")
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 34 --
1 file changed, 32 insertions(+), 2 deletion
exists
- lwz@0x830 Pull Thread Context to registeradded
lbz@0x838exists
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 7 ++-
hw/intc/xive.c | 6 ++
2 files changed, 12
CAM entry.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive2.h | 2 +
include/hw/ppc/xive2_regs.h | 2 +
include/hw/ppc/xive_regs.h | 3 +
hw/intc/xive.c | 2 +
hw/intc/xive2.c | 160
From: Frederic Barrat
The 'PGoFirst' field of a Notify Virtual Processor tells if the NVP
belongs to a VP group.
Also, print the Reporting Cache Line address, if defined.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
incl
this field.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive2.h | 2 ++
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 2 ++
hw/intc/xive2.c| 13 +
4 files changed, 18 insertions(+)
diff --git
Some the functions that have been created are specific to a ring or context.
Some
of these same functions are being changed to operate on any ring/context. This
will
simplify the next patch sets that are adding additional ring/context operations.
Signed-off-by: Michael Kowal
---
include/hw
just support the writing of the value for now.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 8e62c7e75f..8605dd618f 100644
--- a
ation
ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line"
pnv/xive: Add special handling for pool targets
pnv/xive: Update PIPR when updating CPPR
pnv/xive2: TIMA support for 8-byte OS context push for PHYP
Michael Kowal (3):
pnv/xive: TIMA patch sets pre-req alignm
just support the writing of the value for now.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 8e62c7e75f..8605dd618f 100644
--- a
From: Michael Kowal
Making some pre-requisite alignment changes ahead of the following patch
sets. Making these changes now will ease the review of the patch sets.
Checkpatch wants the closing comment '*/' on a separate line, unless it is
on the same line as the starting comment &#
CAM entry.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive2.h | 2 +
include/hw/ppc/xive2_regs.h | 2 +
include/hw/ppc/xive_regs.h | 3 +
hw/intc/xive.c | 2 +
hw/intc/xive2.c | 160
Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 36 ++--
1 file changed, 26 insertions(+), 10 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 9d85da0999..5c5c3a2dd6 100644
--- a/hw/intc/xive.c
+++ b/hw/i
this field.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive2.h | 2 ++
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 2 ++
hw/intc/xive2.c| 13 +
4 files changed, 18 insertions(+)
diff --git
fails to check for unpresented
pending interrupts for that context.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 2 ++
hw/intc/xive2.c | 24 +++-
2 files changed, 21 insertions(+), 5 deletions(-)
diff --git
exists
- lwz@0x830 Pull Thread Context to registeradded
lbz@0x838exists
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 7 ++-
hw/intc/xive.c | 6 ++
2 files changed, 12
. Return the number of bytes requested in step 1 to a register.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 2 ++
hw/intc/xive.c | 15 +++
2 files changed, 17 insertions(+)
diff --git a/include/hw
From: Frederic Barrat
The 'PGoFirst' field of a Notify Virtual Processor tells if the NVP
belongs to a VP group.
Also, print the Reporting Cache Line address, if defined.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
incl
: cdd4de68edb6 ("ppc/xive: notify the CPU when the interrupt priority is
more privileged")
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 34 --
1 file changed, 32 insertions(+), 2 deletion
Some the functions that have been created are specific to a ring or context.
Some
of these same functions are being changed to operate on any ring/context. This
will
simplify the next patch sets that are adding additional ring/context operations.
Signed-off-by: Michael Kowal
---
include/hw
THREAD CAM entry.
Note that this operation is almost identical to what we are already doing
for the "Pull OS Context to Odd Thread Reporting Line" operation except
that it also invalidates the Pool and Thread Contexts.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
include/hw
GS Push" TIMA operation
ppc/xive2: Allow 1-byte write of Target field in TIMA
ppc/xive2: Support "Pull Thread Context to Register" operation
ppc/xive2: Support "Pull Thread Context to Odd Thread Reporting Line"
pnv/xive: Add special handling for pool targets
pnv/xiv
From: Frederic Barrat
The OGEN field at offset 0x1F is a new field for Gen2 TIMA. This
patch defines it.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 4
2 files changed, 5
From: Frederic Barrat
The 'info pic' HMP command dumps the state of the interrupt controller.
Add the dump of the NVG and NVC tables to its output to ease debug.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive2.h
THREAD CAM entry.
Note that this operation is almost identical to what we are already doing
for the "Pull OS Context to Odd Thread Reporting Line" operation except
that it also invalidates the Pool and Thread Contexts.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
include/hw
: cdd4de68edb6 ("ppc/xive: notify the CPU when the interrupt priority is
more privileged")
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 34 --
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/hw/intc/xive.c
just support the writing of the value for now.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 8e62c7e75f..8605dd618f 100644
--- a
From: Frederic Barrat
The OGEN field at offset 0x1F is a new field for Gen2 TIMA. This
patch defines it.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 4
2 files changed, 5
exists
- lwz@0x830 Pull Thread Context to registeradded
lbz@0x838exists
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 7 ++-
hw/intc/xive.c | 6 ++
2 files changed, 12
eporting Line"
pnv/xive: Add special handling for pool targets
pnv/xive: Update PIPR when updating CPPR
pnv/xive2: TIMA support for 8-byte OS context push for PHYP
Michael Kowal (3):
pnv/xive: TIMA patch sets pre-req alignment and formatting changes
ppc/xive2: Change context/ring speci
fails to check for unpresented
pending interrupts for that context.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
hw/intc/xive.c | 2 ++
hw/intc/xive2.c | 24 +++-
2 files changed, 21 insertions(+), 5 deletions(-)
diff --git
Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 36 ++--
1 file changed, 26 insertions(+), 10 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 9d85da0999..5c5c3a2dd6 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -74,33 +74,4
this field.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive2.h | 2 ++
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 2 ++
hw/intc/xive2.c| 13 +
4 files changed, 18 insertions(+)
diff --git
. Return the number of bytes requested in step 1 to a register.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
Reviewed-by: Cédric Le Goater
---
include/hw/ppc/xive_regs.h | 2 ++
hw/intc/xive.c | 15 +++
2 files changed, 17 insertions(+)
diff --git a/include/hw
Some the functions that have been created are specific to a ring or context.
Some
of these same functions are being changed to operate on any ring/context. This
will
simplify the next patch sets that are adding additional ring/context operations.
Signed-off-by: Michael Kowal
---
include/hw
From: Frederic Barrat
The 'info pic' HMP command dumps the state of the interrupt controller.
Add the dump of the NVG and NVC tables to its output to ease debug.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h | 12
incl
From: Michael Kowal
Making some pre-requisite alignment changes ahead of the following patch
sets. Making these changes now will ease the review of the patch sets.
Checkpatch wants the closing comment '*/' on a separate line, unless it is
on the same line as the starting comment &#
From: Frederic Barrat
The 'PGoFirst' field of a Notify Virtual Processor tells if the NVP
belongs to a VP group.
Also, print the Reporting Cache Line address, if defined.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2_regs.h | 1 +
hw/in
CAM entry.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h | 2 +
include/hw/ppc/xive2_regs.h | 2 +
include/hw/ppc/xive_regs.h | 3 +
hw/intc/xive.c | 2 +
hw/intc/xive2.c | 160 ++--
5
Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 36 ++--
1 file changed, 26 insertions(+), 10 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 9d85da0999..5c4ca7f6e0 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -67,25 +67,3
just support the writing of the value for now.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 8e62c7e75f..8605dd618f 100644
--- a/hw/intc/xive.c
+++ b/hw/intc
From: Michael Kowal
Making some pre-requisite alignment changes ahead of the following patch
sets. Making these changes now will ease the review of the patch sets.
Checkpatch wants the closing comment '*/' on a separate line, unless it is
on the same line as the starting comment &#
From: Frederic Barrat
The 'PGoFirst' field of a Notify Virtual Processor tells if the NVP
belongs to a VP group.
Also, print the Reporting Cache Line address, if defined.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2_regs.h | 1 +
hw/in
. Return the number of bytes requested in step 1 to a register.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive_regs.h | 2 ++
hw/intc/xive.c | 15 +++
2 files changed, 17 insertions(+)
diff --git a/include/hw/ppc/xive_regs.h b/include/hw
ve: Add special handling for pool targets
pnv/xive: Update PIPR when updating CPPR
pnv/xive2: TIMA support for 8-byte OS context push for PHYP
Michael Kowal (2):
pnv/xive: TIMA patch sets pre-req alignment and formatting changes
pnv/xive2: TIMA CI ops using alternative offsets or byte
fails to check for unpresented
pending interrupts for that context.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 2 ++
hw/intc/xive2.c | 24 +++-
2 files changed, 21 insertions(+), 5 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
exists
- lwz@0x830 Pull Thread Context to registeradded
lbz@0x838exists
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive_regs.h | 7 ++-
hw/intc/xive.c | 6 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git
nctions to be able
to handle any context/ring (OS, Pool, or Thread) that is passed in.
Signed-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive.h | 2 +-
include/hw/ppc/xive2.h | 2 +
include/hw/ppc/xive_regs.h | 1 +
hw/intc/xive.c | 15 +++
hw/
From: Frederic Barrat
The 'info pic' HMP command dumps the state of the interrupt controller.
Add the dump of the NVG and NVC tables to its output to ease debug.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h | 12 ++
incl
-off-by: Glenn Miles
Signed-off-by: Michael Kowal
---
hw/intc/xive.c | 34 --
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 5c4ca7f6e0..d951aac3a0 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -89,7 +89,6
CAM entry.
Signed-off-by: Frederic Barrat
Signed-off-by: Michael Kowal
---
include/hw/ppc/xive2.h | 2 +
include/hw/ppc/xive2_regs.h | 2 +
include/hw/ppc/xive_regs.h | 3 +
hw/intc/xive.c | 2 +
hw/intc/xive2.c | 150 +---
5
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