[PATCH] hw/riscv: Setting address of vector reset is improved

2022-08-15 Thread Maksim Perov
Previously address is set by default value 0x1000 which is hardcoded in target/riscv/cpu_bits.h If add to new RISC-V Machine in which ROM area is not based on 0x1000 address than there is problem of running simulation Signed-off-by: Maksim Perov --- hw/riscv/boot.c | 4 1 file changed, 4

[PATCH] hw/riscv: Setting address of vector reset is improved

2022-08-15 Thread Maksim Perov
Previously address is set by default value 0x1000 which is hardcoded in target/riscv/cpu_bits.h If add to new RISC-V Machine in which ROM area is based on 0x1000 address than there is problem of running simulation Signed-off-by: Maksim Perov --- hw/riscv/boot.c | 4 1 file changed, 4