On Wed, Jul 02, 2025 at 12:32:05PM +0200, Cornelia Huck wrote:
> On Wed, Jul 02 2025, Magnus Kulke wrote:
>
> > I might not have completely understood the process though, do you
> > suggest to run `update-linux-headers.sh` on a current kernel (the other
> > headers seem
On Wed, Jul 02, 2025 at 11:11:41AM +0200, Cornelia Huck wrote:
> On Tue, Jul 01 2025, Magnus Kulke wrote:
>
> > Introduce headers for the Microsoft Hypervisor (MSHV) userspace ABI,
> > including IOCTLs and structures used to interface with the hypervisor.
> >
> >
Implement signal handling for MSHV vCPUs to support asynchronous
interrupts from the main thread.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c
index
Implement MSHV-specific hooks for vCPU creation and teardown in the
i386 target.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c
Implement ioeventfd registration in the MSHV accelerator backend to
handle guest-triggered events. This enables integration with QEMU's
eventfd-based I/O mechanism.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c | 116
accel/mshv/trace-e
Create the MSHV virtual machine by opening a partition and issuing
the necessary ioctl to initialize it. This sets up the basic VM
structure and initial configuration used by MSHV to manage guest state.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c| 210
that's not the case, it will be addressed
in a later commit in the series.
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c| 127 +++-
accel/mshv/trace-events | 16 +
include/system/mshv.h | 11
3 files changed, 151 insertions(+), 3 dele
memory regions (e.g. OVMF will probe
0xfed4 for a vTPM). In those cases 0xFF bytes is returned instead of
aborting the execution.
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c| 65 +++
accel/mshv/mshv-all.c | 2 +-
include/system/mshv.h | 6
decoder/emulator is invoked to
perform the operation in user space.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 463 +++-
1 file changed, 461 insertions(+), 2 deletions(-)
diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c
index
Convert the guest CPU's CPUID model into MSHV's format and register it
with the hypervisor. This ensures that the guest observes the correct
CPU feature set during CPUID instructions.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 199 ++
Add support for writing general-purpose registers to MSHV vCPUs
during initialization or migration using the MSHV register interface. A
generic set_register call is introduced to abstract the HV call over
the various register types.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h
ohno, I planned to drop this commit (we do not receive hlt exits
from the hypervisor anymore), plz ignore.
ff-by: Magnus Kulke
---
include/system/mshv.h | 1 +
target/i386/mshv/mshv-cpu.c | 69 +++--
2 files changed, 68 insertions(+), 2 deletions(-)
diff --git a/include/system/mshv.h b/include/system/mshv.h
index adce4153d9..65f7fa15a0 100644
--- a/include/system/m
0
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c| 264
accel/mshv/trace-events | 7 +-
include/system/mshv.h | 16 ++-
target/i386/mshv/mshv-cpu.c | 43 ++
4 files changed, 295 insertions(+), 35 deletions(-)
diff --git a/accel/ms
Build and register the guest vCPU's model-specific registers using
the MSHV interface.
Signed-off-by: Magnus Kulke
---
accel/mshv/meson.build | 1 +
accel/mshv/msr.c| 372
include/system/mshv.h | 23 +++
target/i386/
Introduce the initial scaffold for the MSHV (Microsoft Hypervisor)
accelerator backend. This includes the basic directory structure and
stub implementations needed to integrate with QEMU's accelerator
framework.
Signed-off-by: Magnus Kulke
---
accel/meson.build | 1 +
accel
Push current model-specific register (MSR) values to MSHV's vCPUs as
part of setting state to the hypervisor.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 68 +++--
1 file changed, 66 insertions(+), 2 deletions(-)
diff --git a/target/i386
Added mshv to the list of accelerators in doc text.
Signed-off-by: Magnus Kulke
---
docs/devel/codebase.rst | 2 +-
qemu-options.hx | 16
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/docs/devel/codebase.rst b/docs/devel/codebase.rst
index 2a3143787a
Implemented handler for HVMSG_X64_HALT exit messages from the
hypervisor.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c | 3 +++
include/system/mshv.h | 1 +
target/i386/mshv/mshv-cpu.c | 26 ++
3 files changed, 30 insertions(+)
diff --git a/accel
being the header `linux-mshv.h` is also being
included to allow building on machines that do not ship the header yet.
The header will be available in kernel 6.15 (at the time of writing
we're at -rc6) we will probably drop it in later revisions of the
patch set.
Signed-off-by: Magnus
To set the local interrupt controller state, perform hv calls retrieving
partition state from the hypervisor.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 117
target/i386/mshv/x86.c | 3 +-
2 files changed, 119 insertions(+), 1
Retrieve special registers (e.g. segment, control, and descriptor
table registers) from MSHV vCPUs.
Various helper functions to map register state representations between
Qemu and MSHV are introduced.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h | 1 +
target/i386/mshv/mshv
Write CPU register state to MSHV vCPUs. Various mapping functions to
prepare the payload for the HV call have been implemented.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h | 15 +++
target/i386/mshv/mshv-cpu.c | 239
2 files changed, 254
Implement initial interrupt handling logic in the MSHV backend. This
includes management of MSI and un/registering of irqfd mechanisms.
Co-authored-by: Stanislav Kinsburskii
Signed-off-by: Magnus Kulke
---
accel/mshv/irq.c| 369
accel/mshv
.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c | 187 +---
accel/mshv/trace-events | 1 +
include/system/mshv.h | 17
target/i386/mshv/mshv-cpu.c | 63
4 files changed, 256 insertions(+), 12 deletions(-)
diff --git a/accel
.
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c | 25
accel/mshv/meson.build | 1 +
accel/mshv/mshv-all.c | 68 --
include/system/mshv.h | 4 +++
4 files changed, 96 insertions(+), 2 deletions(-)
create mode 100644 accel/mshv
ction()" op to x86_emul_ops() to improve
traceability.
Signed-off-by: Magnus Kulke
---
target/i386/emulate/x86_decode.c | 31 +++
target/i386/emulate/x86_decode.h | 10 ++
target/i386/emulate/x86_emu.c| 3 ++-
target/i386/emulate/x86_emu.h| 1
The MSHV accelerator requires a x86 decoder/emulator in userland to
emulate MMIO instructions. This change contains the implementations for
the generalized i386 instruction decoder/emulator.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h | 25 +++
target/i386/cpu.h
Introduce a Meson feature option and default-config entry to allow
building QEMU with MSHV (Microsoft Hypervisor) acceleration support.
This is the first step toward implementing an MSHV backend in QEMU.
Signed-off-by: Magnus Kulke
---
accel/Kconfig | 3 +++
meson.build
Rename APIC helper functions to use an accel_* prefix instead of kvm_*
to support use by accelerators other than KVM. This is a preparatory
step for integrating MSHV support with common APIC logic.
Signed-off-by: Magnus Kulke
---
accel/accel-irq.c | 95
ng discussed.
For now commit #26 will work around this limitation.
- A kernel ioctl "set_immediate_exit" will be added to the mshv driver
to avoid a race condition when handling signals (like ctrl-a x).
Magnus Kulke (27):
accel: Add Meson and config support for MSHV accelerator
On Tue, Jul 01, 2025 at 03:11:39PM +, Wei Liu wrote:
> On Tue, Jul 01, 2025 at 10:35:34AM +0200, Magnus Kulke wrote:
> > On Tue, May 20, 2025 at 10:52:39PM +, Wei Liu wrote:
> > > On Tue, May 20, 2025 at 01:30:17PM +0200, Magnus Kulke wrote:
> > > > +
On Tue, Jul 01, 2025 at 03:47:40PM +, Wei Liu wrote:
>
> We can leave the out for now as long as the guest shutdown works.
>
> Wei.
yup, shutdown works fine, so I will drop the commit from the next patch
set, thanks!
On Tue, May 20, 2025 at 10:52:39PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:17PM +0200, Magnus Kulke wrote:
> > +default:
> > +msg = &exit_msg;
>
> Do you not get any HALT exit? How are you going to shut down the VM?
>
In the WHPX accel
On Tue, May 20, 2025 at 10:52:39PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:17PM +0200, Magnus Kulke wrote:
> > +case HVMSG_GPA_INTERCEPT:
>
> I'm not sure why you want to handle UNMAPPED_GPA and GPA_INTERCEPT
> separately. In Cloud Hypervisor there is
On Tue, May 20, 2025 at 10:38:28PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:15PM +0200, Magnus Kulke wrote:
> > +init_emu(&mshv_x86_emul_ops);
>
> If I'm not mistaken, the name mshv_init_cpu_logic suggests this function
> is called every time a CPU
On Tue, May 20, 2025 at 10:22:27PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:11PM +0200, Magnus Kulke wrote:
> > +/*
> > + * TODO: support asserting an interrupt using interrup_bitmap
> > + * it should be possible if we use the vm_fd
> > + *
On Tue, May 20, 2025 at 10:15:23PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:10PM +0200, Magnus Kulke wrote:
> >
> > +static enum hv_register_name SPECIAL_REGISTER_NAMES[18] = {
> [...]
> > +HV_REGISTER_PENDING_INTERRUPTION,
>
> Why do you thin
On Tue, May 20, 2025 at 08:15:20PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:04PM +0200, Magnus Kulke wrote:
> > Implement initial interrupt handling logic in the MSHV backend. This
> > includes management of MSI and un/registering of irqfd mechanisms.
> >
>
On Fri, May 23, 2025 at 03:37:02PM +, Wei Liu wrote:
> On Fri, May 23, 2025 at 10:23:58AM +0200, Magnus Kulke wrote:
> > On Tue, May 20, 2025 at 07:07:06PM +, Wei Liu wrote:
> > > On Tue, May 20, 2025 at 01:30:01PM +0200, Magnus Kulke wrote:
> > > > Crea
On Tue, May 20, 2025 at 08:07:27PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:02PM +0200, Magnus Kulke wrote:
> > Handle region_add events by invoking the MSHV memory registration
> > +return set_guest_memory(vm_fd, ®ion);
> > +}
> > +
On Tue, May 20, 2025 at 07:07:06PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:01PM +0200, Magnus Kulke wrote:
> > Create the MSHV virtual machine by opening a partition and issuing
> > the necessary ioctl to initialize it. This sets up the basic VM
> >
On Tue, May 20, 2025 at 07:07:06PM +, Wei Liu wrote:
> On Tue, May 20, 2025 at 01:30:01PM +0200, Magnus Kulke wrote:
> > +static void mshv_reset(void *param)
> > +{
> > +warn_report("mshv reset");
>
> What's missing for this hook?
>
Ah, I su
On Tue, May 20, 2025 at 03:53:10PM +0200, Paolo Bonzini wrote:
> On 5/20/25 13:30, Magnus Kulke wrote:
> > Qemu maps regions of userland multiple times into the guest. The MSHV
> > kernel driver detects those overlapping regions and rejects those
> > mappings.
>
> C
Implement initial interrupt handling logic in the MSHV backend. This
includes management of MSI and un/registering of irqfd mechanisms.
Signed-off-by: Magnus Kulke
---
accel/mshv/irq.c| 370
accel/mshv/meson.build | 1 +
accel/mshv/mshv-all.c
Add support for writing general-purpose registers to MSHV vCPUs
during initialization or migration using the MSHV register interface. A
generic set_register call is introduced to abstract the HV call over
the various register types.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h
Convert the guest CPU's CPUID model into MSHV's format and register it
with the hypervisor. This ensures that the guest observes the correct
CPU feature set during CPUID instructions.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 199 ++
.
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c | 25
accel/mshv/meson.build | 1 +
accel/mshv/mshv-all.c | 68 --
include/system/mshv.h | 4 +++
4 files changed, 96 insertions(+), 2 deletions(-)
create mode 100644 accel/mshv
decoder/emulator is invoked to
perform the operation in user space.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 554 ++--
1 file changed, 524 insertions(+), 30 deletions(-)
diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c
that's not the case, it will be addressed
in a later commit in the series.
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c| 116 ++--
accel/mshv/trace-events | 1 +
include/system/mshv.h | 11
3 files changed, 125 insertions(+), 3 dele
Implement signal handling for MSHV vCPUs to support asynchronous
interrupts from the main thread.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c | 28
1 file changed, 28 insertions(+)
diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c
index
Introduce the initial scaffold for the MSHV (Microsoft Hypervisor)
accelerator backend. This includes the basic directory structure and
stub implementations needed to integrate with QEMU's accelerator
framework.
Signed-off-by: Magnus Kulke
---
accel/meson.build | 1 +
accel
would qualify and is currently unmapped, the current region is
unmapped and the requested region is mapped in.
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c| 229 +++-
accel/mshv/mshv-all.c | 2 +
include/system/mshv.h | 13 ++
target
mware:
- Since the MHSV accelerator requires a HyperV hypervisor to be present,
it would make sense to provide testing infrastructure for integration
testing on Azure. We are looking into options how to implement that.
best,
magnus
Magnus Kulke (25):
accel: Add Meson and config supp
Write CPU register state to MSHV vCPUs. Various mapping functions to
prepare the payload for the HV call have been implemented.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h | 41 ++
target/i386/mshv/mshv-cpu.c | 249
2 files changed, 290
Introduce a Meson feature option and default-config entry to allow
building QEMU with MSHV (Microsoft Hypervisor) acceleration support.
This is the first step toward implementing an MSHV backend in QEMU.
Signed-off-by: Magnus Kulke
---
accel/Kconfig | 3 +++
meson.build
.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c | 197 +---
accel/mshv/trace-events | 1 +
include/system/mshv.h | 19
target/i386/mshv/mshv-cpu.c | 63
4 files changed, 268 insertions(+), 12 deletions(-)
diff --git a/accel
Introduce a new helper function to decode x86 instructions from a
raw instruction byte stream. MSHV delivers an instruction stream in a
buffer of the vm_exit message. It can be used to speed up MMIO
emulation, since instructions do not have to be fetched and translated.
Signed-off-by: Magnus
Implement MSHV-specific hooks for vCPU creation and teardown in the
i386 target. A list of locks per vCPU is maintained to lock CPU state in
MMIO operations.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 61 +
1 file changed, 55 insertions
Implement ioeventfd registration in the MSHV accelerator backend to
handle guest-triggered events. This enables integration with QEMU's
eventfd-based I/O mechanism.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c | 115
accel/mshv/trace-e
Create the MSHV virtual machine by opening a partition and issuing
the necessary ioctl to initialize it. This sets up the basic VM
structure and initial configuration used by MSHV to manage guest state.
Signed-off-by: Magnus Kulke
---
accel/mshv/mshv-all.c| 204
Build and register the guest vCPU's model-specific registers using
the MSHV interface.
Signed-off-by: Magnus Kulke
---
accel/mshv/meson.build | 1 +
accel/mshv/msr.c| 375
include/system/mshv.h | 26 +++
target/i386/mshv/mshv-
Push current model-specific register (MSR) values to MSHV's vCPUs as
part of setting state to the hypervisor.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 70 +++--
1 file changed, 68 insertions(+), 2 deletions(-)
diff --git a/target/i386
memory regions (e.g. OVMF will probe
0xfed4 for a vTPM). In those cases 0xFF bytes is returned instead of
aborting the execution.
Signed-off-by: Magnus Kulke
---
accel/mshv/mem.c| 72
accel/mshv/trace-events | 3 +
include/system/mshv.h | 4
ff-by: Magnus Kulke
---
include/system/mshv.h | 1 +
target/i386/mshv/mshv-cpu.c | 70 +
2 files changed, 71 insertions(+)
diff --git a/include/system/mshv.h b/include/system/mshv.h
index b2dec5a7ec..9b78b66a24 100644
--- a/include/system/mshv.h
+++ b/include/s
Retrieve special registers (e.g. segment, control, and descriptor
table registers) from MSHV vCPUs.
Various helper functions to map register state representations between
Qemu and MSHV are introduced.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h | 1 +
target/i386/mshv/mshv
Rename APIC helper functions to use an accel_* prefix instead of kvm_*
to support use by accelerators other than KVM. This is a preparatory
step for integrating MSHV support with common APIC logic.
Signed-off-by: Magnus Kulke
---
accel/accel-irq.c | 95
being the header `linux-mshv.h` is also being
included to allow building on machines that do not ship the header yet.
The header will be available in kernel 6.15 (at the time of writing
we're at -rc6) we will probably drop it in later revisions of the
patch set.
Signed-off-by: Magnus
To set the local interrupt controller state, perform hv calls retrieving
partition state from the hypervisor.
Signed-off-by: Magnus Kulke
---
target/i386/mshv/mshv-cpu.c | 120
1 file changed, 120 insertions(+)
diff --git a/target/i386/mshv/mshv-cpu.c b
The MSHV accelerator requires a x86 decoder/emulator in userland to
emulate MMIO instructions. This change contains the implementations for
the generalized i386 instruction decoder/emulator.
Signed-off-by: Magnus Kulke
---
include/system/mshv.h | 32
target/i386/cpu.h
Hey Paolo,
I applied your patches to the x86 emulator in our MSHV branch. They
compile cleanly (some off this we had changed on our branch already). I
also performed some manual testing and didn't spot any regressions with
the changes in the emulator.
magnus
already). I also performed some manua
On Tue, Apr 29, 2025 at 02:27:21PM +0200, Paolo Bonzini wrote:
> Il mar 29 apr 2025, 14:17 Magnus Kulke ha
> scritto:
>
> > Yes, I'm using the generalized emulator in the context of adding the MSHV
> > accelerator. (I'll probably get around sending an RFC pa
On Tue, Apr 29, 2025 at 12:02:48PM +0200, Paolo Bonzini wrote:
> Il mar 29 apr 2025, 11:33 Magnus Kulke ha
> scritto:
>
> > Fixes: c901905ea670 ("target/i386/emulate: remove flags_mask")
> >
> > In c901905ea670 rflags have been removed from `x86_decod
Fixes: c901905ea670 ("target/i386/emulate: remove flags_mask")
In c901905ea670 rflags have been removed from `x86_decode`, but there
were some leftovers.
Signed-off-by: Magnus Kulke
---
target/i386/emulate/x86_decode.c | 17 ++---
1 file changed, 6 insertions(+), 11
In c901905 rflags have been removed from `x86_decode`, but there were
some leftovers.
Signed-off-by: Magnus Kulke
---
target/i386/emulate/x86_decode.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/target/i386/emulate/x86_decode.c b/target/i386/emulate
In c901905 rflags have been removed from `x86_decode`, but there were
some leftovers.
Signed-off-by: Magnus Kulke
---
target/i386/emulate/x86_decode.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/target/i386/emulate/x86_decode.c b/target/i386/emulate
Hi all,
We would like to informally announce an effort we started at Microsoft to
expose the Microsoft Hypervisor (MSHV) as an alternative accelerator in Qemu on
Linux hosts. L1 VMs that have been launched on Azure or HyperV will be able to
use a /dev/mshv device to accelerate the operation of L2
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