>From 5854070994c5002b3a37577165ed3e82f36f712d Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sat, 8 Mar 2014 04:40:02 +0800
Subject: [PATCH] KVM: x86: Work around buggy MPX platform
Work around buggy MPX platform which support MSR_IA32_BNDCFGS
but has issue at, say, VMX ucode.
Signed-off
>From 3a7783cd9a0556787809d3d5ecb5f2b85dd9fc02 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Mon, 3 Mar 2014 18:56:39 +0800
Subject: [PATCH] target-i386: bugfix of Intel MPX
The correct size of cpuid 0x0d sub-leaf 4 is 0x40, not 0x10.
This is confirmed by Anvin H Peter and Mallick Asi
Paolo Bonzini wrote:
> Il 24/02/2014 11:58, Liu, Jinsong ha scritto:
>> @@ -599,6 +599,9 @@ int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32
>> index, u64 xcr) u64 old_xcr0 = vcpu->arch.xcr0;
>> u64 valid_bits;
>>
>> +if (!kvm_x86_ops->mpx_s
>From 44c2abca2c2eadc6f2f752b66de4acc8131880c4 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Mon, 24 Feb 2014 18:12:31 +0800
Subject: [PATCH v5 3/3] KVM: x86: Enable Intel MPX for guest
This patch enable Intel MPX feature to guest.
Signed-off-by: Xudong Hao
Signed-off-by: Liu Jins
>From 5d5a80cd172ea6fb51786369bcc23356b1e9e956 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Mon, 24 Feb 2014 18:11:55 +0800
Subject: [PATCH v5 2/3] KVM: x86: add MSR_IA32_BNDCFGS to msrs_to_save
Add MSR_IA32_BNDCFGS to msrs_to_save, and corresponding logic
to kvm_get/set_msr().
Signed-
>From caddc009a6d2019034af8f2346b2fd37a81608d0 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Mon, 24 Feb 2014 18:11:11 +0800
Subject: [PATCH v5 1/3] KVM: x86: Intel MPX vmx and msr handle
This patch handle vmx and msr of Intel MPX feature.
Signed-off-by: Xudong Hao
Signed-off-by:
as a standalone patch
* Add a new kvm_x86_ops member mpx_supported, to disable MPX whenever the two
VMX controls are not available
* minor rebase for VMX bit definition
Version 5:
* Add conditional mpx_supported when expose MPX to guest
Thanks,
Jinsong
Liu Jinsong (3):
KVM: x86: Intel
Liu, Jinsong wrote:
> Paolo Bonzini wrote:
>> Il 21/02/2014 18:57, Liu, Jinsong ha scritto:
>>> - F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | F(RDSEED) |
>>> + F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | F(MPX) | F(RDSEED) |
>>>
Paolo Bonzini wrote:
> Il 21/02/2014 18:57, Liu, Jinsong ha scritto:
>> -F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | F(RDSEED) |
>> +F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | F(MPX) | F(RDSEED) |
>> F(ADX);
>
> MPX also needs to be c
Paolo Bonzini wrote:
> Il 22/01/2014 13:03, Paolo Bonzini ha scritto:
>> Il 22/01/2014 06:29, Liu, Jinsong ha scritto:
>>> These patches are version 3 to enalbe Intel MPX for KVM.
>>>
>>> Version 1:
>>> * Add some Intel MPX definiation
>>>
>From 8b3a3b1f08c166e0c2cdc6162e6fa95d9c7ad2ec Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sat, 22 Feb 2014 08:53:27 +0800
Subject: [PATCH v4 3/3] KVM: x86: Enable Intel MPX for guest
This patch enable Intel MPX feature to guest.
Signed-off-by: Xudong Hao
Signed-off-by: Liu Jins
>From 7d1b41c3fdf71e4c73280e117948102f54f74be7 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sat, 22 Feb 2014 08:10:17 +0800
Subject: [PATCH v4 2/3] KVM: x86: add MSR_IA32_BNDCFGS to msrs_to_save
Add MSR_IA32_BNDCFGS to msrs_to_save, and corresponding logic
to kvm_get/set_msr().
Signed-
>From eb56f19c14d5603209b22b97cd53ef1716bf2804 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sat, 22 Feb 2014 07:53:32 +0800
Subject: [PATCH v4 1/3] KVM: x86: Intel MPX vmx and msr handle
This patch handle vmx and msr of Intel MPX feature.
Signed-off-by: Xudong Hao
Signed-off-by:
These patches are version 4 to enable Intel MPX for KVM.
Version 1:
* Add some Intel MPX definiation
* Fix a cpuid(0x0d, 0) exposing bug, dynamic per XCR0 features enable/disable
* vmx and msr handle for MPX support at KVM
* enalbe MPX feature for guest
Version 2:
* remove generic MPX
>From 00c920c96127d20d4c3bb790082700ae375c39a0 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 21 Feb 2014 23:47:18 +0800
Subject: [PATCH] KVM: x86: Fix xsave cpuid exposing bug
EBX of cpuid(0xD, 0) is dynamic per XCR0 features enable/disable.
Bit 63 of XCR0 is reserved for fut
>From 0750e335eb5860b0b483e217e8a08bd743cbba16 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Thu, 20 Feb 2014 17:39:32 +0800
Subject: [PATCH] KVM: x86: expose ADX feature to guest
ADCX and ADOX instructions perform an unsigned addition with Carry flag and
Overflow flag respectively.
Sig
>From 24ffdce9efebf13c6ed4882f714b2b57ef1141eb Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Thu, 20 Feb 2014 17:38:26 +0800
Subject: [PATCH] KVM: x86: expose new instruction RDSEED to guest
RDSEED instruction return a random number, which supplied by a
cryptographically secure, determinis
Paolo Bonzini wrote:
> Il 22/01/2014 13:03, Paolo Bonzini ha scritto:
>> Il 22/01/2014 06:29, Liu, Jinsong ha scritto:
>>> These patches are version 3 to enalbe Intel MPX for KVM.
>>>
>>> Version 1:
>>> * Add some Intel MPX definiation
>>>
These patches are version 3 to enalbe Intel MPX for KVM.
Version 1:
* Add some Intel MPX definiation
* Fix a cpuid(0x0d, 0) exposing bug, dynamic per XCR0 features enable/disable
* vmx and msr handle for MPX support at KVM
* enalbe MPX feature for guest
Version 2:
* remove generic MPX
Yes, I ignore this point. Thanks!
Jinsong
Paolo Bonzini wrote:
> The original patch from Liu Jinsong restricted them to reset or full
> state updates, but that's unnecessary (and wrong) since the BNDCFGS
> MSR has no side effects.
>
> Cc: Liu Jinsong
> Signe
>From 31e68d752ac395dc6b65e6adf45be5324e92cdc8 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 13 Dec 2013 02:32:43 +0800
Subject: [PATCH v3 2/4] KVM/X86: Intel MPX vmx and msr handle
This patch handle vmx and msr of Intel MPX feature.
Signed-off-by: Xudong Hao
Signed-off-by: Liu Jins
>From c2b3b4347b4c8b0aa6b5e97c161fd4d34b0ef4d3 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 13 Dec 2013 02:34:48 +0800
Subject: [PATCH v3 4/4] KVM/X86: Enable Intel MPX for guest.
This patch enable Intel MPX feature to guest.
Signed-off-by: Xudong Hao
Signed-off-by: Liu Jins
>From d1992769911f34cb319fe638d32ae604bd2a6ce8 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 13 Dec 2013 02:33:08 +0800
Subject: [PATCH v3 3/4] KVM/X86: add MSR_IA32_BNDCFGS to msrs_to_save
Add MSR_IA32_BNDCFGS to msrs_to_save, and corresponding logic
to kvm_get/set_msr().
Signed-off
>From 3155a190ce6ebb213e6c724240f4e6620ba67a9d Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 13 Dec 2013 02:32:03 +0800
Subject: [PATCH v3 1/4] KVM/X86: Fix xsave cpuid exposing bug
EBX of cpuid(0xD, 0) is dynamic per XCR0 features enable/disable.
Bit 63 of XCR0 is reserved for fut
Paolo Bonzini wrote:
> Il 21/01/2014 16:25, Liu, Jinsong ha scritto:
>> Hmm? I remember I have sent out the rebased patches v3 last month
>> If you didn't receive them I'm OK to rebase and resend them. BTW,
>> what's the review remarks? I remember you comment
Paolo Bonzini wrote:
> Il 12/12/2013 12:09, Liu, Jinsong ha scritto:
>> Paolo Bonzini wrote:
>>> Il 12/12/2013 06:47, Liu, Jinsong ha scritto:
>>>> Paolo Bonzini wrote:
>>>>> Il 11/12/2013 09:31, Liu, Jinsong ha scritto:
>>>>>> Paolo
Paolo Bonzini wrote:
> Il 12/12/2013 06:47, Liu, Jinsong ha scritto:
>> Paolo Bonzini wrote:
>>> Il 11/12/2013 09:31, Liu, Jinsong ha scritto:
>>>> Paolo, comments for version 2?
>>>
>>> I think I commented that it's fine, I'm j
Paolo Bonzini wrote:
> Il 11/12/2013 09:31, Liu, Jinsong ha scritto:
>> Paolo, comments for version 2?
>
> I think I commented that it's fine, I'm just waiting for a rebase on
> top of the generic patches.
>
> Paolo
>
Thanks! common MPX definiation patche
Paolo, comments for version 2?
Thanks,
Jinsong
Liu, Jinsong wrote:
> These patches are version 2 to enalbe Intel MPX for KVM.
>
> Version 1:
> * Add some Intel MPX definiation
> * Fix a cpuid(0x0d, 0) exposing bug, dynamic per XCR0 features
> enable/disable
> * vmx a
H. Peter Anvin wrote:
> On 12/06/2013 12:05 PM, Liu, Jinsong wrote:
>>>
>>> Since Peter already said the same, please undo these changes.
>>>
>>> Also, how is XSTATE_EAGER used? Should MPX be disabled when
>>> xsaveopt is disabled on the kernel co
Paolo Bonzini wrote:
> Il 07/12/2013 01:20, Qiaowei Ren ha scritto:
>> This patch defines xstate feature and extends struct xsave_hdr_struct
>> to support Intel MPX.
>>
>> Signed-off-by: Qiaowei Ren
>> Signed-off-by: Xudong Hao
>> Signed-off-by: Liu J
Paolo Bonzini wrote:
> Il 06/12/2013 15:06, Liu, Jinsong ha scritto:
>> Intel has released Memory Protection Extensions (MPX) recently.
>> Please refer to
>> http://download-software.intel.com/sites/default/files/319433-015.pdf
>>
>> These 2 patches are version2
Eric Blake wrote:
> On 12/06/2013 07:06 AM, Liu, Jinsong wrote:
>> Intel has released Memory Protection Extensions (MPX) recently.
>> Please refer to
>> http://download-software.intel.com/sites/default/files/319433-015.pdf
>>
>> These 2 patches are version2
Paolo Bonzini wrote:
> Il 02/12/2013 17:46, Liu, Jinsong ha scritto:
>> From e9ba40b3d1820b8ab31431c73226ee3ed485edd1 Mon Sep 17 00:00:00
>> 2001
>> From: Liu Jinsong
>> Date: Tue, 3 Dec 2013 07:02:27 +0800
>> Subject: [PATCH 3/4] KVM/X86: Intel MPX vmx an
>From 12fa3564b7342c4e034b13671dc922ff23ac4b1e Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sat, 7 Dec 2013 05:18:35 +0800
Subject: [PATCH v3 2/2] target-i386: MSR_IA32_BNDCFGS handle
Signed-off-by: Liu Jinsong
---
target-i386/cpu.h |3 +++
target-i386/kvm.c |
>From ee8b72df3b5503514b748035e6b1cb4d61f8e701 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Thu, 5 Dec 2013 08:32:12 +0800
Subject: [PATCH v3 1/2] target-i386: Intel MPX
Add some MPX related definiation, and hardcode sizes and offsets
of xsave features 3 and 4. It also add corresponding p
Intel has released Memory Protection Extensions (MPX) recently.
Please refer to
http://download-software.intel.com/sites/default/files/319433-015.pdf
These 2 patches are version2 to support Intel MPX at qemu side.
Version 1:
* Fix cpuid leaf 0x0d bug which incorrectly parsed eax and ebx;
* Expose
Paolo Bonzini wrote:
> Il 04/12/2013 12:30, Liu, Jinsong ha scritto:
>>>>
>>>> Almost there. Migration (vmstate) is still missing.
>>>>
>> Like this:
>>
>> ==
>> From faead85c0dbe62da896e0ed9e165d98e10216968 Mon Sep
>
> Almost there. Migration (vmstate) is still missing.
>
Like this:
==
>From faead85c0dbe62da896e0ed9e165d98e10216968 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Wed, 4 Dec 2013 16:56:49 +0800
Subject: [PATCH 2/2] target-i386: Intel MPX
Add some MPX related
>From 256484fd75d4eb4d248e5e0f493f16182da59dc2 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Wed, 4 Dec 2013 16:56:49 +0800
Subject: [PATCH v2 2/2] target-i386: Intel MPX
Add some MPX related definiation, and hardcode sizes and offsets
of xsave features 3 and 4. It also add corresponding p
>From cb3b12dd9873929b3a03214e3aa0ee5297e75119 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Tue, 3 Dec 2013 04:17:50 +0800
Subject: [PATCH v2 1/2] target-i386: fix cpuid leaf 0x0d
Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.
However, before this patch the CPUID worked f
Intel has released Memory Protection Extensions (MPX) recently.
Please refer to
http://download-software.intel.com/sites/default/files/319433-015.pdf
These 2 patches are version2 to support Intel MPX at qemu side.
Version 1:
* Fix cpuid leaf 0x0d bug which incorrectly parsed eax and ebx;
* Expose
Paolo Bonzini wrote:
> Il 02/12/2013 17:42, Liu, Jinsong ha scritto:
>> From 1a199d68265ffeb0234530f29d92a00a5edeff75 Mon Sep 17 00:00:00
>> 2001 From: Liu Jinsong
>> Date: Tue, 3 Dec 2013 05:08:19 +0800
>> Subject: [PATCH 2/2] target-i386: Intel MPX
>>
>>
>From 62553aebb7b72f1203fefc59dd4d8969e4216ddb Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Tue, 3 Dec 2013 07:34:32 +0800
Subject: [PATCH 4/4] KVM/X86: Enable Intel MPX for guest
Signed-off-by: Xudong Hao
Signed-off-by: Liu Jinsong
---
arch/x86/kvm/cpuid.c |2 +-
arch/x86/kvm/x8
>From e9ba40b3d1820b8ab31431c73226ee3ed485edd1 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Tue, 3 Dec 2013 07:02:27 +0800
Subject: [PATCH 3/4] KVM/X86: Intel MPX vmx and msr handle
Signed-off-by: Xudong Hao
Signed-off-by: Liu Jinsong
---
arch/x86/include/asm/vmx.h|
>From 4a2eb0a8467b4f278e59d2df209a1bc03349d088 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Tue, 3 Dec 2013 06:28:20 +0800
Subject: [PATCH 2/4] KVM/X86: Fix xsave cpuid exposing bug
EBX of cpuid(0xD, 0) is dynamic per XCR0 features enable/disable.
Bit 63 of XCR0 is reserved for fut
>From fbfa537f690eca139a96c6b2636ab5130bf57716 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 29 Nov 2013 01:27:00 +0800
Subject: [PATCH 1/4] X86: Intel MPX definiation
Signed-off-by: Xudong Hao
Signed-off-by: Liu Jinsong
---
arch/x86/include/asm/cpufeature.h |2 ++
arch/
>From 1a199d68265ffeb0234530f29d92a00a5edeff75 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Tue, 3 Dec 2013 05:08:19 +0800
Subject: [PATCH 2/2] target-i386: Intel MPX
Add some MPX related definiation, and hardcode sizes and offsets
of xsave features 3 and 4.
Signed-off-by: Liu Jins
>From 57751d87392d7ee9df5698bc83b356de654453ef Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Tue, 3 Dec 2013 04:17:50 +0800
Subject: [PATCH 1/2] target-i386: fix cpuid leaf 0x0d
Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.
However, before this patch the CPUID worked fine --
Paolo Bonzini wrote:
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index a8ce117..e30d4ce 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -75,7 +75,7 @@ void kvm_update_cpuid(struct kvm_vcpu *vcpu)
>> (best->eax | ((u64)best->edx << 32)
Paolo Bonzini wrote:
> Il 29/11/2013 14:17, Liu, Jinsong ha scritto:
>> From aac033473bc88befe39a9add99820c0a7118ac90 Mon Sep 17 00:00:00
>> 2001
>> From: root
>> Date: Fri, 22 Nov 2013 00:24:35 +0800
>> Subject: [PATCH 2/2] target-i386: Intel MPX support
>
Paolo Bonzini wrote:
> Il 29/11/2013 14:15, Liu, Jinsong ha scritto:
>> From e4b58c7bafc4d9f913a572a1b1cfee91c92f1637 Mon Sep 17 00:00:00
>> 2001
>> From: Liu Jinsong
>> Date: Fri, 22 Nov 2013 00:24:16 +0800
>> Subject: [PATCH 1/2] target-i386: fix cpuid lea
>From 11ae33723027c7b8e53a8c109f127800d7f0ad6e Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 29 Nov 2013 01:28:19 +0800
Subject: [PATCH 3/4] KVM/X86: Enable Intel MPX for guest
Enable Intel Memory Protection Extension for guest.
Signed-off-by: Xudong Hao
Reviewed-by: Liu Jins
>From 7532bdffe9f74db65f6eff733cb227a66bef932e Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sat, 30 Nov 2013 00:27:02 +0800
Subject: [PATCH 4/4] KVM/X86: Intel MPX vmx and msr handle
Signed-off-by: Xudong Hao
Reviewed-by: Liu Jinsong
---
arch/x86/include/asm/vmx.h|
>From b060be65e466291c91963e58c4880ec614d0b294 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 29 Nov 2013 01:27:53 +0800
Subject: [PATCH 2/4] KVM/X86: Fix xsave cpuid exposing bug
EBX of cpuid(0xD, 0) is dynamic per XCR0 features enable/disable.
Bit 63 of XCR0 is reserved for fut
>From 3a1a011100b38a275d8c95468c12c483e316bb15 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 29 Nov 2013 01:27:00 +0800
Subject: [PATCH 1/4] X86: Intel MPX definiation
Signed-off-by: Xudong Hao
Reviewed-by: Liu Jinsong
---
arch/x86/include/asm/cpufeature.h |2 ++
arch/x86/incl
Intel has released new version of Intel Architecture Instruction Set
Extensions Programming Reference, adding new features like AVX-512,
MPX, etc. Refer to
http://download-software.intel.com/sites/default/files/319433-015.pdf
These patches are to support Intel MPX for KVM.
PATCH 1/4 is some MPX de
>From aac033473bc88befe39a9add99820c0a7118ac90 Mon Sep 17 00:00:00 2001
From: root
Date: Fri, 22 Nov 2013 00:24:35 +0800
Subject: [PATCH 2/2] target-i386: Intel MPX support
Expose cpuid leaf (0xd, 3) and (0xd, 4) to guest.
Fix ebx and re-calculate ecx of cpuid leaf (0xd, 0).
Signed-off-by:
>From e4b58c7bafc4d9f913a572a1b1cfee91c92f1637 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 22 Nov 2013 00:24:16 +0800
Subject: [PATCH 1/2] target-i386: fix cpuid leaf 0x0d
Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.
Signed-off-by: Liu Jinsong
---
target-i386/cp
Intel has released new version of Intel Architecture Instruction Set
Extensions Programming Reference, adding new features like AVX-512,
MPX, etc. Refer to
http://download-software.intel.com/sites/default/files/319433-015.pdf
These 2 patches are prepare patches at qemu side to support Intel MPX fe
Ian Campbell wrote:
> On Mon, 2013-09-09 at 03:29 +0000, Liu, Jinsong wrote:
>> From 18344216b432648605726b137b348f28ef64a4ef Mon Sep 17 00:00:00
>> 2001
>> From: Liu Jinsong
>> Date: Fri, 23 Aug 2013 23:30:23 +0800
>> Subject: [PATCH V3] xl: HVM domain S3 bugfi
Ping?
Thanks,
Jinsong
Liu, Jinsong wrote:
> Liu, Jinsong wrote:
>> From 7d93370e8005499d18507b8cd9fa71f4ae794e19 Mon Sep 17 00:00:00
>> 2001 From: Liu Jinsong
>> Date: Fri, 6 Sep 2013 16:34:56 +0800
>> Subject: [PATCH] qemu-xen: vt-d bugfix for pci rom
>>
>
>From 18344216b432648605726b137b348f28ef64a4ef Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 23 Aug 2013 23:30:23 +0800
Subject: [PATCH V3] xl: HVM domain S3 bugfix
Currently Xen hvm s3 has a bug coming from the difference between
qemu-traditioanl and qemu-xen. For qemu-traditional,
>From 63668de43b6512c1db06405b0d2d1e0a0c68244b Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sun, 8 Sep 2013 00:39:45 +0800
Subject: [PATCH V3 2/2] qemu: Add qemu xen logic for Xen HVM S3 resume
This patch is qemu patch 2 to fix Xen HVM S3 bug, adding qemu
xen logic. When qemu wakeup, q
>From 6f40a66521e012170493964a2135fb3b4ae7c9b2 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sun, 8 Sep 2013 00:33:19 +0800
Subject: [PATCH V3 1/2] qemu: Adjust qemu wakeup
Currently Xen hvm s3 has a bug coming from the difference between
qemu-traditioanl and qemu-xen. For qemu-traditio
Paolo Bonzini wrote:
> Il 29/08/2013 10:25, Liu, Jinsong ha scritto:
>> Currently HVM S3 has a bug coming from the difference between
>> qemu-traditioanl and qemu-xen. For qemu-traditional, the way
>> to resume from hvm s3 is via 'xl trigger' command. However,
>
Liu, Jinsong wrote:
> From 7d93370e8005499d18507b8cd9fa71f4ae794e19 Mon Sep 17 00:00:00 2001
> From: Liu Jinsong
> Date: Fri, 6 Sep 2013 16:34:56 +0800
> Subject: [PATCH] qemu-xen: vt-d bugfix for pci rom
>
Sorry, update 'From: Liu Jinsong ' and add some
erro
Stefano Stabellini wrote:
> On Tue, 3 Sep 2013, Liu, Jinsong wrote:
>> Anthony PERARD wrote:
>>> On 01/09/13 10:51, Liu, Jinsong wrote:
>>>> From 86ad3bb83a984ad7bbc00b81d6a0bfc1abc543ca Mon Sep 17 00:00:00
>>>> 2001 From: Liu Jinsong
>>>> Dat
>From 7d93370e8005499d18507b8cd9fa71f4ae794e19 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Fri, 6 Sep 2013 16:34:56 +0800
Subject: [PATCH] qemu-xen: vt-d bugfix for pci rom
Remove incorrect memory_region_init_rom_device() from xen_pt_register_regions(),
otherwise vt-d device with pci
Anthony PERARD wrote:
> On 01/09/13 10:51, Liu, Jinsong wrote:
>> From 86ad3bb83a984ad7bbc00b81d6a0bfc1abc543ca Mon Sep 17 00:00:00
>> 2001
>> From: Liu Jinsong
>> Date: Sun, 1 Sep 2013 23:39:14 +0800
>> Subject: [PATCH 1/2] qemu-xen: add later wakeup logic when
>
> Could you break this path into two? One which add the notifier list
> and a second one with the Xen specific part?
>
Updated and sent out.
Thanks,
Jinsong
>From e7d4bd70eae8da131dc3ff2cec70cb2c7b6575a9 Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Mon, 2 Sep 2013 00:39:20 +0800
Subject: [PATCH 2/2] qemu-xen: add qemu xen logic for HVM S3 resume
This patch is qemu-xen patch 2 to fix HVM S3 bug, adding qemu
xen logic. When qemu wakeup, qemu
>From 86ad3bb83a984ad7bbc00b81d6a0bfc1abc543ca Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Sun, 1 Sep 2013 23:39:14 +0800
Subject: [PATCH 1/2] qemu-xen: add later wakeup logic when qemu wakeup
Currently HVM S3 has a bug coming from the difference between
qemu-traditioanl and qemu-xen.
ters a wakeup later notify,
so that when 'xl trigger' command invokes QMP system_wakeup and after
qemu system reset, it hypercalls to hypervisor to unpause domain, then
hvm S3 resumes successfully.
Signed-off-by: Liu Jinsong
---
vl.c | 13 +
xen-all.c |9 ++
QMP system_wakeup so that
qemu-xen logic for hvm s3 could be triggerred.
Signed-off-by: Liu Jinsong
---
tools/libxl/libxl.c | 31 +--
tools/libxl/libxl_internal.h |2 ++
tools/libxl/libxl_qmp.c |5 +
3 files changed, 36 insertions(+), 2 del
Paolo Bonzini wrote:
> Il 19/08/2013 16:59, Andreas Färber ha scritto:
>> qemu-kvm is no longer maintained since 1.3 so it should not be
>> occurring any more.
>>
>> Please use a prefix of "target-i386: " (the directory name) to signal
>> where you are changing code, i.e. x86 only.
>>
>> "bugfix
Andreas Färber wrote:
> Am 19.08.2013 16:31, schrieb Liu, Jinsong:
>> Paolo Bonzini wrote:
>>>
>>> The patch looks good. Please repost it with checkpatch.pl failures
>>> fixed.
>>>
>>> Paolo
>>
>> Thanks St
Ping?
Thanks,
Jinsong
Liu, Jinsong wrote:
> From fc928436df17673bfea1d902859c682c99c1489d Mon Sep 17 00:00:00 2001
> From: Liu Jinsong
> Date: Wed, 14 Aug 2013 05:26:56 +0800
> Subject: [PATCH] Qemu-xen: HVM S3 bugfix
>
> This patch is used to fix HVM S3 bug caused f
Paolo Bonzini wrote:
>
> The patch looks good. Please repost it with checkpatch.pl failures
> fixed.
>
> Paolo
Thanks Stefan and Paolo! Updated patch attached.
Regards,
Jinsong
===
>From a0ddf948d40e42de862543157a5668a1c12faae6 Mon Sep 17 00:00:00 2001
From:
>From 1273f8b2e5464ec987facf9942fd3ccc0b69087e Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Mon, 19 Aug 2013 09:33:30 +0800
Subject: [PATCH] qemu-kvm bugfix for IA32_FEATURE_CONTROL
This patch is to fix the bug https://bugs.launchpad.net/qemu-kvm/+bug/1207623
IA32_FEATURE_CONTROL
>From 1273f8b2e5464ec987facf9942fd3ccc0b69087e Mon Sep 17 00:00:00 2001
From: Liu Jinsong
Date: Mon, 19 Aug 2013 09:33:30 +0800
Subject: [PATCH] qemu-kvm bugfix for IA32_FEATURE_CONTROL
This patch is to fix the bug https://bugs.launchpad.net/qemu-kvm/+bug/1207623
IA32_FEATURE_CONTROL
Avi Kivity wrote:
> On 09/10/2012 01:44 PM, Liu, Jinsong wrote:
>> Hi,
>>
>> I'm recently debugging a qemu-kvm issue. I add some print code like
>> 'fprintf(stderr, ...)', however I fail to see any info at stdio.
>> Anyone can tell me where is qemu
Hi,
I'm recently debugging a qemu-kvm issue. I add some print code like
'fprintf(stderr, ...)', however I fail to see any info at stdio. Anyone can
tell me where is qemu-kvm logfile, or, what I need do to record my fprintf info?
Thanks,
Jinsong
mails regarding to cpuid
exposing these days.
However, I think I may ignore something (so many discussion :-), so if you
think anything wrong, please point out to me.
Thanks,
Jinsong
>From 8b5b003f6f8834d2d5d71e18bb47b7f089bc4928 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong
Date
Eduardo Habkost wrote:
> On Thu, Jun 14, 2012 at 07:02:03PM +0000, Liu, Jinsong wrote:
>> Eduardo, Jan
>>
>> I will update tsc deadline timer patch (at qemu-kvm side) recently.
>> Have you made a final agreement of the issue
>> 'KVM_CAP_TSC_DEADLINE_TIMER
Eduardo, Jan
I will update tsc deadline timer patch (at qemu-kvm side) recently.
Have you made a final agreement of the issue 'KVM_CAP_TSC_DEADLINE_TIMER' vs.
'GET_SUPPORTED_CPUID'?
Thanks,
Jinsong
Eduardo Habkost wrote:
> (CCing Andre Przywara, in case he can help to clarify what's the
> expe
Eduardo Habkost wrote:
> On Fri, Mar 09, 2012 at 09:52:29PM +0100, Jan Kiszka wrote:
>> On 2012-03-09 20:09, Liu, Jinsong wrote:
>>> Jan Kiszka wrote:
>>>> On 2012-03-09 19:27, Liu, Jinsong wrote:
>>>>> Jan Kiszka wrote:
>>>&g
Eduardo Habkost wrote:
> On Fri, Mar 23, 2012 at 03:49:27AM +0000, Liu, Jinsong wrote:
>> Eduardo Habkost wrote:
>>> [1] From Documentation/virtual/kvm/api.txt:
>>>
>>> "KVM_GET_SUPPORTED_CPUID
>>> [...]
>>> This ioctl returns x86 cpui
Eduardo Habkost wrote:
> On Tue, Mar 20, 2012 at 12:53:57PM +0000, Liu, Jinsong wrote:
>> Rik van Riel wrote:
>>> On 03/09/2012 01:27 PM, Liu, Jinsong wrote:
>>>
>>>> As for 'tsc deadline' feature exposing, my patch (as attached) just
>&
Rik van Riel wrote:
> On 03/09/2012 01:27 PM, Liu, Jinsong wrote:
>
>> As for 'tsc deadline' feature exposing, my patch (as attached) just
>> obey qemu general cpuid exposing method, and also satisfied your
>> target I think.
>
> One question.
>
>
Jan Kiszka wrote:
> On 2012-03-09 20:09, Liu, Jinsong wrote:
>> Jan Kiszka wrote:
>>> On 2012-03-09 19:27, Liu, Jinsong wrote:
>>>> Jan Kiszka wrote:
>>>>> On 2012-03-06 08:49, Liu, Jinsong wrote:
>>>>>> Jan,
>>>>>>
Liu, Jinsong wrote:
> Jan Kiszka wrote:
>> On 2012-03-06 08:49, Liu, Jinsong wrote:
>>> Jan,
>>>
>>> Any comments? I feel some confused about your point 'disable cpuid
>>> feature for older machine types by default': are you planning a
>
Jan Kiszka wrote:
> On 2012-03-09 19:27, Liu, Jinsong wrote:
>> Jan Kiszka wrote:
>>> On 2012-03-06 08:49, Liu, Jinsong wrote:
>>>> Jan,
>>>>
>>>> Any comments? I feel some confused about your point 'disable cpuid
>>>> feat
Jan Kiszka wrote:
> On 2012-03-06 08:49, Liu, Jinsong wrote:
>> Jan,
>>
>> Any comments? I feel some confused about your point 'disable cpuid
>> feature for older machine types by default': are you planning a
>> common approach for this common issue, or,
Jan,
Any comments? I feel some confused about your point 'disable cpuid feature for
older machine types by default': are you planning a common approach for this
common issue, or, you just ask me a specific solution for the tsc deadline
timer case?
Thanks,
Jinsong
Liu, Jinsong wr
Avi,
Any comments?
Thanks,
Jinsong
Liu, Jinsong wrote:
> From ecd8be962f69393c183f941bfdbd7a7d3876d442 Mon Sep 17 00:00:00 2001
> From: Liu, Jinsong
> Date: Mon, 27 Feb 2012 05:19:32 +0800
> Subject: [PATCH] KVM: expose Intel cpu new features to guest
>
> Intel recently rele
ser to control the feature exposing via a cpu feature flag.
Signed-off-by: Liu, Jinsong
---
target-i386/cpu.h |1 +
target-i386/cpuid.c |2 +-
target-i386/kvm.c |4
3 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index d9
>From ecd8be962f69393c183f941bfdbd7a7d3876d442 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong
Date: Mon, 27 Feb 2012 05:19:32 +0800
Subject: [PATCH] KVM: expose Intel cpu new features to guest
Intel recently release 2 new features, HLE and TRM.
Refer to http://software.intel.com/file/41417.
T
Jan Kiszka wrote:
> On 2012-01-07 19:23, Liu, Jinsong wrote:
>> Jan Kiszka wrote:
>>> On 2012-01-05 18:07, Liu, Jinsong wrote:
>>>>> Sorry, it remains bogus to expose the tsc deadline timer feature
>>>>> on machines < pc-1.1. That's just
Jan Kiszka wrote:
> On 2012-01-05 18:07, Liu, Jinsong wrote:
>>> Sorry, it remains bogus to expose the tsc deadline timer feature on
>>> machines < pc-1.1. That's just like we introduced kvmclock only to
>>> pc-0.14 onward. The reason is that guest OSes s
1 - 100 of 135 matches
Mail list logo
