values of MSR_EP bit in new msr value
and inverted msr are distinct, so that excp_prefix changes but should
not.
Signed-off-by: Kurban Mallachiev
---
target/ppc/machine.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/machine.c b/target/ppc/machine.c
index
efix.
AFAIU we should multiply env->msr by msr_mask, but I am not sure where we
should do it: inside hreg_store_msr or outside. This is why this patch is RFC.
Current version of the patch adds msr_mask multiplication before the
hreg_store_msr call.
Kurban
Kurban Mallachiev (1):
target-p
Yes, Thomas, this patch fixes the issue.
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https://bugs.launchpad.net/bugs/1694998
Title:
PPC: msgsnd instruction leads to assertion
Status in QEMU:
New
Bug description:
I tried t
Public bug reported:
I tried to send doorbells (using msgsnd) between cores in guest OS. On QEMU
v2.9.0 usage of msgsnd instruction leads to error:
ERROR: <...>/qemu-new/translate-common.c:34:tcg_handle_interrupt: assertion
failed: (qemu_mutex_iothread_locked())
QEMU v2.8.0 works fine.
QEMU r
ach, patch completely rewritten
v2 -> v3: in software reset add preserving of CLKSRC bit as manual says
---
Software reset function clears CR bits that should not be cleared and
preserve bits that should be cleared.
Signed-off-by: Kurban Mallachiev
---
hw/timer/imx_gpt.
function clears CR bits that should not clear and
preserve bits that should clear.
Signed-off-by: Kurban Mallachiev
---
hw/timer/imx_gpt.c | 26 --
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index 010ccbf207
I
can create a new patch.
---
From e12f689a2f41d18a29714771d83e343ca5195b61 Mon Sep 17 00:00:00 2001
From: Kurban Mallachiev
Date: Fri, 17 Feb 2017 20:30:49 +0300
Subject: [PATCH] i.MX timers: fix software reset
Software reset function clears CR bits that should not clear and
preserv
