Re: [PATCH 3/3] target/riscv: Add cycle & instret privilege mode filtering support

On Tue, Jul 18, 2023 at 6:25 PM Weiwei Li wrote: > > > On 2023/7/19 06:47, Kaiwen Xue wrote: > > QEMU only calculates dummy cycles and instructions, so there is no > > actual means to stop the icount in QEMU. Hence this patch merely adds > > the functionality of accessing the cfg registers, and ca

Re: [PATCH 1/3] target/riscv: Add cycle & instret privilege mode filtering properties

On Tue, Jul 18, 2023 at 6:21 PM Weiwei Li wrote: > > > On 2023/7/19 06:47, Kaiwen Xue wrote: > > This adds the properties for ISA extension smcntrpmf. Patches > > implementing it will follow. > > > > Signed-off-by: Kaiwen Xue > > Signed-off-by: Kaiwen Xue > > --- > > target/riscv/cpu.c | 2