[PATCH v1 1/1] hw/misc/aspeed_sbc: Implement OTP memory and controller

2025-04-05 Thread Kane-Chen-AS via
This patch adds the OTP memory and its controller as part of the Secure Boot Controller (SBC) device model. The OTP memory content is persisted to a file named 'otpmem', which is created if it does not already exist. Signed-off-by: Kane-Chen-AS --- hw/misc/aspeed_sbc.c | 304

[PATCH v1 0/1] hw/misc/aspeed_sbc: Implement OTP memory and controller

2025-04-02 Thread Kane-Chen-AS via
This patch introduces part of the Secure Boot Controller device, which consists of several sub-components, including an OTP memory, OTP controller, cryptographic engine, and boot controller. In this version, the implementation includes the OTP memory and its controller. The OTP memory can be progr