On Thu, May 08, 2025 at 06:50:34PM -0400, Zhuoying Cai wrote:
> The secure-IPL-code-loading-attributes facility (SCLAF)
> provides additional security during IPL.
>
> Availability of SCLAF is determined by byte 136 bit 3 of the
> SCLP Read Info block.
>
> Signed-off-by: Zhuoying Cai
> ---
> tar
On Tue, May 06, 2025 at 02:16:18PM +0200, Shalini Chellathurai Saroja wrote:
> On 2025-05-06 09:48, Thomas Huth wrote:
> > On 06/05/2025 08.48, Nina Schoetterl-Glausch wrote:
> > > On Mon, 2025-05-05 at 08:55 +0200, Shalini Chellathurai Saroja wrote:
> > > > On 2025-04-28 11:22, Janis Schoetterl-Gl
The MSA 12 facility depends on MSA 6 for which only its
subfunctions are defined as features. Hence, require all
MSA 6 subfunctions as pre-requisite for MSA 12.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_models.c | 12
1 file changed, 12 insertions(+)
diff --git a
On Mon, Dec 09, 2024 at 04:45:25PM +0100, Janosch Frank wrote:
> On 12/9/24 4:24 PM, Hendrik Brueckner wrote:
> > On Mon, Dec 09, 2024 at 03:48:11PM +0100, Janosch Frank wrote:
> > > On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
> > > > MSA12 changes the KIMD/KLMD ins
On Mon, Dec 09, 2024 at 04:04:19PM +0100, Janosch Frank wrote:
> On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
> > MSA11 introduces new HMAC subfunctions.
> >
> > Signed-off-by: Hendrik Brueckner
> > Reviewed-by: Christian Borntraeger
> > ---
> > t
On Mon, Dec 09, 2024 at 03:48:11PM +0100, Janosch Frank wrote:
> On 12/6/24 1:27 PM, Hendrik Brueckner wrote:
> > MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
> >
> > Signed-off-by: Hendrik Brueckner
> > Reviewed-by: Christian Borntraeger
>
&g
The PLO functions 0, 4, 8, 12, 16, and 20 use 32-bit registers
values. The plo-*gr variants use 64-bit instead and, thus, correct
the wording.
Signed-off-by: Hendrik Brueckner
Reviewed-by: Janosch Frank
---
target/s390x/cpu_features_def.h.inc | 12 ++--
1 file changed, 6 insertions
MSA10 introduces new AES XTS subfunctions.
Signed-off-by: Hendrik Brueckner
Reviewed-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 6 ++
target/s390x/cpu_models.c | 4
target/s390x/gen-features.c
MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
Signed-off-by: Hendrik Brueckner
Reviewed-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/gen-features.c | 8
3 files changed, 10
This facility introduces new capabilities for the signed-pack-decimal
format.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc
b/target
This linux headers update includes required changes for
the gen17 CPU model.
Signed-off-by: Hendrik Brueckner
Suggested-by: Thomas Huth
---
include/standard-headers/drm/drm_fourcc.h | 1 +
include/standard-headers/linux/ethtool.h | 5 +
include/standard-headers/linux/pci_regs.h
This commit introduces the definition of the gen17a/gen17b CPU model.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_models.c | 2 ++
target/s390x/gen-features.c | 33 +
2 files changed, 35 insertions(+)
diff --git a/target/s390x/cpu_models.c b/target
This facility introduces few new instructions.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_features_def.h.inc
b/target/s390x/cpu_features_def.h.inc
index 0b7be0e6e9..8be2e0e46d 100644
--- a/target
Introduce a new PTFF subfunction to query-stamp events.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/gen-features.c | 9 +
3 files changed, 11 insertions(+)
diff --git a/target/s390x
MSA13 introduces query authentication information (QAI) subfunctions.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 12
target/s390x/gen-features.c | 26 ++
3 files changed, 40
MSA11 introduces new HMAC subfunctions.
Signed-off-by: Hendrik Brueckner
Reviewed-by: Christian Borntraeger
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 10 ++
target/s390x/cpu_models.c | 8
target/s390x/gen-features.c
The Vector Enhancements facility 3 introduces new instructions and
extends support for doubleword/quadword elements.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/target
The PLO-extension facility introduces numerous locking related
subfunctions.
Signed-off-by: Hendrik Brueckner
Reviewed-by: Janosch Frank
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h.inc | 39 +
target/s390x/cpu_models.c | 38
This facility indicates reduced support for noncontrained
transactional-execution.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc
b
The sequential instruction fetching facility provides few guarantees,
for example, to avoid stop machine calls on enabling/disabling kprobes.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x
The Concurrent-functions facility introduces the new instruction
Perform Functions with Concurrent Results (PFCR) with few subfunctions.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features.h | 1 +
target/s390x
a12 and PLO extensions
Feedback and review is always welcome. Thanks a lot!
Kind regards,
Hendrik
Hendrik Brueckner (15):
s390x/cpumodel: add msa10 subfunctions
s390x/cpumodel: add msa11 subfunctions
s390x/cpumodel: add msa12 changes
s390x/cpumodel: add msa13 subfunctions
s390x/cpumo
MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/gen-features.c | 8
2 files changed, 9 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc
b/target/s390x
The PLO functions 0, 4, 8, 12, 16, and 20 use 32-bit registers
values. The plo-*gr variants use 64-bit instead and, thus, correct
the wording.
Signed-off-by: Hendrik Brueckner
Reviewed-by: Janosch Frank
---
target/s390x/cpu_features_def.h.inc | 12 ++--
1 file changed, 6 insertions
The Concurrent-functions facility introduces the new instruction
Perform Functions with Concurrent Results (PFCR) with few subfunctions.
Signed-off-by: Hendrik Brueckner
---
linux-headers/asm-s390/kvm.h| 3 ++-
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features.h
The PLO-extension facility introduces numerous locking related
subfunctions.
Signed-off-by: Hendrik Brueckner
Reviewed-by: Janosch Frank
---
target/s390x/cpu_features_def.h.inc | 39 +++
target/s390x/cpu_models.c | 38 ++
target/s390x
This facility introduces new capabilities for the signed-pack-decimal
format.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc
b/target
MSA10 introduces new AES XTS subfunctions.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 6 ++
target/s390x/cpu_models.c | 4
target/s390x/gen-features.c | 20
4 files
This facility introduces few new instructions.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x/cpu_features_def.h.inc
b/target/s390x/cpu_features_def.h.inc
index 0b7be0e6e9..8be2e0e46d 100644
--- a/target
This facility indicates reduced support for noncontrained
transactional-execution.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/s390x/cpu_features_def.h.inc
b
Introduce a new PTFF subfunction to query-stamp events.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features.c | 1 +
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/gen-features.c | 9 +
3 files changed, 11 insertions(+)
diff --git a/target/s390x
This commit introduces the definition of the gen17a/gen17b CPU model.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_models.c | 2 ++
target/s390x/gen-features.c | 33 +
2 files changed, 35 insertions(+)
diff --git a/target/s390x/cpu_models.c b/target
MSA11 introduces new HMAC subfunctions.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 10 ++
target/s390x/cpu_models.c | 8
target/s390x/gen-features.c | 24
4
:
https://lore.kernel.org/kvm/20241107152319.77816-1-brueck...@linux.ibm.com/T/#me506dc2ca538aee3cfc13620a48bdb686c459ab0
Feedback and review is always welcome. Thanks a lot!
Kind regards,
Hendrik
Hendrik Brueckner (14):
s390x/cpumodel: add msa10 subfunctions
s390x/cpumodel: add msa11
The sequential instruction fetching facility provides few guarantees,
for example, to avoid stop machine calls on enabling/disabling kprobes.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/s390x
The Vector Enhancements facility 3 introduces new instructions and
extends support for doubleword/quadword elements.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/target
MSA13 introduces query authentication information (QAI) subfunctions.
Signed-off-by: Hendrik Brueckner
---
target/s390x/cpu_features.c | 2 ++
target/s390x/cpu_features_def.h.inc | 12
target/s390x/gen-features.c | 26 ++
3 files changed, 40
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