[PATCH 1/1] goldfish_rtc: keep time offset when resetting

. Reported-by: Frederik Du Toit Lotter Signed-off-by: Heinrich Schuchardt --- hw/rtc/goldfish_rtc.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c index 0f1b53e0e4..203a343511 100644 --- a/hw/rtc/goldfish_rtc.c +++ b

Re: [PATCH-for-10.0 1/1] goldfish_rtc: keep time offset when resetting

On 21.03.25 17:08, Philippe Mathieu-Daudé wrote: Hi Heinrich, On 21/3/25 09:12, Heinrich Schuchardt wrote: Currently resetting leads to resynchronizing the Goldfish RTC with the system clock of the host. In real hardware an RTC reset would not change the wall time. Other RTCs like pl031 do not

[PATCH v2 1/1] goldfish_rtc: keep time offset when resetting

. Cc: qemu-sta...@nongnu.org Reported-by: Frederik Du Toit Lotter Fixes: 9a5b40b8427 ("hw: rtc: Add Goldfish RTC device") Signed-off-by: Heinrich Schuchardt Reviewed-by: Philippe Mathieu-Daudé --- v2: Remove a superfluous intialization to nul. Add Cc:, Fixes:, and R

Re: [PATCH 1/1] pc-bios: add missing riscv64 descriptor

On 17.12.24 12:12, Michael Tokarev wrote: 12.12.2024 12:00, Heinrich Schuchardt wrote: Without descriptor libvirt cannot discover the EDK II binaries via the qemu:///system connection. Shouldn't this one be picked up for qemu-stable@? Thanks, /mjt Hello Michael, Yes, please, the

[PATCH 1/1] pc-bios: add missing riscv64 descriptor

Without descriptor libvirt cannot discover the EDK II binaries via the qemu:///system connection. Signed-off-by: Heinrich Schuchardt --- pc-bios/descriptors/60-edk2-riscv64.json | 31 pc-bios/descriptors/meson.build | 3 ++- 2 files changed, 33 insertions

[PATCH v2 1/1] target/riscv: enable floating point unit

ction while running QEMU with --accel kvm, and runs fine with --accel tcg. With this patch the FPU will be enabled when entering S-mode in KVM mode and when entering M-mode in TCG mode. Signed-off-by: Heinrich Schuchardt --- v2: Rewrite the commit message as suggested in the v1 t

Re: [PATCH 1/1] target/riscv: enable floating point unit

On 18.09.24 17:32, Peter Maydell wrote: On Wed, 18 Sept 2024 at 14:49, Heinrich Schuchardt wrote: On 18.09.24 15:12, Peter Maydell wrote: On Wed, 18 Sept 2024 at 14:06, Heinrich Schuchardt wrote: Thanks Peter for looking into this. QEMU's cpu_synchronize_all_post_init(

Re: [PATCH 1/1] target/riscv: enable floating point unit

On 18.09.24 15:56, Andrew Jones wrote: Thanks Heinrich, I had also forgotten that distinction. So the last question is whether or not we want to reset mstatus.FS to 1 instead of 3, as is done in this patch. Thanks, drew If the FD flag set to 3 (Dirty) indicates that "the corresponding state

Re: [PATCH 1/1] target/riscv: enable floating point unit

On 18.09.24 15:12, Peter Maydell wrote: On Wed, 18 Sept 2024 at 14:06, Heinrich Schuchardt wrote: Thanks Peter for looking into this. QEMU's cpu_synchronize_all_post_init() and do_kvm_cpu_synchronize_post_reset() both end up in kvm_arch_put_registers() and that is long after

Re: [PATCH 1/1] target/riscv: enable floating point unit

On 18.09.24 13:10, Peter Maydell wrote: On Wed, 18 Sept 2024 at 07:06, Andrew Jones wrote: On Tue, Sep 17, 2024 at 06:45:21PM GMT, Heinrich Schuchardt wrote: ... When thinking about the migration of virtual machines shouldn't QEMU be in control of the initial state of vcpus instead o

Re: [PATCH 1/1] target/riscv: enable floating point unit

On 17.09.24 16:49, Andrew Jones wrote: On Tue, Sep 17, 2024 at 03:28:42PM GMT, Heinrich Schuchardt wrote: On 17.09.24 14:13, Andrew Jones wrote: On Mon, Sep 16, 2024 at 08:16:33PM GMT, Heinrich Schuchardt wrote: OpenSBI enables the floating point in mstatus. For consistency QEMU/KVM should do

Re: [PATCH 1/1] target/riscv: enable floating point unit

On 17.09.24 14:13, Andrew Jones wrote: On Mon, Sep 16, 2024 at 08:16:33PM GMT, Heinrich Schuchardt wrote: OpenSBI enables the floating point in mstatus. For consistency QEMU/KVM should do the same. Without this patch EDK II with TLS enabled crashes when hitting the first floating point

[PATCH 1/1] target/riscv: enable floating point unit

should be changed to make no assumptions about the state of the floating point unit. Signed-off-by: Heinrich Schuchardt --- target/riscv/cpu.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4bda754b01..c32e2721d4 100644 --- a/target/riscv

[PATCH 1/1] qemu-options.hx: correct formatting -smbios type=4

processor-family and processor-id can be assigned independently. Add missing brackets. Fixes: b5831d79671c ("smbios: add processor-family option") Signed-off-by: Heinrich Schuchardt --- qemu-options.hx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu-options

Re: [PATCH] roms/opensbi: Update to v1.5

On 7/15/24 19:15, Daniel Henrique Barboza wrote: Update OpenSBI and the pre-built opensbi32 and opensbi64 images to v1.5. The following commits were included in v1.5: 455de67 include: Bump-up version to 1.5 23b7bad lib: sbi: check incoming dbtr shmem address 0e45b63 docs: Fix wrong filename caa

Re: [RFC v2 2/2] hw/riscv: Add server platform reference machine

On 3/22/24 08:14, Marcin Juszkiewicz wrote: W dniu 22.03.2024 o 05:55, Alistair Francis pisze: I see no mention of device trees in the spec, but I do see ACPI. Do we really expect a server platform to use DTs? This platform "kind of" follows sbsa-ref where we have very minimalistic device tre

Re: [RISC-V][tech-server-platform] [RISC-V][tech-server-soc] [RFC 2/2] target/riscv: Add server platform reference cpu

On 07.03.24 08:36, Wu, Fei2 wrote: On 3/6/2024 9:26 PM, Wu, Fei wrote: On 3/5/2024 1:58 PM, Wu, Fei wrote: On 3/5/2024 3:43 AM, Daniel Henrique Barboza wrote: On 3/4/24 07:25, Fei Wu wrote: The harts requirements of RISC-V server platform [1] require RVA23 ISA profile support, plus Sv48, Sv

Re: [RISC-V][tech-server-platform] [RFC 0/2] Add RISC-V Server Platform Reference Board

On 04.03.24 11:25, Wu, Fei2 wrote: The RISC-V Server Platform specification[1] defines a standardized set of hardware and software capabilities, that portable system software, such as OS and hypervisors can rely on being present in a RISC-V server platform. This patchset provides a RISC-V Server

Re: [PATCH, v2] physmem: avoid bounce buffer too small

On 29.02.24 13:34, Peter Maydell wrote: On Thu, 29 Feb 2024 at 11:17, Heinrich Schuchardt wrote: But yes, I'm not surprised that CXL runs into this. Heinrich, are you doing CXL testing, or is this some other workload? I am running the UEFI Self-Certification Tests (SCT) on EDK 2 using:

Re: [PATCH, v2] physmem: avoid bounce buffer too small

On 29.02.24 12:11, Peter Maydell wrote: On Thu, 29 Feb 2024 at 10:59, Jonathan Cameron wrote: On Thu, 29 Feb 2024 09:38:29 + Peter Maydell wrote: On Wed, 28 Feb 2024 at 19:07, Heinrich Schuchardt wrote: On 28.02.24 19:39, Peter Maydell wrote: The limitation to a page dates back to

Re: [PATCH v7 2/5] softmmu: Support concurrent bounce buffers

On 12.02.24 09:06, Mattias Nissler wrote: When DMA memory can't be directly accessed, as is the case when running the device model in a separate process without shareable DMA file descriptors, bounce buffering is used. It is not uncommon for device models to request mapping of several DMA region

Re: [PATCH, v2] physmem: avoid bounce buffer too small

On 29.02.24 02:11, Peter Xu wrote: On Wed, Feb 28, 2024 at 08:07:47PM +0100, Heinrich Schuchardt wrote: On 28.02.24 19:39, Peter Maydell wrote: On Wed, 28 Feb 2024 at 18:28, Heinrich Schuchardt wrote: On 28.02.24 16:06, Philippe Mathieu-Daudé wrote: Hi Heinrich, On 28/2/24 13:59, Heinrich

Re: [PATCH, v2] physmem: avoid bounce buffer too small

On 28.02.24 19:39, Peter Maydell wrote: On Wed, 28 Feb 2024 at 18:28, Heinrich Schuchardt wrote: On 28.02.24 16:06, Philippe Mathieu-Daudé wrote: Hi Heinrich, On 28/2/24 13:59, Heinrich Schuchardt wrote: virtqueue_map_desc() is called with values of sz exceeding that may exceed

Re: [PATCH, v2] physmem: avoid bounce buffer too small

On 28.02.24 16:06, Philippe Mathieu-Daudé wrote: Hi Heinrich, On 28/2/24 13:59, Heinrich Schuchardt wrote: virtqueue_map_desc() is called with values of sz exceeding that may exceed TARGET_PAGE_SIZE. sz = 0x2800 has been observed. We only support a single bounce buffer. We have to avoid

Re: [PATCH 1/1] physmem: avoid bounce buffer too small

On 28.02.24 13:46, Heinrich Schuchardt wrote: virtqueue_map_desc() is called with values of sz exceeding that may exceed TARGET_PAGE_SIZE. sz = 0x2800 has been observed. We only support a single bounce buffer. We have to avoid virtqueue_map_desc() calling address_space_map() multiple times

[PATCH, v2] physmem: avoid bounce buffer too small

descriptor or out of resources Increase the minimum size of the bounce buffer to 0x1 which matches the largest value of TARGET_PAGE_SIZE for all architectures. Signed-off-by: Heinrich Schuchardt --- v2: remove unrelated change --- system/physmem.c | 8 ++-- 1 file changed, 6

[PATCH 1/1] physmem: avoid bounce buffer too small

descriptor or out of resources Increase the minimum size of the bounce buffer to 0x1 which matches the largest value of TARGET_PAGE_SIZE for all architectures. Signed-off-by: Heinrich Schuchardt --- roms/edk2 | 2 +- roms/seabios-hppa | 2 +- system/physmem.c | 8 ++-- 3 files

[PATCH v4 3/4] target/riscv: SMBIOS support for RISC-V virt machine

/smbios/smbios-anchor etc/smbios/smbios-tables Signed-off-by: Heinrich Schuchardt --- v4: remove a superfluous #ifdef v3: use misa_mxl_max to determine bitness v2: set processor family --- hw/riscv/Kconfig | 1 + hw/riscv/virt.c | 42

[PATCH v4 4/4] qemu-options: enable -smbios option on RISC-V

With SMBIOS support added for RISC-V we also should enable the command line option. Signed-off-by: Heinrich Schuchardt Reviewed-by: Daniel Henrique Barboza Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- v4: no change v3: no change v2: new patch --- qemu

[PATCH v4 1/4] smbios: add processor-family option

Processor Family field to 0xFE which signals that the Processor Family 2 is used. Signed-off-by: Heinrich Schuchardt Reviewed-by: Alistair Francis Reviewed-by: Andrew Jones --- v4: no change v3: no change v2: new patch --- hw/smbios/smbios.c | 13 +++-- qemu-options.hx

[PATCH v4 2/4] smbios: function to set default processor family

Provide a function to set the default processor family. Signed-off-by: Heinrich Schuchardt Reviewed-by: Andrew Jones --- v4: no change v3: no change v2: new patch --- hw/smbios/smbios.c | 7 +++ include/hw/firmware/smbios.h | 1 + 2 files changed, 8

[PATCH v4 0/4] target/riscv: SMBIOS support for RISC-V virt machine

tions. v4: remove a superfluous #ifdef v3: use misa_mxl_max to determine bitness v2: set processor family Heinrich Schuchardt (4): smbios: add processor-family option smbios: function to set default processor family target/riscv: SMBIOS support for RISC-V virt machine qe

Re: [PATCH v2 3/4] target/riscv: SMBIOS support for RISC-V virt machine

On 22.01.24 13:59, Andrew Jones wrote: On Mon, Jan 22, 2024 at 01:28:18PM +0100, Heinrich Schuchardt wrote: On 22.01.24 10:57, Andrew Jones wrote: On Fri, Dec 29, 2023 at 01:07:23PM +0100, Heinrich Schuchardt wrote: ... +#if defined(TARGET_RISCV32) +smbios_set_default_processor_family

[PATCH v3 4/4] qemu-options: enable -smbios option on RISC-V

With SMBIOS support added for RISC-V we also should enable the command line option. Signed-off-by: Heinrich Schuchardt Reviewed-by: Daniel Henrique Barboza Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- v3: no change v2: new patch --- qemu-options.hx | 2 +- 1 file

[PATCH v3 3/4] target/riscv: SMBIOS support for RISC-V virt machine

/smbios/smbios-anchor etc/smbios/smbios-tables Signed-off-by: Heinrich Schuchardt --- v3: use misa_mxl_max to determine bitness v2: set processor family --- hw/riscv/Kconfig | 1 + hw/riscv/virt.c | 44 2 files changed, 45 insertions

[PATCH v3 0/4] target/riscv: SMBIOS support for RISC-V virt machine

tions. v3: use misa_mxl_max to determine bitness v2: set processor family Heinrich Schuchardt (4): smbios: add processor-family option smbios: function to set default processor family target/riscv: SMBIOS support for RISC-V virt machine qemu-options: enable -smbios option on R

[PATCH v3 1/4] smbios: add processor-family option

Processor Family field to 0xFE which signals that the Processor Family 2 is used. Signed-off-by: Heinrich Schuchardt Reviewed-by: Alistair Francis Reviewed-by: Andrew Jones --- v3: no change v2: new patch --- hw/smbios/smbios.c | 13 +++-- qemu-options.hx| 4 ++-- 2 files

[PATCH v3 2/4] smbios: function to set default processor family

Provide a function to set the default processor family. Signed-off-by: Heinrich Schuchardt Reviewed-by: Andrew Jones --- v3: no change v2: new patch --- hw/smbios/smbios.c | 7 +++ include/hw/firmware/smbios.h | 1 + 2 files changed, 8 insertions(+) diff --git a

Re: [PATCH v2 3/4] target/riscv: SMBIOS support for RISC-V virt machine

On 22.01.24 10:57, Andrew Jones wrote: On Fri, Dec 29, 2023 at 01:07:23PM +0100, Heinrich Schuchardt wrote: Generate SMBIOS tables for the RISC-V mach-virt. Add CONFIG_SMBIOS=y to the RISC-V default config. Set the default processor family in the type 4 table. The implementation is based on

Re: [PATCH v2 1/4] smbios: add processor-family option

On 1/5/24 06:24, Alistair Francis wrote: On Fri, Dec 29, 2023 at 10:48 PM Heinrich Schuchardt wrote: For RISC-V the SMBIOS standard requires specific values of the processor family value depending on the bitness of the CPU. Can you provide some details of where this is described? I can&#

Re: [PATCH for 8.2.1] hw/net: cadence_gem: Fix MDIO_OP_xxx values

ing till QEMU 8.1 but broken since QEMU 8.2. s/till/until/? These are synonyms. Till is more informal. No need to change. Fixes: 1b09eeb122aa ("hw/net/cadence_gem: use FIELD to describe PHYMNTNC register fields") Reported-by: Heinrich Schuchardt Signed-off-by: Bin Meng ---   h

Re: [PATCH v2 1/1] docs: pcie: describe PCIe option ROMs

On 8/14/22 17:32, Heinrich Schuchardt wrote: Provide a descriptions of the options that control the emulation of option ROMS for PCIe devices. Signed-off-by: Heinrich Schuchardt --- v2: correct description of rombar property use romfile= to suppress option ROM loading

[PATCH v2 0/4] target/riscv: SMBIOS support for RISC-V virt machine

Generate SMBIOS tables for the RISC-V mach-virt. Add CONFIG_SMBIOS=y to the RISC-V default config. With the series the following firmware tables are provided: etc/smbios/smbios-anchor etc/smbios/smbios-tables Add processor-family to the '-smbios type=4' command line options.

[PATCH v2 2/4] smbios: function to set default processor family

Provide a function to set the default processor family. Signed-off-by: Heinrich Schuchardt --- v2: new patch --- hw/smbios/smbios.c | 7 +++ include/hw/firmware/smbios.h | 1 + 2 files changed, 8 insertions(+) diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index

[PATCH v2 1/4] smbios: add processor-family option

Processor Family field to 0xFE which signals that the Processor Family 2 is used. Signed-off-by: Heinrich Schuchardt --- v2: new patch --- hw/smbios/smbios.c | 13 +++-- qemu-options.hx| 4 ++-- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/smbios/smbios.c b/hw

[PATCH v2 3/4] target/riscv: SMBIOS support for RISC-V virt machine

/smbios/smbios-anchor etc/smbios/smbios-tables Signed-off-by: Heinrich Schuchardt --- v2: set processor family --- hw/riscv/Kconfig | 1 + hw/riscv/virt.c | 42 ++ 2 files changed, 43 insertions(+) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig

[PATCH v2 4/4] qemu-options: enable -smbios option on RISC-V

With SMBIOS support added for RISC-V we also should enable the command line option. Signed-off-by: Heinrich Schuchardt --- v2: new patch --- qemu-options.hx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu-options.hx b/qemu-options.hx index 7bdb414345..5ed82df11f

[PATCH v2 1/1] docs/system/riscv: document acpi parameter of virt machine

Since QEMU v8.0.0 the RISC-V virt machine has a switch to disable ACPI table generation. Add it to the documentation. Fixes: 168b8c29cedb ("hw/riscv/virt: Add a switch to disable ACPI") Signed-off-by: Heinrich Schuchardt --- v2: mention that acpi=on is the default --- docs/sy

Re: [PATCH 1/1] docs/system/riscv: document acpi parameter of virt machine

On 20.12.23 07:57, Sunil V L wrote: On Tue, Dec 19, 2023 at 03:38:29PM +0100, Heinrich Schuchardt wrote: Since QEMU v8.0.0 the RISC-V virt machine has a switch to disable ACPI table generation. Add it to the documentation. Fixes: 168b8c29cedb ("hw/riscv/virt: Add a switch to disable

[PATCH 1/1] docs/system/riscv: document acpi parameter of virt machine

Since QEMU v8.0.0 the RISC-V virt machine has a switch to disable ACPI table generation. Add it to the documentation. Fixes: 168b8c29cedb ("hw/riscv/virt: Add a switch to disable ACPI") Signed-off-by: Heinrich Schuchardt --- docs/system/riscv/virt.rst | 5 + 1 file changed, 5

Re: [PATCH 1/1] target/riscv: SMBIOS support for RISC-V virt machine

On 12/18/23 09:49, Sunil V L wrote: Hi Heinrich, Thanks for the patch!. On Mon, Dec 18, 2023 at 08:40:18AM +0100, Heinrich Schuchardt wrote: Generate SMBIOS tables for the RISC-V mach-virt. Add CONFIG_SMBIOS=y to the RISC-V default config. The implementation is based on the corresponding ARM

[PATCH 1/1] target/riscv: SMBIOS support for RISC-V virt machine

Booting Ubuntu 23.10 via EDK II allowed displaying the SMBIOS table using the dmidecode command: Handle 0x0100, DMI type 1, 27 bytes System Information Manufacturer: QEMU Product Name: QEMU Virtual Machine Version: virt ... Signed-off-by: Heinrich Schuchardt --- hw

[PATCH v2 1/1] target/riscv: correct csr_ops[CSR_MSECCFG]

The CSR register mseccfg is used by multiple extensions: Smepm and Zkr. Consider this when checking the existence of the register. Fixes: 77442380ecbe ("target/riscv: rvk: add CSR support for Zkr") Signed-off-by: Heinrich Schuchardt --- v2: rebase on alistair23/riscv-to-

[PATCH 1/1] target/riscv: correct csr_ops[CSR_MSECCFG]

The CSR register mseccfg is used by multiple extensions: Smepm and Zkr. Consider this when checking the existence of the register. Fixes: 77442380ecbe ("target/riscv: rvk: add CSR support for Zkr") Signed-off-by: Heinrich Schuchardt --- target/riscv/csr.c | 7 +-- 1 file

Re: [PATCH v2] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"

rmat=raw,unit=0 \ -drive file=,if=pflash,format=raw,unit=1,readonly=on \ -machine virt Signed-off-by: Sunil V L Reported-by: Heinrich Schuchardt --- The issue is reported at https://salsa.debian.org/qemu-team/edk2/-/commit/c345655a0149f64c5020bfc1e53c619ce60587f6 The patch is based on Alis

Re: [PATCH] hw/riscv: virt: Enable booting M-mode or S-mode FW from pflash0

64 -pflash -pflash -machine virt or qemu-system-riscv64 -bios \ -pflash \ -pflash \ -machine virt or qemu-system-riscv64 -bios \ -drive file=,if=pflash,format=raw,unit=0,readonly=on \ -drive file=,if=pflash,format=raw,unit=1 \ -machine virt Signed-off-by: Sunil V L Reported-by: Heinrich Schuchar

[PATCH v2 1/1] docs: pcie: describe PCIe option ROMs

Provide a descriptions of the options that control the emulation of option ROMS for PCIe devices. Signed-off-by: Heinrich Schuchardt --- v2: correct description of rombar property use romfile= to suppress option ROM loading --- docs/pcie.txt | 28 1

Re: [PATCH 1/1] docs: pcie: describe PCIe option ROMs

On 7/20/22 08:42, Heinrich Schuchardt wrote: Provide a descriptions of the options that control the emulation of option ROMS for PCIe devices. Signed-off-by: Heinrich Schuchardt --- docs/pcie.txt | 25 + 1 file changed, 25 insertions(+) diff --git a/docs/pcie.txt b

[PATCH 1/1] docs: pcie: describe PCIe option ROMs

Provide a descriptions of the options that control the emulation of option ROMS for PCIe devices. Signed-off-by: Heinrich Schuchardt --- docs/pcie.txt | 25 + 1 file changed, 25 insertions(+) diff --git a/docs/pcie.txt b/docs/pcie.txt index 89e3502075..a22c1f69f7 100644

[PATCH] hw/arm/virt: impact of gic-version on max CPUs

Describe that the gic-version influences the maximum number of CPUs. Signed-off-by: Heinrich Schuchardt --- docs/system/arm/virt.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst index 1544632b67..1af3f6a0a8 100644

Re: [PATCH] hw/arm: add control knob to disable kaslr_seed via DTB

host memory errors to a guest using ACPI and guest external abort exceptions. The default is off. Tested on top of QEMU v6.1.0 Tested-by: Heinrich Schuchardt

Re: [PATCH 00/16] fdt: Make OF_BOARD a boolean option

On 10/27/21 16:55, Tom Rini wrote: On Wed, Oct 27, 2021 at 03:23:01PM +0200, Heinrich Schuchardt wrote: [snip] One passed to U-Boot for fixups and further passed to the OS. This devicetree may originate from a prior boot stage, from a file loaded by U-Boot, or from a later bootstage, e.g

Re: [PATCH 00/16] fdt: Make OF_BOARD a boolean option

On 10/27/21 15:15, François Ozog wrote: Hi, On Wed, 27 Oct 2021 at 14:48, Tom Rini > wrote: On Fri, Oct 15, 2021 at 12:03:44PM -0600, Simon Glass wrote: > Hi all, > > On Thu, 14 Oct 2021 at 09:28, Tom Rini mailto:tr...@konsulko.com>> wrote: >

Re: [PATCH 00/16] fdt: Make OF_BOARD a boolean option

On 10/13/21 03:01, Simon Glass wrote: With Ilias' efforts we have dropped OF_PRIOR_STAGE and OF_HOSTFILE so there are only three ways to obtain a devicetree: - OF_SEPARATE - the normal way, where the devicetree is built and appended to U-Boot - OF_EMBED - for development purpos

Re: [PATCH 06/16] riscv: qemu: Add devicetree files for qemu_riscv32/64

On 10/13/21 03:01, Simon Glass wrote: Add these files, generated from qemu, so there is a reference devicetree in the U-Boot tree. Split the existing qemu-virt into two, since we need a different devicetree for 32- and 64-bit machines. You only sent patch 6/16 and 15/16 to me. No clue why.

[PATCH 1/1] util/uri: do not check argument of uri_free()

uri_free() checks if its argument is NULL in uri_clean() and g_free(). There is no need to check the argument before the call. Signed-off-by: Heinrich Schuchardt --- block/nfs.c | 4 +--- block/ssh.c | 4 +--- capstone| 2 +- util/uri.c | 22 ++ 4 files changed, 9

[PATCH v3 1/2] hw/nvme: namespace parameter for EUI-64

The EUI-64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI-64. Signed-off-by: Heinrich Schuchardt Acked-by: Klaus Jensen --- v3: no change v2: fix typo %s

[PATCH v3 2/2] hw/nvme: default for namespace EUI-64

On machines with version > 6.0 replace a missing EUI-64 by a generated value. Signed-off-by: Heinrich Schuchardt --- v3: use 52-54-00-00-00-00-00-00 as starting values for generating EUI-64s v2: new patch --- docs/system/nvme.rst | 2 ++ hw/core/machine.c| 1 +

[PATCH v3 0/2] hw/nvme: namespace parameter for EUI-64

The EUI-64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI-64. v3: use 52-54-00-00-00-00-00-00 as starting values for generating EUI-64s Heinrich Schuchardt

Re: [PATCH v2 3/3] hw/nvme: default for namespace EUI-64

On 6/14/21 9:23 PM, Heinrich Schuchardt wrote: On 6/14/21 8:31 PM, Klaus Jensen wrote: On Jun 12 01:46, Heinrich Schuchardt wrote: On machines with version > 6.0 replace a missing EUI-64 by a generated value. Signed-off-by: Heinrich Schuchardt --- v2: new patch --- docs/system/nvme.

Re: [PATCH v2 3/3] hw/nvme: default for namespace EUI-64

On 6/14/21 8:31 PM, Klaus Jensen wrote: On Jun 12 01:46, Heinrich Schuchardt wrote: On machines with version > 6.0 replace a missing EUI-64 by a generated value. Signed-off-by: Heinrich Schuchardt --- v2: new patch --- docs/system/nvme.rst | 2 ++ hw/core/machine.c    | 1 + hw/nvme/n

Re: [PATCH v2 1/3] hw: virt: consider hw_compat_6_0

On 6/12/21 1:46 AM, Heinrich Schuchardt wrote: virt-6.0 must consider hw_compat_6_0. Fixes: da7e13c00b59 ("hw: add compat machines for 6.1") Signed-off-by: Heinrich Schuchardt Reviewed-by: Cornelia Huck This patch was applied to target-arm.next by Peter. --- v2: add mis

Re: [PATCH 1/1] hw: virt: consider hw_compat_6_0

On 6/14/21 5:35 PM, Peter Maydell wrote: On Fri, 11 Jun 2021 at 08:32, Cornelia Huck wrote: On Thu, Jun 10 2021, Heinrich Schuchardt wrote: virt-6.0 must consider hw_compat_6_0. Signed-off-by: Heinrich Schuchardt --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+) Oops, forgot

[PATCH v2 2/3] hw/nvme: namespace parameter for EUI-64

The EUI-64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI-64. Signed-off-by: Heinrich Schuchardt Acked-by: Klaus Jensen --- v2: fix typo %s/EUI64/EUI-64/ --- d

[PATCH v2 1/3] hw: virt: consider hw_compat_6_0

virt-6.0 must consider hw_compat_6_0. Fixes: da7e13c00b59 ("hw: add compat machines for 6.1") Signed-off-by: Heinrich Schuchardt Reviewed-by: Cornelia Huck --- v2: add missing Fixes: tag --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/virt.

[PATCH v2 3/3] hw/nvme: default for namespace EUI-64

On machines with version > 6.0 replace a missing EUI-64 by a generated value. Signed-off-by: Heinrich Schuchardt --- v2: new patch --- docs/system/nvme.rst | 2 ++ hw/core/machine.c| 1 + hw/nvme/ns.c | 9 + hw/nvme/nvme.h | 2 ++ 4 files changed, 14 inserti

[PATCH v2 0/3] hw/nvme: namespace parameter for EUI-64

The EUI-64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI-64. v2: include patch for hw_compat_6_0 add a patch to implement default values for the EUI-64

[PATCH 1/1] hw: virt: consider hw_compat_6_0

virt-6.0 must consider hw_compat_6_0. Signed-off-by: Heinrich Schuchardt --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 840758666d..8bc3b408fe 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2764,6 +2764,8

Re: [PATCH 1/1] hw/nvme: namespace parameter for EUI64

Am 9. Juni 2021 21:57:26 MESZ schrieb Klaus Jensen : >On Jun 9 20:13, Heinrich Schuchardt wrote: >>Am 9. Juni 2021 16:39:20 MESZ schrieb "Daniel P. Berrangé" >: >>>On Wed, Jun 09, 2021 at 02:33:08PM +0200, Klaus Jensen wrote: >>>> On Jun 9 14:21, Heinr

Re: [PATCH 1/1] hw/nvme: namespace parameter for EUI64

Am 9. Juni 2021 16:39:20 MESZ schrieb "Daniel P. Berrangé" : >On Wed, Jun 09, 2021 at 02:33:08PM +0200, Klaus Jensen wrote: >> On Jun 9 14:21, Heinrich Schuchardt wrote: >> > On 6/9/21 2:14 PM, Klaus Jensen wrote: >> > > On Jun  9 13:46, Heinrich Schuchard

Re: [PATCH 1/1] hw/nvme: namespace parameter for EUI64

On 6/9/21 2:33 PM, Klaus Jensen wrote: On Jun  9 14:21, Heinrich Schuchardt wrote: On 6/9/21 2:14 PM, Klaus Jensen wrote: On Jun  9 13:46, Heinrich Schuchardt wrote: The EUI64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64&q

Re: [PATCH 1/1] hw/nvme: namespace parameter for EUI64

+cc qemu-bl...@nongnu.org On 6/9/21 1:46 PM, Heinrich Schuchardt wrote: The EUI64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI64. Signed-off-by: Heinrich Schuchardt

Re: [PATCH 1/1] hw/nvme: namespace parameter for EUI64

On 6/9/21 2:14 PM, Klaus Jensen wrote: On Jun  9 13:46, Heinrich Schuchardt wrote: The EUI64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI64. Signed-off-by: Heinrich

[PATCH 1/1] hw/nvme: namespace parameter for EUI64

The EUI64 field is the only identifier for NVMe namespaces in UEFI device paths. Add a new namespace property "eui64", that provides the user the option to specify the EUI64. Signed-off-by: Heinrich Schuchardt --- docs/system/nvme.rst | 4 +++ hw/nvme/ctrl.c

[Qemu-devel] [PATCH v2 1/1] hw/arm/virt: provide a model property in the fdt

According to the "Devicetree Specification, Release v0.2" 'model' is a required property of the root node. Some software like the Debian flash-kernel package rely on this property to identify boards. The patch sets the model property to 'qemu,virt'. Signed-off-b

[Qemu-devel] [PATCH 1/1] hw/arm/virt: provide a model property in the fdt

Device trees in the Linux kernel generally provide a model property. Some software like the Debian flash-kernel package rely on this property to identify boards. The patch sets the model property for the virt boards to 'QEMU virt'. Signed-off-by: Heinrich Schuchardt --- hw/arm/virt.