[PATCH v2] [Qemu-devel] target/i386: HAX: Enable ROM/ROM device memory region support

2020-03-29 Thread hang . yuan
From: Hang Yuan Add ROM and ROM device memory region support in HAX. Their memory region is read only and write access will generate EPT violation. The violation will be handled in the HAX kernel with the following patch. https://github.com/intel/haxm/commit

Re: [Qemu-devel] x86 VMCS guest interruptibility state save/load

2019-08-05 Thread Hang Yuan
In summary, sounds all non-register guest states in VMCS structure are not saved in snapshot. I don't understand why they don't need to save in snapshot and load from snapshot to construct VMCS. Does anyone have any idea? Thanks, Henry On 7/30/19 5:05 PM, Hang Yuan wrote: Hello al

[Qemu-devel] x86 VMCS guest interruptibility state save/load

2019-07-30 Thread Hang Yuan
Hello all, When I read QEMU and KVM codes on saving/loading snapshot, I don't find the interruptibility state in x86 VMCS structure is saved and loaded in QEMU though KVM supports getting/setting this field from/into VMCS. (No "env.interrupt.shadow" in QEMU vmstate_x86_cpu.fields.) I understan

[Qemu-devel] [PATCH v2] target/i386: HAX: Enable ROM/ROM device memory region support

2019-07-01 Thread hang . yuan
From: Hang Yuan Add ROM and ROM device memory region support in HAX. Their memory region is read only and write access will generate EPT violation. The violation will be handled in the HAX kernel with the following patch. https://github.com/intel/haxm/commit

[Qemu-devel] [PATCH] target/i386: HAX: Enable ROM/ROM device memory region support

2019-06-26 Thread hang . yuan
From: Hang Yuan Add ROM and ROM device memory region support in HAX. Their memory region is read only and write access will generate EPT violation. The violation will be handled in the HAX kernel with the following patch. https://github.com/intel/haxm/commit