On 08.04.2020 18:27, Peter Maydell wrote:
> On Wed, 8 Apr 2020 at 16:29, Fredrik Strupe wrote:
>>
>> Bit 1 of VMUL (float)'s size field encodes the opcode and must be 0,
>> with 1 making it undefined. Thus, make VMUL (float) instructions
>> with size=0b10 or
According to Arm ARM, VQDMULL is only valid when U=0, while having
U=1 is unallocated.
Signed-off-by: Fredrik Strupe
Fixes: 695272dcb976 ("target-arm: Handle UNDEF cases for Neon
3-regs-different-widths")
---
target/arm/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Bit 1 of VMUL (float)'s size field encodes the opcode and must be 0,
with 1 making it undefined. Thus, make VMUL (float) instructions
with size=0b10 or size=0b11 (size >= 2) undefined.
(U is 1 for VMUL, while it is 0 for VMLA/VMLS.)
Signed-off-by: Fredrik Strupe
---
target/arm/transla
