Re: [PATCH 6/7] hw/i386/amd_iommu: Fix handling device on buses != 0

2025-07-16 Thread Ethan MILON
On 7/16/25 09:31, Sairaj Kodilkar wrote: > The AMD IOMMU is set up at boot time and uses PCI bus numbers + devfn > for indexing into DTE. The problem is that before the guest started, > all PCI bus numbers are 0 as no PCI discovery happened yet (BIOS or/and > kernel will do that later) so relying o

Re: [PATCH 5/7] hw/i386/amd_iommu: Fix event log generation

2025-07-16 Thread Ethan MILON
On 7/16/25 09:31, Sairaj Kodilkar wrote: > Current event logging code is broken, because of following issues > > 1. The code uses '|' instead of '&' to test the bit field, which causes >vIOMMU to generate overflow interrupt for every log entry. > 2. Code does not update the eventlog tail MMIO

Re: [PATCH 4/7] hw/i386/amd_iommu: Support MMIO writes to the status register

2025-07-16 Thread Ethan MILON
Hi, On 7/16/25 09:31, Sairaj Kodilkar wrote: > Support the writes to the status register so that guest can reset the > EventOverflow, EventLogInt, ComWaitIntr, etc bits after servicing the > respective interrupt. > > Signed-off-by: Sairaj Kodilkar > Reviewed-by: Vasant Hegde > --- > hw/i386/am

Re: [PATCH v3 0/7] amd_iommu: Fixes to align with AMDVi specification

2025-06-12 Thread Ethan MILON
Hi, Is this series the right place to include the following minor fix? diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 0775c..18d30e1 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -140,7 +140,7 @@ static void amdvi_writeq(AMDVIState *s, hwaddr addr, uint64_t val) {

Re: [PATCH v2 05/20] amd_iommu: Add helper function to extract the DTE

2025-06-12 Thread Ethan MILON
Hi, On 5/21/25 4:49 PM, Alejandro Jimenez wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > Hi Ethan, > > On 5/20/25 6:18 AM, Ethan MILON wrote: >>

Re: [PATCH v2 18/20] amd_iommu: Toggle address translation mode on devtab entry invalidation

2025-06-12 Thread Ethan MILON
Hi, On 5/2/25 4:16 AM, Alejandro Jimenez wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > A guest must issue an INVALIDATE_DEVTAB_ENTRY command after changing a > Device Table entry (D

Re: [PATCH v2 05/20] amd_iommu: Add helper function to extract the DTE

2025-05-20 Thread Ethan MILON
Hi, On 5/2/25 4:15 AM, Alejandro Jimenez wrote: > Caution: External email. Do not open attachments or click links, unless this > email comes from a known sender and you know the content is safe. > > > Extracting the DTE from a given AMDVIAddressSpace pointer structure is a > common operation re

Re: [PATCH 10/18] amd_iommu: Add a page walker to sync shadow page tables on invalidation

2025-04-18 Thread Ethan MILON
Hi, On 4/13/25 10:02 PM, Alejandro Jimenez wrote: > For the specified address range, walk the page table identifying regions > as mapped or unmapped and invoke registered notifiers with the > corresponding event type. > > Signed-off-by: Alejandro Jimenez > --- > hw/i386/amd_iommu.c | 74 +++