Hi Zhenzhong,
On 7/17/25 5:47 AM, Duan, Zhenzhong wrote:
> Hi Eric,
>
>> -Original Message-----
>> From: Eric Auger
>> Sent: Wednesday, July 16, 2025 8:09 PM
>> To: Duan, Zhenzhong ;
>> qemu-devel@nongnu.org
>> Cc: alex.william...@redhat.com;
pc_info);
> }
>
> static bool vtd_process_pasid_desc(IntelIOMMUState *s,
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index 87059d26aa..621e1f6947 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -558,6 +558,7 @@ typedef struct VTDRootEntry VTDRootEntry;
> #define VTD_CTX_ENTRY_LEGACY_SIZE 16
> #define VTD_CTX_ENTRY_SCALABLE_SIZE 32
>
> +#define VTD_SM_CONTEXT_ENTRY_PDTS(x)extract64((x)->val[0], 9, 3)
> #define VTD_SM_CONTEXT_ENTRY_RID2PASID_MASK 0xf
> #define VTD_SM_CONTEXT_ENTRY_RSVD_VAL0(aw) (0x1e0ULL | ~VTD_HAW_MASK(aw))
> #define VTD_SM_CONTEXT_ENTRY_RSVD_VAL1 0xffe0ULL
> @@ -588,6 +589,7 @@ typedef struct VTDPASIDCacheInfo {
> #define VTD_PASID_TABLE_BITS_MASK (0x3fULL)
> #define VTD_PASID_TABLE_INDEX(pasid) ((pasid) & VTD_PASID_TABLE_BITS_MASK)
> #define VTD_PASID_ENTRY_FPD (1ULL << 1) /* Fault Processing
> Disable */
> +#define VTD_PASID_TBL_ENTRY_NUM (1ULL << 6)
>
> /* PASID Granular Translation Type Mask */
> #define VTD_PASID_ENTRY_P 1ULL
Thanks
Eric
omain 0x%"PRIx16
> +vtd_pasid_cache_psi(uint16_t domain, uint32_t pasid) "PASID selective PC
> invalidation domain 0x%"PRIx16" pasid 0x%"PRIx32
> vtd_re_not_present(uint8_t bus) "Root entry bus %"PRIu8" not present"
> vtd_ce_not_present(uint8_t bus, uint8_t devfn) "Context entry bus %"PRIu8"
> devfn %"PRIu8" not present"
> vtd_iotlb_page_hit(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t
> domain) "IOTLB page hit sid 0x%"PRIx16" iova 0x%"PRIx64" slpte 0x%"PRIx64"
> domain 0x%"PRIx16
> diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
> index 50f9b27a45..0e3826f6f0 100644
> --- a/include/hw/i386/intel_iommu.h
> +++ b/include/hw/i386/intel_iommu.h
> @@ -95,6 +95,11 @@ struct VTDPASIDEntry {
> uint64_t val[8];
> };
>
> +typedef struct VTDPASIDCacheEntry {
> +struct VTDPASIDEntry pasid_entry;
> +bool valid;
> +} VTDPASIDCacheEntry;
> +
> struct VTDAddressSpace {
> PCIBus *bus;
> uint8_t devfn;
> @@ -107,6 +112,7 @@ struct VTDAddressSpace {
> MemoryRegion iommu_ir_fault; /* Interrupt region for catching fault */
> IntelIOMMUState *iommu_state;
> VTDContextCacheEntry context_cache_entry;
> +VTDPASIDCacheEntry pasid_cache_entry;
> QLIST_ENTRY(VTDAddressSpace) next;
> /* Superset of notifier flags that this address space has */
> IOMMUNotifierFlag notifier_flags;
Thanks
Eric
uint16_t sid, uint32_t pasid)
> +{
> +struct vtd_as_raw_key key = {
> + .sid = sid,
> +.pasid = pasid
> +};
> +
> +return g_hash_table_find(s->vtd_address_spaces,
> + vtd_find_as_by_sid_and_iommu_pasid, &key);
> +}
> +
> static int vtd_sync_shadow_page_hook(const IOMMUTLBEvent *event,
> void *private)
> {
With that addressed,
Reviewed-by: Eric Auger
Eric
Hi Zhenzhong,
On 7/16/25 12:31 PM, Duan, Zhenzhong wrote:
> Hi Eric,
>
>> -Original Message-----
>> From: Eric Auger
>> Subject: Re: [PATCH v3 07/20] intel_iommu: Check for compatibility with
>> IOMMUFD backed device when x-flts=on
>>
>> Hi Zhenzhon
");
> @@ -4414,7 +4423,7 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, void
> *opaque, int devfn,
> vtd_hiod->iommu_state = s;
> vtd_hiod->hiod = hiod;
>
> -if (!vtd_check_hiod(s, hiod, errp)) {
> +if (!vtd_check_hiod(s, vtd_hiod, errp)) {
> g_free(vtd_hiod);
> vtd_iommu_unlock(s);
> return false;
Reviewed-by: Eric Auger
Eric
iommu_device vs get_viommu_cap? Could we check HW IOMMU
prerequisites in vtd_get_viommu_cap() by enforcing this is called after
set_iommu_device. I think we should clarify the exact semantic of
get_viommu_cap().Thanks Eric
> +
> +/* Remaining checks are all stage-1 translati
_init(ObjectClass
> *klass, const void *data)
> * For call sites which don't need aliased BDF, passing NULL to
> * aliased_[bus|devfn] is allowed.
> *
> + * Returns true if PCI device is aliased or false otherwise.
s/PCI device/PCI device RID
Besides
Reviewed-by: Eric Auger
be set yet because
> s->flts is forbidden until we support passthrough device with x-flts=on.
Reviewed-by: Eric Auger
Eric
>
> Suggested-by: Nicolin Chen
> Suggested-by: Yi Liu
> Signed-off-by: Zhenzhong Duan
> ---
> hw/vfio/iommufd.c | 14 ++
> 1 file
ci.h"
> #include "hw/pci/pci_bus.h"
> @@ -4412,6 +4413,16 @@ static void vtd_dev_unset_iommu_device(PCIBus *bus,
> void *opaque, int devfn)
> vtd_iommu_unlock(s);
> }
>
> +static uint64_t vtd_get_viommu_cap(void *opaque)
> +{
> +IntelIOMMU
++ b/include/hw/iommu.h
> @@ -0,0 +1,16 @@
> +/*
> + * General vIOMMU capabilities, flags, etc
> + *
> + * Copyright (C) 2025 Intel Corporation.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef HW_IOMMU_H
> +#define HW_IOMMU_H
> +
> +en
quot; over "nested".
>>
>> Here, on the other hand, I think the core using this CAP would
>> unlikely care about an emulated "nested" mode in the individual
>> vIOMMU..
>>
>> So I suggested:
>> /* hardware-accelerated nested stage-1
On Tue, 2025-07-15 at 10:26 +0100, Mark Cave-Ayland wrote:
> Use QOM casts to cast to VFIOPCIDevice instead of using container_of().
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/s390x/s390-pci-vfio.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
On 7/15/25 1:56 AM, Michael S. Tsirkin wrote:
> On Mon, Jul 14, 2025 at 09:51:40PM +0200, Eric Auger wrote:
>> Hi Jonathan,
>>
>> On 7/14/25 9:40 PM, Jonathan Cameron wrote:
>>> On Mon, 14 Jul 2025 10:04:44 +0200
>>> Eric Auger wrote:
>>>
>&g
Hi Jonathan,
On 7/14/25 9:40 PM, Jonathan Cameron wrote:
> On Mon, 14 Jul 2025 10:04:44 +0200
> Eric Auger wrote:
>
>> This series enables ACPI PCI hotplug/hotunplug on ARM.
>> It is not enabled by default and ACPI PCI hotplug can
>> be selected by setting:
>
Hi Jonathan,
On 7/14/25 9:40 PM, Jonathan Cameron wrote:
> On Mon, 14 Jul 2025 10:04:44 +0200
> Eric Auger wrote:
>
>> This series enables ACPI PCI hotplug/hotunplug on ARM.
>> It is not enabled by default and ACPI PCI hotplug can
>> be selected by setting:
>
Hi Igor,
On 7/11/25 3:47 PM, Igor Mammedov wrote:
> On Tue, 8 Jul 2025 16:23:16 +0200
> Eric Auger wrote:
>
>> From: Gustavo Romero
>>
>> Add 2 new tests:
>> - test_acpi_aarch64_virt_acpi_pci_hotplug tests the acpi pci hotplug
>> using -global acpi-ged.
, // Range Maximum
0x01, // Alignment
0x18, // Length
)
})
}
Scope (S38)
{
Method (PCNT, 0, NotSerialized)
{
BNUM = One
Device (S38)
{
Name (_ADR, 0x0007) // _ADR: Address
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
: Gustavo Romero
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
v3 -> v4:
- add -device pci-testdev for the first test case
- fix the chassis
- add a test for static acpi-index
---
tests/qtest/bios-tables-test.c | 52 ++
Set up the IO registers used to communicate between QEMU
and ACPI.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
v2 -> v3:
- remove acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
- use sysbus_mmio_map_name for all regs (Igor)
- creat
region by its name.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
include/hw/acpi/generic_event_device.h | 1 +
hw/arm/virt.c | 11 +++
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/include/hw/acpi
From: Gustavo Romero
Soon we will introduce new tests related to ACPI PCI hotplug and
acpi-index that will use a new reference blob:
tests/data/acpi/aarch64/virt/DSDT.acpipcihp
tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex
Signed-off-by: Gustavo Romero
Signed-off-by: Eric Auger
Reviewed
instead
of its index. If the region is not found this returns -1.
Otherwise it maps the corresponding index and returns this latter.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
include/hw/sysbus.h | 1 +
hw/core/sysbus.c| 11 +++
2 files
.
At this point the GED still does not support PCI device hotplug in
its TYPE_HOTPLUG_HANDLER implementation. This will come in a
subsequent patch.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
v4 -> v5:
- Get rid of legacy reset API
v3 -> v4:
Add a subsection to migrate the AcpiPciHpState state.
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
Reviewed-by: Prasad Pandit
---
hw/acpi/generic_event_device.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/acpi
No need to export aml_pci_device_dsm() as it is only used
in hw/i386/acpi-build.c.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
include/hw/acpi/pci.h | 1 -
hw/i386/acpi-build.c | 2
machine passes the root bus (steming from GPEX)
to the GED device through a link property.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
include/hw/acpi/pcihp.h | 2 +-
hw/acpi/acpi-pci-hotplug-stub.c | 2 +-
hw/acpi/ich9
Add PCI device related code in the TYPE_HOTPLUG_HANDLER
implementation.
For a PCI device hotplug/hotunplug event, the code routes to
acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
unplug_cb).
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan
This property will be set by the machine code on the object
creation. It will be used by acpi pcihp hotplug code.
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
hw/acpi/generic_event_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw
The test misses a variant and this puts the mess on subsequent
rebuild-expected-aml.sh where a first DSDT reference blob is
overriden by another one.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
tests
CTRL in the _osc method
that use them.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
v2 -> v3:
- moved
aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
into
hw/arm/virt-acpi-build: Let non hotplug ports support static acpi-index
Add the requested ACPI bits requested to support static acpi-index
for non hotplug ports.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
hw/arm/virt-acpi-build.c | 12
A new boolean property is introduced. This will be used to turn
ACPI PCI hotplug support. By default it is unset.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
include/hw/acpi/generic_event_device.h | 2 ++
hw/acpi/generic_event_device.c | 2
Return (Arg3)
+CDW3 = Local0
}
Else
{
CDW1 |= 0x04
-Return (Arg3)
}
+
+Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
From: Gustavo Romero
This commit adds DSDT blobs to the whilelist in the prospect to
allow changes in the arm virt DSDT method.
Signed-off-by: Gustavo Romero
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
---
tests/qtest/bios-tables-test-allowed
Extract the code that reserves resources for ACPI PCI hotplug
into a new helper named build_append_pcihp_resources() and
move it to pcihp.c. We will reuse it on ARM.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
v2 ->
ce to acpi_pci_hotplug.rst documentation
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
v1 -> v2:
- s/spec/specs in reference to rst (Gustavo)
- fixed double space in commit msg (Gustavo)
rfc ->
The bus will be needed on ged realize for acpi pci hp setup.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 817adedb31..41b5086b55 100644
--- a/hw/arm
Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
ARM and acpi-index support. Also rename it into build_pci_bridge_edsm.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
v3->v4:
- renamed into build_pci_bridge_edsm() (Jonathan, Igor)
Retrieve the acpi pcihp property value from the ged. In case this latter
is not set, PCI native hotplug is used on pci0. For expander bridges we
keep pci native hotplug, as done on x86 q35.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
v4 -> v5:
- check vms->acpi_dev
v3
We plan to reuse build_append_notification_callback() on ARM
so let's move it to pcihp.c.
No functional change intended.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
include/hw/acpi/pcihp.h | 1 +
hw/acpi/pc
From: Gustavo Romero
This commit adds DSDT blobs to the whilelist in the prospect to
allow changes in the GPEX _OSC method.
Signed-off-by: Gustavo Romero
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Acked-by: Igor Mammedov
---
v3 -> v4:
- add missed tests/data/acpi/riscv64/v
Modify the DSDT ACPI table to enable ACPI PCI hotplug.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
v4 -> v5:
- protect the access to the ged property by an acpi_dev check
v3 -> v4:
- use property accessor
- removed ACPI_PCIHP_SIZE which is a
+
+Device (S00)
+{
+Name (_ADR, Zero) // _ADR: Address
+}
+
+Device (S08)
+{
+Name (_ADR, 0x0001) // _ADR: Address
+}
+
+Device (S10)
+{
+Name (_ADR, 0x0002) // _ADR: Address
+}
+ }
}
Si
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
tests/qtest/bios-tables-test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 4dbc07ec5e..357bcefd37 100644
--- a/tests/qtest/bios
Use a specific DSDT.viot reference blob instead of relying on
the default DSDT blob. The content is unchanged.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
tests/data/acpi/aarch64/virt/DSDT.viot
GED event to notify the OS about
hotplug events.
Best Regards
Eric
This series can be found at:
https://github.com/eauger/qemu/tree/arm-acpi-pcihp-v7
previous series:
https://github.com/eauger/qemu/tree/arm-acpi-pcihp-v6
History:
v6 -> v7:
- rebased after minor contextual conflict introdu
pcihp acpi_set_pci_info() generic code currently uses
acpi_get_i386_pci_host() to retrieve the pci host bridge.
To make it work also on ARM we get rid of that call and
directly use AcpiPciHpState::root.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
Reviewed-by: Igor Mammedov
Reviewed
We intend to reuse build_append_pci_bus_devices and build_append_pcihp_slots
on ARM. So let's move them to hw/acpi/pcihp.c as well as all static
helpers they use.
No functional change intended.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Review
.CTRL */
-Return (Arg3)
+CDW3 = Local0
}
Else
{
CDW1 |= 0x04
-Return (Arg3)
}
+
+Return (Arg3)
}
Method (_DSM, 4, NotSerialized)
GPEX acpi_dsdt_add_pci_osc() does basically the same as
build_q35_osc_method().
Rename build_q35_osc_method() into build_pci_host_bridge_osc_method()
and move it into hw/acpi/pci.c. In a subsequent patch we will
use this later in place of acpi_dsdt_add_pci_osc().
Signed-off-by: Eric Auger
Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
native pci hotplug.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
rfc -> v1:
- updated the "Allow OS control for all 5 features" comment
---
On ARM we will put the operation regions in AML_SYSTEM_MEMORY.
So let's allow this configuration.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
include/hw/acpi/pcihp.h | 3 ++-
hw/acpi/pcihp.c | 8
hw
Hi Igor,
On 7/11/25 2:00 PM, Igor Mammedov wrote:
> On Tue, 8 Jul 2025 16:23:00 +0200
> Eric Auger wrote:
>
>> Signed-off-by: Eric Auger
>> Reviewed-by: Jonathan Cameron
> I'd merge this with previous patch
checkpatch complains if I do that:
ERROR: Do not add
On 7/11/25 2:03 PM, Igor Mammedov wrote:
> On Tue, 8 Jul 2025 16:23:03 +0200
> Eric Auger wrote:
>
>> hw/arm/virt-acpi-build: Let non hotplug ports support static acpi-index
>>
>> Add the requested ACPI bits requested to support static acpi-index
>> for non h
On 7/10/25 4:51 PM, Michael S. Tsirkin wrote:
> On Thu, Jul 10, 2025 at 03:18:47PM +0200, Eric Auger wrote:
>> Hi Michael,
>>
>> On 7/8/25 4:22 PM, Eric Auger wrote:
>>> This series enables ACPI PCI hotplug/hotunplug on ARM.
>>> It is not enabled by
On 7/10/25 4:04 PM, Philippe Mathieu-Daudé wrote:
> On 7/7/25 18:40, Eric Auger wrote:
>> We may be miss some NV related GIC register save/restore. Until
>> we complete the study, let's add a migration blocker when the
>> maintenance IRQ is set.
>>
>> Sign
ults in
> duplicate ID mappings in the IORT table.
>
> Fixes:d6afe18b7242 ("hw/arm/virt-acpi-build: Fix ACPI IORT and MADT tables
> when its=off")
At least please could you take this fix?
Thanks
Eric
> Reviewed-by: Jonathan Cameron
> Reviewed-by: Eric Auger
> R
Hi Michael,
On 7/8/25 4:22 PM, Eric Auger wrote:
> This series enables ACPI PCI hotplug/hotunplug on ARM.
> It is not enabled by default and ACPI PCI hotplug can
> be selected by setting:
>
> -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
>
> Expected benefits
Hi Peter,
On 7/10/25 12:42 PM, Peter Maydell wrote:
> On Mon, 7 Jul 2025 at 17:41, Eric Auger wrote:
>> This is candidate for 10.1.
>>
>> For gaining virt functionality in KVM accelerated L1, The host needs to
>> be booted with "kvm-arm.mode=nested" option
ssseg8e32.vv0, (a1), t0
addia1, a1, 32
vssseg8e32.vv8, (a1), t0
ret
Before this patch, it copied 64 bytes from a0 to a1. After this patch,
the bytes at 32..47 also incorrectly get copied to 16..31.
Please fix this, or else revert the patch.
- Eric
On 7/4/25 4:19 PM, Cornelia Huck wrote:
> Fixes: 804cfc7eedb7 ("arm/cpu: Store aa64isar0/aa64zfr0 into the idregs
> arrays")
> Signed-off-by: Cornelia Huck
Reviewed-by: Eric Auger
Eric
> ---
> target/arm/kvm.c | 3 ++-
> 1 file changed, 2 insertions(+), 1
On 7/4/25 4:19 PM, Cornelia Huck wrote:
> Signed-off-by: Cornelia Huck
Reviewed-by: Eric Auger
Eric
> ---
> hw/intc/armv7m_nvic.c| 2 +-
> target/arm/cpu-sysregs.h.inc | 1 +
> target/arm/cpu.h | 3 +--
> target/arm/cpu64.c | 4 ++--
>
ore aa64dfr0/1 into the idregs array")
> Signed-off-by: Cornelia Huck
Reviewed-by: Eric Auger
Eric
> ---
> target/arm/tcg/cpu64.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
> in
On 7/4/25 4:19 PM, Cornelia Huck wrote:
> Signed-off-by: Cornelia Huck
Reviewed-by: Eric Auger
Eric
> ---
> target/arm/cpu-sysregs.h.inc | 2 ++
> target/arm/cpu.h | 2 --
> target/arm/helper.c | 4 ++--
> target/arm/tcg/cpu64.c | 16 -
Hi Connie,
On 7/4/25 4:19 PM, Cornelia Huck wrote:
> Signed-off-by: Cornelia Huck
Reviewed-by: Eric Auger
Eric
> ---
> hw/intc/armv7m_nvic.c| 2 +-
> target/arm/cpu-sysregs.h.inc | 1 +
> target/arm/cpu.h | 1 -
> target/arm/cpu64.c | 4
Hi Jonathan,
On 7/3/25 5:09 PM, Jonathan Cameron wrote:
> On Thu, 3 Jul 2025 14:35:36 +0200
> Eric Auger wrote:
>
>> The disassembled DSDT table is given below.
> I think the aim for this one should be to highlight the blobs where it differs
> from the previous rather
Hi Michael,
On 7/7/25 7:53 PM, Michael S. Tsirkin wrote:
> On Mon, Jul 07, 2025 at 07:09:34PM +0200, Eric Auger wrote:
>> Hi,
>>
>> On 7/3/25 2:35 PM, Eric Auger wrote:
>>> This series enables ACPI PCI hotplug/hotunplug on ARM.
>>> It is not enabled by
Add PCI device related code in the TYPE_HOTPLUG_HANDLER
implementation.
For a PCI device hotplug/hotunplug event, the code routes to
acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
unplug_cb).
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan
From: Gustavo Romero
This commit adds DSDT blobs to the whilelist in the prospect to
allow changes in the GPEX _OSC method.
Signed-off-by: Gustavo Romero
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Acked-by: Igor Mammedov
---
v3 -> v4:
- add missed tests/data/acpi/riscv64/v
machine passes the root bus (steming from GPEX)
to the GED device through a link property.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
include/hw/acpi/pcihp.h | 2 +-
hw/acpi/acpi-pci-hotplug-stub.c | 2 +-
hw/acpi/ich9.c | 7
The bus will be needed on ged realize for acpi pci hp setup.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 8024a0b6b3..34a3831530 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
tests/qtest/bios-tables-test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 4dbc07ec5e..357bcefd37 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests
Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
native pci hotplug.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
rfc -> v1:
- updated the "Allow OS control for all 5 features" comment
---
to cases where it is attached to the default pcie.0 root complex.
>
> Reviewed-by: Jonathan Cameron
> Reviewed-by: Eric Auger
> Tested-by: Nathan Chen
> Signed-off-by: Shameer Kolothum
> ---
> hw/arm/smmu-common.c | 8 +-
> hw/arm/smmuv3.c
We plan to reuse build_append_notification_callback() on ARM
so let's move it to pcihp.c.
No functional change intended.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
include/hw/acpi/pcihp.h | 1 +
hw/acpi/pc
Set up the IO registers used to communicate between QEMU
and ACPI.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
v2 -> v3:
- remove acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
- use sysbus_mmio_map_name for all regs (Igor)
- create_pcie left at its original
Modify the DSDT ACPI table to enable ACPI PCI hotplug.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
v4 -> v5:
- protect the access to the ged property by an acpi_dev check
v3 -> v4:
- use property accessor
- removed ACPI_PCIHP_SIZE which is already in the header
- make ad
GED event to notify the OS about
hotplug events.
Best Regards
Eric
This series can be found at:
https://github.com/eauger/qemu/tree/arm-acpi-pcihp-v6
previous series:
https://github.com/eauger/qemu/tree/arm-acpi-pcihp-v5
History:
v5 -> v6:
- collected Jonathan's R-bs
- cropped last
pcihp acpi_set_pci_info() generic code currently uses
acpi_get_i386_pci_host() to retrieve the pci host bridge.
To make it work also on ARM we get rid of that call and
directly use AcpiPciHpState::root.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
Reviewed-by: Igor Mammedov
Reviewed
.CTRL */
-Return (Arg3)
+CDW3 = Local0
}
Else
{
CDW1 |= 0x04
-Return (Arg3)
}
+
+Return (Arg3)
}
Method (_DSM, 4, NotSerialized)
A new boolean property is introduced. This will be used to turn
ACPI PCI hotplug support. By default it is unset.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
include/hw/acpi/generic_event_device.h | 2 ++
hw/acpi/generic_event_device.c | 2
Device (S38)
{
Name (_ADR, 0x0007) // _ADR: Address
Device (S00)
{
Name (_ADR, Zero) // _ADR: Address
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
Local0 = Package (0x01)
ce to acpi_pci_hotplug.rst documentation
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
v1 -> v2:
- s/spec/specs in reference to rst (Gustavo)
- fixed double space in commit msg (Gustavo)
rfc ->
Hi Shameer,
On 7/8/25 10:54 AM, Shameerali Kolothum Thodi wrote:
> Hi Eric,
>
>> -Original Message-----
>> From: Eric Auger
>> Sent: Tuesday, July 8, 2025 8:41 AM
>> To: Shameerali Kolothum Thodi
>> ; qemu-...@nongnu.org;
>> qemu-devel@non
hw/arm/virt-acpi-build: Let non hotplug ports support static acpi-index
Add the requested ACPI bits requested to support static acpi-index
for non hotplug ports.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
hw/arm/virt-acpi-build.c | 12
hw/arm/Kconfig
Extract the code that reserves resources for ACPI PCI hotplug
into a new helper named build_append_pcihp_resources() and
move it to pcihp.c. We will reuse it on ARM.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
v2 ->
.
At this point the GED still does not support PCI device hotplug in
its TYPE_HOTPLUG_HANDLER implementation. This will come in a
subsequent patch.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
v4 -> v5:
- Get rid of legacy reset API
v3 -> v4:
- add qbus_set_hotplug_h
CTRL in the _osc method
that use them.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
Reviewed-by: Igor Mammedov
---
v2 -> v3:
- moved
aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
into
+
+Device (S00)
+{
+Name (_ADR, Zero) // _ADR: Address
+}
+
+Device (S08)
+{
+Name (_ADR, 0x0001) // _ADR: Address
+}
+
+Device (S10)
+{
+Name (_ADR, 0x0002) // _ADR: Address
+}
+ }
}
Si
From: Gustavo Romero
This commit adds DSDT blobs to the whilelist in the prospect to
allow changes in the arm virt DSDT method.
Signed-off-by: Gustavo Romero
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
---
tests/qtest/bios-tables-test-allowed-diff.h | 6 ++
1 file
The test misses a variant and this puts the mess on subsequent
rebuild-expected-aml.sh where a first DSDT reference blob is
overriden by another one.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
tests/data/acpi/aarch64/virt
This property will be set by the machine code on the object
creation. It will be used by acpi pcihp hotplug code.
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
hw/acpi/generic_event_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw
instead
of its index. If the region is not found this returns -1.
Otherwise it maps the corresponding index and returns this latter.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
include/hw/sysbus.h | 1 +
hw/core/sysbus.c| 11 +++
2 files changed, 12 insertions
Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
ARM and acpi-index support. Also rename it into build_pci_bridge_edsm.
Signed-off-by: Eric Auger
Reviewed-by: Jonathan Cameron
---
v3->v4:
- renamed into build_pci_bridge_edsm() (Jonathan, Igor)
v2 -> v3:
- move
We intend to reuse build_append_pci_bus_devices and build_append_pcihp_slots
on ARM. So let's move them to hw/acpi/pcihp.c as well as all static
helpers they use.
No functional change intended.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Igor Mammedov
Review
No need to export aml_pci_device_dsm() as it is only used
in hw/i386/acpi-build.c.
Signed-off-by: Eric Auger
Reviewed-by: Gustavo Romero
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
Reviewed-by: Jonathan Cameron
---
include/hw/acpi/pci.h | 1 -
hw/i386/acpi-build.c | 2
Hi Shameer,
On 7/8/25 10:54 AM, Shameerali Kolothum Thodi wrote:
> Hi Eric,
>
>> -Original Message-----
>> From: Eric Auger
>> Sent: Tuesday, July 8, 2025 8:41 AM
>> To: Shameerali Kolothum Thodi
>> ; qemu-...@nongnu.org;
>> qemu-devel@non
Return (Arg3)
+CDW3 = Local0
}
Else
{
CDW1 |= 0x04
-Return (Arg3)
}
+
+Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
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