> and this breaks kexec.
>
> Add a AspeedXDMAClass to take into account the register differences.
Thanks Cedric!
Reviewed-by: Eddie James
>
> Cc: Eddie James
> Signed-off-by: Cédric Le Goater
> ---
> include/hw/misc/aspeed_xdma.h | 17 -
> hw/arm/aspeed_ast
On 8/19/19 1:41 AM, Cédric Le Goater wrote:
On 15/08/2019 22:13, Eddie James wrote:
On 8/15/19 3:05 AM, Cédric Le Goater wrote:
Hello Eddie,
On 14/08/2019 22:27, Eddie James wrote:
The Aspeed SOCs have two SD/MMC controllers. Add a device that
encapsulates both of these controllers and
\
-device sd-card,drive=sd0 -drive file=_tmp/kernel,format=raw,if=sd
Signed-off-by: Eddie James
---
This patch applies on top of Cedric's set of recent Aspeed changes.
Therefore, I'm sending as an RFC rather than a patch for review.
Changes since v2:
- Do the memory mapping at the SOC le
On 8/15/19 3:13 PM, Eddie James wrote:
On 8/15/19 3:05 AM, Cédric Le Goater wrote:
Hello Eddie,
On 14/08/2019 22:27, Eddie James wrote:
+ sdhci->slots[0].capareg = (uint64_t)(uint32_t)val;
+ break;
+ case ASPEED_SDHCI_SDIO_148:
+ sdhci->slots[0].maxcurr = (ui
On 8/15/19 3:05 AM, Cédric Le Goater wrote:
Hello Eddie,
On 14/08/2019 22:27, Eddie James wrote:
The Aspeed SOCs have two SD/MMC controllers. Add a device that
encapsulates both of these controllers and models the Aspeed-specific
registers and behavior.
Tested by reading from mmcblk0 in
,format=raw,if=mtd \
-device sd-card,drive=sd0 -drive file=_tmp/kernel,format=raw,if=sd
Signed-off-by: Eddie James
---
This patch applies on top of Cedric's set of recent Aspeed changes. Therefore,
I'm sending as an RFC rather than a patch.
Changes since v1:
- Move slot realize cod
On 8/5/19 9:31 AM, Peter Maydell wrote:
On Wed, 26 Jun 2019 at 19:43, Eddie James wrote:
The Aspeed SOCs have two SD/MMC controllers. Add a device that
encapsulates both of these controllers and models the Aspeed-specific
registers and behavior.
Both controllers use a single HW interrupt
;num-cpus", AspeedSoCState, num_cpus, 0),
diff --git a/hw/sd/Makefile.objs b/hw/sd/Makefile.objs
index 0665727..a884c23 100644
--- a/hw/sd/Makefile.objs
+++ b/hw/sd/Makefile.objs
@@ -8,3 +8,4 @@ obj-$(CONFIG_MILKYMIST) += milkymist-memcard.o
obj-$(CONFIG_OMAP) += omap_mmc.o
obj-$(CONFIG_PXA2XX) += pxa
XDMA engine.
Signed-off-by: Eddie James
---
Changes since v1:
- add trace events
- minor cleanup
This patch is based on Cedric's big Aspeed update:
http://patchwork.ozlabs.org/cover/1105343/
hw/arm/aspeed_soc.c | 19 +
hw/misc/Makefile.objs | 1 +
hw
On 6/6/19 6:34 PM, Philippe Mathieu-Daudé wrote:
Hi Eddie,
On 6/4/19 12:09 AM, Eddie James wrote:
The XDMA engine embedded in the Aspeed SOCs performs PCI DMA operations
between the SOC (acting as a BMC) and a host processor in a server.
If I got your model correctly, it does no DMA
On 6/6/19 1:16 AM, Cédric Le Goater wrote:
Hello Eddie,
On 04/06/2019 00:09, Eddie James wrote:
The XDMA engine embedded in the Aspeed SOCs performs PCI DMA operations
between the SOC (acting as a BMC) and a host processor in a server.
The XDMA engine exists on the AST2400, AST2500, and
The XDMA engine embedded in the Aspeed SOCs performs PCI DMA operations
between the SOC (acting as a BMC) and a host processor in a server.
The XDMA engine exists on the AST2400, AST2500, and AST2600 SOCs, so
enable it for all of those.
Signed-off-by: Eddie James
---
hw/arm/aspeed_soc.c
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