JonY wrote:
Dirk Behme wrote:
Hi,
is there a way to extract the contents of a qemu raw image on (x86
Linux) host without starting QEMU itself? If so, any hint would be
quite nice.
I'm looking for anything like the reverse what
http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg
Hi,
is there a way to extract the contents of a qemu raw image on (x86
Linux) host without starting QEMU itself? If so, any hint would be
quite nice.
I'm looking for anything like the reverse what
http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00448.html
seems to do. Extract files/
M. Warner Losh wrote:
Is anybody working on N770 and/or N800 emulation for qemu?
Andrzej Zaborowski worked on OMAP310 for Palm Tungsten|E machine
emulation for qemu:
http://cvs.savannah.gnu.org/viewvc/qemu/hw/?root=qemu
Please note that N770/800 has other OMAP processors than Tungsten.
N77
Stefan Weil wrote:
Dirk Behme schrieb:
Anybody else with problems accessing QEMU wiki
http://kidsquid.com/cgi-bin/moin.cgi
?
Dirk
Yes.
Stefan
Looks okay again.
Thanks
Dirk
Btw: Our QuickStartGuide reached > 10 view counts:
http://kidsquid.com/cgi-bin/moin.cgi/PageH
Anybody else with problems accessing QEMU wiki
http://kidsquid.com/cgi-bin/moin.cgi
?
Dirk
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Hi,
looking into target-mips/translate.c, in function
decode_opc() OPC_DMFC0 and OPC_DMTC0 are mapped to gen_cp0()
if MIPS64 is enabled:
case OPC_CP0:
op1 = MASK_CP0(ctx->opcode);
switch (op1) {
case OPC_MFC0:
case OPC_MTC0:
#ifdef MIPS_HAS_MIPS64
case
Roberto Polli wrote:
Alle 11:09, giovedì 28 dicembre 2006, Stefan Weil ha scritto:
booting a preinstalled winxp fails because Windows XP
crashs...and ... reboot. It won't fail if the real hardware and
QEMU's virtual hardware are nearly identical.
ok
Especially the chipset seams to be critic
Thiemo Seufer wrote:
Aurelien Jarno wrote:
I suggest to use the patch below instead. It is based on the patch I
posted [1] on the mailing list a few days ago. it moves the
initialisation of the RTC date/time into hw/mc146818rtc.c, to avoid
duplication of code. I guess all platform using this RTC
Daniel Jacobowitz wrote:
This is with all of the patches I've posted to the
list applied
If patches settle down would be nice to get a list of
patches or a summary patch to be applied in which order
against which basis. Seems that I mixed up finding the
correct ones in the correct order ;)
Oliver Gerlich wrote:
It seems the new forum location is only available from the
mailing list (I didn't find any other link).
Wiki [1] should have correct link to forum.
Best regards
Dirk
[1] http://kidsquid.com/cgi-bin/moin.cgi
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Alexey Eremenko wrote:
For example the documentation is very poor about running Qemu under
Windows host, with it's lacking details about Windows networks.
Maybe you like to check if QEMU Wiki
http://kidsquid.com/cgi-bin/moin.cgi/QemuOnWindows
can help you (and link at bottom of that page).
Bankim Bhavsar wrote:
Is there a porting guide to port QEMU to a new host OS ?
Maybe
http://libvncserver.sourceforge.net/qemu/qemu-porting.html
can help you.
Dirk
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Stefan Weil wrote:
Dirk Behme schrieb:
Hi,
anybody with success using little endian MIPS user space emulation
qemu-mipsel? I try to run a simple hello world example using recent
QEMU snapshot. It crashes with "qemu: unhandled CPU exception 0x1a -
aborting". For more details see be
wangji wrote:
Seems to me that it gets a wrong jump address via gp in t9:
0x401fa00c: lw t9,-32600(gp)
...
0x401fa01c: jalr t9
...
yes,I got similar error,but if I "static" compile then everything looks ok !
Thanks for the hint! static works for me as well.
So, maybe a toolchain (g
Hi,
anybody with success using little endian MIPS user space
emulation qemu-mipsel? I try to run a simple hello world
example using recent QEMU snapshot. It crashes with "qemu:
unhandled CPU exception 0x1a - aborting". For more details
see below. Doing the same with ARM compiler and qemu-arm
Hi,
anybody else with problems accessing QEMU Wiki?
http://kidsquid.com/cgi-bin/moin.cgi
Dirk
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Hello,
I'd like to debug low level ARM bootloader U-Boot using ARM
port of QEMU.
I use qemu-0.8.0-i386.tar.gz for this and start QEMU with
> qemu-system-arm -S -s -m 64 -net none -nographic -kernel
u-boot.bin -monitor null -parallel null -serial null
Waiting gdb connection on port 1234
(No
Marius Groeger wrote:
I agree, though, that in your debugging, you probably examined a wrong
context. The actual, current context's EXL should be correct, otherwise
things wouldn't be working at all.
Argh, debugging different context sounds nice ;) It's my
feeling that while switching between
Thiemo Seufer wrote:
Dirk Behme wrote:
I'm not sure, but while playing with MIPS interrupts, it
seems to me that something with reset of interrupt flag
MIPS_HFLAG_EXL (0x04) at exception exit (eret) is wrong. It
seems to me that only one interrupt is executed because
after
Hi,
I'm not sure, but while playing with MIPS interrupts, it
seems to me that something with reset of interrupt flag
MIPS_HFLAG_EXL (0x04) at exception exit (eret) is wrong. It
seems to me that only one interrupt is executed because
after eret, MIPS_HFLAG_EXL stays set in env->hflags. Then,
Jonathan Kalbfeld wrote:
I have an instance of NetBSD 3.0.1 that runs inside of QEMU emulating an
i386.
On the parent system, whether it is Windows, Linux, Solaris, or *BSD,
you can run an OpenVPN instance and set up a tunnel.
On the guest system, you can then run OpenVPN and connect to the ot
Paul Brook wrote:
On Monday 31 July 2006 11:20, Dirk Behme wrote:
Fix warnings
hw/mips_r4k.c: In function ‘mips_r4kc_init’:
hw/mips_r4k.c:230: warning: pointer targets in passing
argument 3 of ‘load_elf’ differ in signedness
hw/mips_r4k.c:256: warning: pointer targets in passing
argument 1
Fix warnings
hw/mips_r4k.c: In function ‘mips_r4kc_init’:
hw/mips_r4k.c:230: warning: pointer targets in passing
argument 3 of ‘load_elf’ differ in signedness
hw/mips_r4k.c:256: warning: pointer targets in passing
argument 1 of ‘strcpy’ differ in signedness
--- ./hw/mips_r4k.c_orig 2006-07-31
Fabrice Bellard wrote:
Thank you for the advices. I modified the web site: tell me if you see
other problems.
Just an idea: What's about splitting KQEMU kqemu-xxx.tar.gz
into two archives, one for Linux and one for Windows? If
Linux is tar.gz and Windows uses .zip, people don't need a
third
Andrew Malcolmson wrote:
Here is a super short addition you might want to add to the
QuickStartGuide page,
A Wiki is something anybody can add improvements himself ;)
Create an empty 3 GB image file. You will be installing into this:
a)
{{{
qemu-img create mylinux.raw 3G
}}}
b)
Instal
Hi,
sorry if this is a FAQ, but while playing with installing
Win under Linux (you know, the quick start guide) I found
that I have the "invisible wall" mouse problem as well. I
used the binary qemu-0.8.1-i386.tar.gz from QEMU's download
area. Recent CVS seems to contain [1] already. Is there
any
Fabrice Bellard wrote:
Thank you for the advices. I modified the web site: tell me if you see
other problems.
Great! Many thanks!
I'm not sure, but I think I can remember that in the
download area there was a link to the QEMU daily snapshots
(I think called "mirror"?) at
http://qemu.dad-an
This is an update of MIPS NEC VR5400 special instruction
patch [1]. It is necessary because of MIPS instruction set
configuration patch. Therefore this patch has to be applied
on top of
http://lists.gnu.org/archive/html/qemu-devel/2006-07/msg00158.html
Best regards
Dirk
[1]
http://lists.gnu.o
Hi,
just fyi: I tried to merge [1] and [2] and to distill a
"Quick start guide"
http://kidsquid.com/cgi-bin/moin.cgi/QuickStartGuide
from it. Maybe someone find it useful. I do ;)
Additionally, I agree to the first paragraph of [3] that it
would be nice to have a link to the Wiki (and to the
Q
Thiemo Seufer wrote:
...
I recommend to go for a sufficiently flexible interface first, and then
introduce it gradually in all appropriate places. A macro like:
MIPS_OPC(ISA, ASE, CPU)
which compares the arguments with the currently selected CPU emulation
and throws an RI exception if the featu
Fabrice Bellard wrote:
Dirk Behme wrote:
Fabrice Bellard wrote:
Each machine can add specific support for that (for example a -cpu
option). It is likely to come at least for the PC machines.
I add suggest one more parameter to cpu_mips_set_model() to specify
optional features. A function
Fabrice Bellard wrote:
Each machine can add specific support for that (for example a -cpu
option). It is likely to come at least for the PC machines.
...
I add suggest one more parameter to cpu_mips_set_model() to specify
optional features. A function converting a CPU "string id" into an id +
Thiemo Seufer wrote:
Dirk Behme wrote:
- As I understand it, MIPS III is an extension of MIPS II,
MIPS IV is an extension of MIPS III etc. Therefore I used
definitions for ISAx which include the smaller ones as well.
Unfortunately it is not that simple. We have the upward-compatible ISAs
Fabrice Bellard wrote:
You should add a runtime selection system : see the ARM and PowerPC
targets (I would prefer a parameter to cpu_init(). It was not done that
way on PowerPC for legacy reasons). Each machine should be able to
select the processor it needs (and allow the user to change it if
Fabrice Bellard wrote:
3. [PATCH] Add special MIPS multiply instructions
http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00375.html
Same remark.
These are NEC VR54xx specific extensions to the MIPS instruction set.
They are used if you use GCC's -march=vr5400 option. See
www.necela
Fabrice Bellard wrote:
2. [PATCH][MIPS] add "lwu" instruction
http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00326.html
On which MIPS CPU is it defined ? Need to track instruction sets exactly
to be able to select a given MIPS CPU at compile time or dynamically.
3. [PATCH] Add spe
Hi,
just fyi below my list of pending MIPS patches. Not sure if
all patches are ready for inclusion, but maybe they are
helpful for somebody. I try to track which patches are
already applied and which not. Please feel free to add,
comment, discuss etc anything.
Best regards
Dirk
Pending M
ue.
Signed-off-by: Dirk Behme
--- ./target-mips/op_helper.c_orig 2006-06-19 18:14:13.0 +0200
+++ ./target-mips/op_helper.c 2006-06-19 18:37:05.0 +0200
@@ -219,10 +219,6 @@ void do_mfc0 (int reg, int sel)
T0 = env->CP0_Status;
if (env->h
Hi,
looking in cpu_exec.c at cpu_exec() there are two code
blocks which call MIPS interrupt handling code (please see
below, (a) & (b) )
When is which block called?
I ask because a simple MIPS IRQ test doesn't work for me
like I would expect. I enable interrupts in status register.
Then, u
Hi,
I just tried to debug some simple MIPS code using
qemu-system-mipsel by setting some breakpoints. If I use
gdb's break command with symbol names the breakpoints are
set at offsets and therefore they are never hit.
Please find an example below. I'd like to stop the program
if I get an in
, machine name changes and empty function
cpu_mips_irqctrl_init() is removed.
Signed-off-by: Dirk Behme
--- ./hw/mips_timer.c_orig 2006-05-24 19:31:37.0 +0200
+++ ./hw/mips_timer.c 2006-05-24 19:36:49.0 +0200
@@ -0,0 +1,75 @@
+/*
+ * MIPS timer for qemu.
+ *
+ */
+
+#include "
Alexander Voropay wrote:
The current CVS QEMU Makefile builds "qemu-system-mips"
binary which really emulates a little-endian system and should be
renamed to the "qemu-system-mipsel"
With configure --target-list you can select mips-softmmu or
mipsel-softmmu. So I think it's a good idea to exte
Fabrice Bellard wrote:
Why adding several labels ? qemu_free(NULL) is perfectly valid. I would
just add the missing "qemu_free(phdr)" ...
Okay. Wasn't sure about this ;)
Do you want a patch for "qemu_free(phdr)"?
Dirk
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Q
Fix overflow conditions for MIPS add/subtract as proposed by
Daniel Jacobowitz.
http://lists.gnu.org/archive/html/qemu-devel/2006-04/msg00538.html
Regards
Dirk
--- target-mips/op.c_orig 2006-04-30 09:40:46.0 +0200
+++ target-mips/op.c2006-04-30 09:41:52.0 +0200
@@ -2
Fix memory leaks in ELF loader.
Regards
Dirk
--- elf_ops.h_orig 2006-05-01 09:01:47.0 +0200
+++ elf_ops.h 2006-05-01 09:09:34.0 +0200
@@ -148,7 +148,7 @@ int glue(load_elf, SZ)(int fd, int64_t v
uint8_t *data = NULL;
if (read(fd, &ehdr, sizeof(ehdr)) != sizeo
Daniel Jacobowitz wrote:
I haven't tested the patched qemu, but I did test the expressions
themselves in standalone code, and they definitely do not detect
overflow.
Maybe you can test Ralf's alternative proposal
http://lists.gnu.org/archive/html/qemu-devel/2006-02/msg00154.html
as well?
Tha
Thiemo Seufer wrote:
Fabrice Bellard wrote:
I suggest adding a parameter to cpu_mips_init() telling the exact CPU
model which is emulated. Optionnal features (such as the FPU) could be
specified with an additionnal parameter.
Probably with an additional switch "emulate everything we know abou
Hi,
while playing with different -march options of MIPS GCC, I
found that GCC generates some special R5400 three register
multiply assembly commands if used with -march=vr5400 (MULS,
MULHI, MACC etc.). These commands use 11 bit extended
opcodes where the lowest 6 bits are the same as for the
sta
Thiemo Seufer wrote:
Stefan Weil wrote:
Great, it works fine.
Thanks :)
FWIW, I have some rather massive MIPS update (e.g. MIPS32R2 support)
in the works and hope to get it finished enough the next days to
make a quilt patchset of it. I plan to integrate the other MIPS patches
into it for t
Hi,
patch below makes GDB single stepping for MIPS work.
For debugging (breakpoint set), in
target-mips/translate.c/gen_intermediate_code_internal()
gen_opc_pc[] isn't initialized. So in debugging case don't call
cpu_restore_state() which then accesses uninitalized
gen_opc_pc[]. do_raise_excepti
Thiemo Seufer wrote:
Updated version, note that this is still not suitable for CVS since
x86 fails to build with it.
fyi: for me, arm-softmmu fails as well:
.../qemu/qemu-snapshot-2006-03-30_23/target-arm/op.c
gcc: unrecognized option '-preferred-stack-boundary=2'
/qemu/qemu-snapshot-2006-03-3
Alexander Voropay wrote:
I'm trying to implement a mips_bios, unfortunately, quemu seems can't
run a code at the 0xbfc0 region.
See a http://pastebin.com/628591
The conventional 'move k0,zero' instruction (line 35) causes an general
exceprion to 0xbfc00380, see line 70
Try to change the f
Thiemo Seufer wrote:
On Tue, Mar 28, 2006 at 08:57:15AM +0200, Dirk Behme wrote:
What about the patch in attachment? It first tries to load
image as an ELF file. If this fails it falls back to raw
image load. Additionally, it takes feature of patch above to
go on even if no BIOS is found.
A
pc[j];"
single stepping seems to work.
Seems that gen_opc_pc is all 0, and j looks strange. But I
don't know whats wrong here? ;(
Best regards
Dirk
Dirk Behme wrote:
I try to debug some low level system init code on MIPS
as well. For this, I use qemu-snapshot-2006-03-21_23 because
Hi,
if nobody has an idea regarding this, any hint where to
search or how to debug this the best way?
What confuses me is that qemu.log correctly shows
pc=0x80010400 but qemu monitor register info and GDB show pc=0.
Thanks
Dirk
Dirk Behme wrote:
Hi,
now, after ARM, I try to debug some
Hi,
ELF loader feature for MIPS in patch
http://lists.gnu.org/archive/html/qemu-devel/2006-03/msg00033.html
was rejected because it breaks loading of raw kernel images:
http://lists.gnu.org/archive/html/qemu-devel/2006-03/msg00082.html
What about the patch in attachment? It first tries to loa
Hi,
now, after ARM, I try to debug some low level system init
code on MIPS as well. For this, I use
qemu-snapshot-2006-03-21_23 because this already includes
little endian MIPS (--target-list=mipsel-softmmu). I can
load my program to MIPS default start address 0x8001,
use mipsel-linux-gd
Paul Brook wrote:
If I load the binary version of image u-boot.bin into QEMU,
how does QEMU know to which start address the image was
linked to? Or do I have to load the ELF file?
qemu assumes it's loading a raw binary kernel zImage. Currently it is loaded
at 0x1. The linux kernel don't c
Paul Brook wrote:
But PC is still wrong. Who sets the PC to KERNEL_LOAD_ADDR
(0x1)?
What makes you think ti's wrong? There's a small bootloader built into qemu.
Uups. Then it seems that I start things the wrong way. I
start QEMU with -S -s, then I attach GDB, and GDB
"complains" that P
Hello,
I'd like to debug low level ARM bootloader U-Boot using ARM
port of QEMU.
I use qemu-0.8.0-i386.tar.gz for this and start QEMU with
qemu-system-arm -S -s -m 64 -net none -nographic -kernel
u-boot.bin -monitor null -parallel null -serial null
Waiting gdb connection on port 1234
(Note:
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