mmap2 is probably still broken in linux-user & other things

2020-11-08 Thread Catherine A. Frederick
Hi, I submitted a patch a while ago and then dropped off the face of the planet like most people do. In my journey to fix DRM/radeonsi in user-mode emulation I discovered a few bugs. I don't really have the time to write the infrastructure to make wrapping DRM IOCTLs remotely not-ugly, but I do

Re: [PATCH v3] tcg: Sanitize shift constants on ppc64le so that shift operations with large constants don't generate invalid instructions.

2020-06-03 Thread Catherine A. Frederick / mptcultist
Oh dear, I did it to myself again. On Wed, Jun 3, 2020 at 7:13 PM wrote: > > From: "Catherine A. Frederick" > > Signed-off-by: Catherine A. Frederick > --- > tcg/ppc/tcg-target.inc.c | 28 ++-- > 1 file changed, 22 insertions(+), 6 deleti

Re: [PATCH] tcg: Sanitize shift constants on ppc64le so that shift operations with large constants don't generate invalid instructions.

2020-06-02 Thread Catherine A. Frederick / mptcultist
Oh dear, it appears that git send-email ate the formatting, hang on. On Wed, Jun 3, 2020 at 12:47 AM wrote: > > From: "Catherine A. Frederick" > > --- > tcg/ppc/tcg-target.inc.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/tcg/ppc/tcg-targe

[RFC] Various questions about TCG implementation, DRM patches dealing with pointers over guest-host barrier.

2020-05-17 Thread Catherine A. Frederick
Hi, I've been patching TCG for my own purposes recently and I was wondering a few things. That being: - Is the TCG backend expected to handle bad cases for instructions? I was wondering as I found a situation where a very large shift constant reaches the backend and causes an illegal instructi

[Bug 1877794] Re: Constant Folding on 64-bit Subtraction causes SIGILL on linux-user glxgears ppc64le to x86_64 by way of generating bad shift instruction with c=-1

2020-05-12 Thread Catherine A. Frederick
I'm marking this invalid and moving on because it isn't replicable on upstream due to the lack of DRM support and because I'll probably just figure it out myself. (if anyone has somewhere better than tcg/README.md to learn TCG implementation details, I would appreciate it. ** Changed in: qemu

[Bug 1877794] Re: Constant Folding on 64-bit Subtraction causes SIGILL on linux-user glxgears ppc64le to x86_64 by way of generating bad shift instruction with c=-1

2020-05-10 Thread Catherine A. Frederick
I'm on 5.0-rc4 add a few patches implementing a subset of drm/amdgpu support, with mesa-utils 8.4.0-1. Important note I guess: I can't get the crash to trigger under llvmpipe/softrast, I can only get it on RadeonSI. I valgrind'd qemu only to not find anything on the host-side. I'm 99% sure this isn

[Bug 1877794] [NEW] Constant Folding on 64-bit Subtraction causes SIGILL on linux-user glxgears ppc64le to x86_64 by way of generating bad shift instruction with c=-1

2020-05-09 Thread Catherine A. Frederick
Public bug reported: Hello, I've been recently working on my own little branch of QEMU implementing the drm IOCTLs, when I discovered that glxgears seems to crash in GLXSwapBuffers(); with a SIGILL. I investigated this for about 2 weeks, manually trying to trace the call stack, only to find that w