On 9/26/19 12:18 PM, Paolo Bonzini wrote:
On 26/09/19 10:59, Maxim Levitsky wrote:
If you mean to ask if there is a way to let guest access use no
paging at all, that is access host physical addresses directly, then
indeed there is no way, since regular non 'unrestricted guest' mode
required bot
On 12/02/2016 12:12 PM, Stefan Hajnoczi wrote:
On Thu, Dec 01, 2016 at 09:35:27AM -0500, Paolo Bonzini wrote:
Maybe we could do the same for sockets? When data is available on a
socket (or when it becomes writable), write to a user memory location.
I, too, have an interest in polling; in my
On 12/01/2016 04:35 PM, Paolo Bonzini wrote:
Maybe we could do the same for sockets? When data is available on a
socket (or when it becomes writable), write to a user memory location.
I, too, have an interest in polling; in my situation most of the polling
happens in userspace.
You are tryin
On 12/01/2016 01:45 PM, Stefan Hajnoczi wrote:
On Wed, Nov 30, 2016 at 07:41:11PM +0200, Avi Kivity wrote:
On 11/29/2016 12:45 PM, Stefan Hajnoczi wrote:
On Mon, Nov 28, 2016 at 04:41:13PM +0100, Paolo Bonzini wrote:
On 28/11/2016 16:29, Stefan Hajnoczi wrote:
Thanks for sharing the link
On 11/29/2016 12:45 PM, Stefan Hajnoczi wrote:
On Mon, Nov 28, 2016 at 04:41:13PM +0100, Paolo Bonzini wrote:
On 28/11/2016 16:29, Stefan Hajnoczi wrote:
Thanks for sharing the link. I'll let you know before embarking on an
effort to make epoll support busy_loop.
At the moment I'm still eva
On 08/29/2016 08:09 PM, Pavel Butsykin wrote:
The prefetch cache aims to improve the performance of sequential read data.
Of most interest here are the requests of a small size of data for sequential
read, such requests can be optimized by extending them and moving into
the prefetch cache. Howeve
On 05/27/2015 12:30 PM, Paolo Bonzini wrote:
On 26/05/2015 23:25, Christopher Covington wrote:
On 05/25/2015 08:53 AM, Paolo Bonzini wrote:
On 22/05/2015 13:12, Daniel P. Berrange wrote:
In
particular I don't see why we need to have a SATA controller and ISA/LPC
bridge in every virt machine
On 05/21/2015 07:21 PM, Paolo Bonzini wrote:
On 21/05/2015 17:48, Avi Kivity wrote:
Lovely!
Note you have memcpy.o instead of memcpy.c.
Doh, and it's not used anyway. Check the repository, and let me know if
OSv boots with it (it probably needs ACPI; Linux doesn't boot virtio
wi
On 05/21/2015 04:51 PM, Paolo Bonzini wrote:
Some of you may have heard about the "Clear Containers" initiative from
Intel, which couple KVM with various kernel tricks to create extremely
lightweight virtual machines. The experimental Clear Containers setup
requires only 18-20 MB to launch a vir
On 10/08/2014 03:28 PM, Avi Kivity wrote:
My old presentation from 2012 or so suggested something like this.
We don't need a 64 bit cookie I think - a small 16 bit one
should be enough.
A 16 bit cookie means you need an extra table to hold the real request
pointers.
With a 64-bit c
On 10/08/2014 03:22 PM, Michael S. Tsirkin wrote:
On Wed, Oct 08, 2014 at 01:59:13PM +0300, Avi Kivity wrote:
On 10/08/2014 01:55 PM, Michael S. Tsirkin wrote:
Even more useful is getting rid of the desc array and instead passing descs
inline in avail and used.
You expect this to improve
On 10/08/2014 01:55 PM, Michael S. Tsirkin wrote:
Inline descriptors will amortize the cache miss over 4 descriptors, and will
allow the hardware to prefetch, since the descriptors are linear in memory.
If descriptors are used in order (as they are with current qemu)
then aren't they amortize
On 10/08/2014 01:55 PM, Michael S. Tsirkin wrote:
Even more useful is getting rid of the desc array and instead passing descs
inline in avail and used.
You expect this to improve performance?
Quite possibly but this will have to be demonstrated.
The top vhost function in small packet workload
On 10/08/2014 01:14 PM, Michael S. Tsirkin wrote:
On Wed, Oct 08, 2014 at 12:51:21PM +0300, Avi Kivity wrote:
On 10/08/2014 12:15 PM, Michael S. Tsirkin wrote:
On Wed, Oct 08, 2014 at 10:43:07AM +0300, Avi Kivity wrote:
On 09/30/2014 12:33 PM, Michael S. Tsirkin wrote:
a single descriptor
On 10/08/2014 12:15 PM, Michael S. Tsirkin wrote:
On Wed, Oct 08, 2014 at 10:43:07AM +0300, Avi Kivity wrote:
On 09/30/2014 12:33 PM, Michael S. Tsirkin wrote:
a single descriptor might use all of
the virtqueue. In this case we wont to be able to pass the
descriptor directly to linux as a
On 09/30/2014 12:33 PM, Michael S. Tsirkin wrote:
a single descriptor might use all of
the virtqueue. In this case we wont to be able to pass the
descriptor directly to linux as a single iov, since
You could separate maximum request scatter/gather list size from the
virtqueue size. They are
On 06/26/2014 05:31 PM, Etienne Martineau wrote:
On 14-06-26 04:18 AM, Avi Kivity wrote:
On 06/25/2014 08:53 PM, Etienne Martineau wrote:
Hi,
It seems to me that there is a scale issue O(n) in
memory_region_transaction_commit().
It's actually O(n^3). Flatview is kept sorted but is j
On 06/25/2014 08:53 PM, Etienne Martineau wrote:
Hi,
It seems to me that there is a scale issue O(n) in
memory_region_transaction_commit().
It's actually O(n^3). Flatview is kept sorted but is just a vector, so
if you insert n regions, you have n^2 operations. In addition every PCI
device
On 04/07/2014 06:17 PM, Peter Maydell wrote:
On 7 April 2014 15:56, Avi Kivity wrote:
On 04/06/2014 01:18 PM, Peter Maydell wrote:
The alternative would be to say that Int128 should have
undefined behaviour on underflow/overflow and the test
code is wrong, but that doesn't seem very usef
On 04/06/2014 01:18 PM, Peter Maydell wrote:
On 6 April 2014 08:09, Michael Tokarev wrote:
28.03.2014 19:12, Peter Maydell wrote:
Add casts when we're performing arithmetic on the .hi parts of an
Int128, to avoid undefined behaviour.
[]
static inline Int128 int128_sub(Int128 a, Int128 b)
On 01/28/2014 01:27 AM, Benjamin Herrenschmidt wrote:
On Wed, 2014-01-22 at 17:29 +, Peter Maydell wrote:
Basically if it would be on real bus, get byte value
that corresponds to phys_addr + 0 address place
it into data[0], get byte value that corresponds to
phys_addr + 1 address place it in
On 01/22/2014 12:22 PM, Peter Maydell wrote:
On 22 January 2014 05:39, Victor Kamensky wrote:
Hi Guys,
Christoffer and I had a bit heated chat :) on this
subject last night. Christoffer, really appreciate
your time! We did not really reach agreement
during the chat and Christoffer asked me to
On 01/14/2014 12:48 AM, Alex Williamson wrote:
On Mon, 2014-01-13 at 22:48 +0100, Alexander Graf wrote:
Am 13.01.2014 um 22:39 schrieb Alex Williamson :
On Sun, 2014-01-12 at 16:03 +0100, Alexander Graf wrote:
On 12.01.2014, at 08:54, Michael S. Tsirkin wrote:
On Fri, Jan 10, 2014 at 08:31
On 11/28/2013 04:12 AM, Richard Henderson wrote:
2. why not use a TLB or bigger size? currently the TLB has 1<<8 entries. the
TLB lookup is 10 x86 instructions , but every miss needs ~450 instructions, i
measured this using Intel PIN. so even the miss rate is low (say 3%) the
overall time spent
On 11/28/2013 01:31 PM, Paolo Bonzini wrote:
Il 28/11/2013 12:23, Gleb Natapov ha scritto:
Unless what ? :) Unless reader is scheduled out?
Yes. Or unless my brain is scheduled out in the middle of a sentence.
So we will have to disable preemption in a reader to prevent big latencies for
a w
On 11/28/2013 01:22 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 01:18:54PM +0200, Avi Kivity wrote:
On 11/28/2013 01:02 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 12:12:55PM +0200, Avi Kivity wrote:
On 11/28/2013 12:11 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 11:49:00AM +0200
On 11/28/2013 01:02 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 12:12:55PM +0200, Avi Kivity wrote:
On 11/28/2013 12:11 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 11:49:00AM +0200, Avi Kivity wrote:
On 11/28/2013 11:19 AM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 09:55:42AM +0100
On 11/28/2013 01:10 PM, Paolo Bonzini wrote:
Il 28/11/2013 12:09, Gleb Natapov ha scritto:
- if there are no callbacks, but there are readers, synchronize_srcu
busy-loops for some time checking if the readers complete. After a
while (20 us for synchronize_srcu, 120 us for
synchronize_srcu_exped
On 11/28/2013 12:40 PM, Paolo Bonzini wrote:
Il 28/11/2013 11:16, Avi Kivity ha scritto:
The QRCU I linked would work great latency-wise (it has roughly the same
latency of an rwsem but readers are lock-free). However, the locked
operations in the read path would hurt because of cache misses
On 11/28/2013 11:53 AM, Paolo Bonzini wrote:
Il 28/11/2013 10:49, Avi Kivity ha scritto:
Linux is safe, it does interrupt migration from within the interrupt
handler. If you do that before the device-specific EOI, you won't get
another interrupt until programming the MSI is complete
On 11/28/2013 12:11 PM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 11:49:00AM +0200, Avi Kivity wrote:
On 11/28/2013 11:19 AM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 09:55:42AM +0100, Paolo Bonzini wrote:
Il 28/11/2013 07:27, Zhanghaoyu (A) ha scritto:
Without synchronize_rcu you could
On 11/28/2013 11:19 AM, Gleb Natapov wrote:
On Thu, Nov 28, 2013 at 09:55:42AM +0100, Paolo Bonzini wrote:
Il 28/11/2013 07:27, Zhanghaoyu (A) ha scritto:
Without synchronize_rcu you could have
VCPU writes to routing table
e = entry from IRQ routing t
On 11/26/2013 06:28 PM, Paolo Bonzini wrote:
Il 26/11/2013 17:24, Gleb Natapov ha scritto:
VCPU writes to routing table
e = entry from IRQ routing table
kvm_irq_routing_update(kvm, new);
VCPU resumes execution
On 11/26/2013 06:24 PM, Gleb Natapov wrote:
On Tue, Nov 26, 2013 at 04:20:27PM +0100, Paolo Bonzini wrote:
Il 26/11/2013 16:03, Gleb Natapov ha scritto:
I understood the proposal was also to eliminate the synchronize_rcu(),
so while new interrupts would see the new routing table, interrupts
alr
On 11/26/2013 06:11 PM, Michael S. Tsirkin wrote:
On Tue, Nov 26, 2013 at 06:06:26PM +0200, Avi Kivity wrote:
On 11/26/2013 05:58 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:35, Avi Kivity ha scritto:
If we want to ensure, we need to use a different mechanism for
synchronization than the global
On 11/26/2013 05:58 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:35, Avi Kivity ha scritto:
If we want to ensure, we need to use a different mechanism for
synchronization than the global RCU. QRCU would work; readers are not
wait-free but only if there is a concurrent synchronize_qrcu, which
On 11/26/2013 05:28 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:25, Avi Kivity ha scritto:
If we want to ensure, we need to use a different mechanism for
synchronization than the global RCU. QRCU would work; readers are not
wait-free but only if there is a concurrent synchronize_qrcu, which
On 11/26/2013 05:20 PM, Paolo Bonzini wrote:
Il 26/11/2013 16:03, Gleb Natapov ha scritto:
I understood the proposal was also to eliminate the synchronize_rcu(),
so while new interrupts would see the new routing table, interrupts
already in flight could pick up the old one.
Isn't that always th
On 11/26/2013 05:03 PM, Gleb Natapov wrote:
On Tue, Nov 26, 2013 at 04:54:44PM +0200, Avi Kivity wrote:
On 11/26/2013 04:46 PM, Paolo Bonzini wrote:
Il 26/11/2013 15:36, Avi Kivity ha scritto:
No, this would be exactly the same code that is running now:
mutex_lock(&
On 11/26/2013 04:46 PM, Paolo Bonzini wrote:
Il 26/11/2013 15:36, Avi Kivity ha scritto:
No, this would be exactly the same code that is running now:
mutex_lock(&kvm->irq_lock);
old = kvm->irq_routing;
kvm_irq_routing_updat
On Tue, Nov 26, 2013 at 3:47 PM, Paolo Bonzini wrote:
> Il 26/11/2013 14:18, Avi Kivity ha scritto:
> >
> >> I don't think a workqueue is even needed. You just need to use call_rcu
> >> to free "old" after releasing kvm->irq_lock.
> >>
>
On Tue, Nov 26, 2013 at 2:47 PM, Paolo Bonzini wrote:
> Il 26/11/2013 13:40, Zhanghaoyu (A) ha scritto:
>> When guest set irq smp_affinity, VMEXIT occurs, then the vcpu thread
will IOCTL return to QEMU from hypervisor, then vcpu thread ask the
hypervisor to update the irq routing table,
>> in kvm_
On 11/17/2013 05:37 PM, Michael S. Tsirkin wrote:
On Thu, Nov 14, 2013 at 05:42:26PM +0200, Avi Kivity wrote:
On 11/14/2013 05:37 PM, Michael S. Tsirkin wrote:
On Thu, Nov 14, 2013 at 04:56:43PM +0200, Avi Kivity wrote:
On 11/14/2013 04:40 PM, Michael S. Tsirkin wrote:
On Thu, Nov 14, 2013
On 11/14/2013 05:37 PM, Michael S. Tsirkin wrote:
On Thu, Nov 14, 2013 at 04:56:43PM +0200, Avi Kivity wrote:
On 11/14/2013 04:40 PM, Michael S. Tsirkin wrote:
On Thu, Nov 14, 2013 at 08:54:11AM +, Avi Kivity wrote:
Michael S. Tsirkin redhat.com> writes:
At the moment, memory ra
On 11/14/2013 04:40 PM, Michael S. Tsirkin wrote:
On Thu, Nov 14, 2013 at 08:54:11AM +, Avi Kivity wrote:
Michael S. Tsirkin redhat.com> writes:
At the moment, memory radix tree is already variable width, but it can
only skip the low bits of address.
This is efficient if we have h
On 11/14/2013 03:29 PM, Stefan Hajnoczi wrote:
On Tue, Nov 12, 2013 at 01:10:24PM +0200, Avi Kivity wrote:
Out-of-the-box, 'make install' sets up an unusable qemu-bridge-helper since
it doesn't have the required capabilities.
Fix by adding them.
Up until now, downstreams
Michael S. Tsirkin redhat.com> writes:
>
> At the moment, memory radix tree is already variable width, but it can
> only skip the low bits of address.
>
> This is efficient if we have huge memory regions but inefficient if we
> are only using a tiny portion of the address space.
>
> After we h
On Nov 12, 2013 9:23 PM, "Eric Blake" wrote:
>
> On 11/12/2013 04:10 AM, Avi Kivity wrote:
> > Out-of-the-box, 'make install' sets up an unusable qemu-bridge-helper
since
> > it doesn't have the required capabilities.
> >
> > Fix by adding th
a broken
setup. Perhaps we need a configure flag to disable helpers.
Signed-off-by: Avi Kivity
---
Makefile | 3 +++
rules.mak | 2 ++
2 files changed, 5 insertions(+)
diff --git a/Makefile b/Makefile
index b15003f..af7748c 100644
--- a/Makefile
+++ b/Makefile
@@ -188,6 +188,7 @@ qemu-img$(EXES
On Apr 29, 2013 9:06 PM, "Anthony Liguori" wrote:
>
> In order to make this change, we need to relicense all contributions
> from initial import of the SoftFloat code to match the license of
> SoftFloat-2a (instead of the implied SoftFloat-2b license).
Acked-by: Avi Kivity
On Tue, Feb 19, 2013 at 6:08 PM, Michael S. Tsirkin wrote:
>>
>> The IOAPIC is actually closer to ISA, but again it's sufficient to
>> move it to the PCI address space. I doubt its priority matters.
>
> Well moving IOAPIC to PCI seems strange, it's not a PCI thing,
> and I think it can be moved o
On Tue, Feb 19, 2013 at 4:41 PM, Michael S. Tsirkin wrote:
> On Thu, Feb 14, 2013 at 08:23:04PM +0200, Avi Kivity wrote:
>> On Thu, Feb 14, 2013 at 8:12 PM, Michael S. Tsirkin wrote:
>> >>
>> >> Is there an actual real problem that needs fixing?
>> >
&g
On Thu, Feb 14, 2013 at 8:12 PM, Michael S. Tsirkin wrote:
>>
>> Is there an actual real problem that needs fixing?
>
> Yes. Guests sometimes cause device BARs to temporary overlap
> the APIC range during BAR sizing. It works fine on a physical
> system but fails on KVM since pci has same priority
On Thu, Feb 14, 2013 at 6:50 PM, Michael S. Tsirkin wrote:
>> > As you see, ioapic at 0xfec0 overlaps pci-hole.
>> > ioapic is guest programmable in theory - should use _overlap?
>> > pci-hole is not but can overlap with ioapic.
>> > So also _overlap?
>>
>> It's a bug. The ioapic is in the pc
On Thu, Feb 14, 2013 at 4:40 PM, Michael S. Tsirkin wrote:
> On Thu, Feb 14, 2013 at 04:14:39PM +0200, Avi Kivity wrote:
>
> But some parents are system created and shared by many devices so children for
> such have no idea who their siblings are.
>
> Please take a look at the t
On Thu, Feb 14, 2013 at 4:02 PM, Michael S. Tsirkin wrote:
> On Thu, Feb 14, 2013 at 01:22:18PM +, Peter Maydell wrote:
>> On 14 February 2013 13:09, Michael S. Tsirkin wrote:
>> > On Thu, Feb 14, 2013 at 12:56:02PM +, Peter Maydell wrote:
>> >> Up to the parent which controls the region
On Thu, Feb 14, 2013 at 3:09 PM, Michael S. Tsirkin wrote:
> On Thu, Feb 14, 2013 at 12:56:02PM +, Peter Maydell wrote:
>> On 14 February 2013 12:45, Michael S. Tsirkin wrote:
>> > overlap flag in the region is currently unused, most devices have no
>> > idea whether their region overlaps wit
On Jan 31, 2013 11:14 PM, "Michael S. Tsirkin" wrote:
>
> On Thu, Jan 31, 2013 at 05:20:02PM +0200, Avi Kivity wrote:
> > On Thu, Jan 31, 2013 at 4:42 PM, Gleb Natapov wrote:
> > > On Thu, Jan 31, 2013 at 04:36:25PM +0200, Avi Kivity wrote:
> > >> On
On Jan 31, 2013 12:29 PM, "Orit Wasserman" wrote:
>
> On 01/31/2013 11:48 AM, Gleb Natapov wrote:
> > On Thu, Jan 31, 2013 at 09:47:24AM +0200, Orit Wasserman wrote:
> >> On 01/31/2013 08:57 AM, Peter Lieven wrote:
> >>> Hi,
> >>>
> >>> I just came across an idea and would like to have feedback if
On Thu, Jan 31, 2013 at 4:42 PM, Gleb Natapov wrote:
> On Thu, Jan 31, 2013 at 04:36:25PM +0200, Avi Kivity wrote:
>> On Thu, Jan 31, 2013 at 4:30 PM, Gleb Natapov wrote:
>> >> >
>> >> > Avi/Michael do you remember why mincore can't be used to chec
On Jan 31, 2013 4:03 PM, "Peter Lieven" wrote:
>
>
> Am 31.01.2013 um 14:59 schrieb Avi Kivity :
>
>>
>> On Jan 31, 2013 12:29 PM, "Orit Wasserman" wrote:
>> >
>> > On 01/31/2013 11:48 AM, Gleb Natapov wrote:
>> > > On Thu
On Thu, Jan 31, 2013 at 4:30 PM, Gleb Natapov wrote:
>> >
>> > Avi/Michael do you remember why mincore can't be used to check if a guest
>> page is unmapped?
>>
>> A page may be not in core, but also nonzero (for example swap).
> Yes, mincore() should not be used as zero page check, but it can be
On 11/27/2012 10:34 AM, Paolo Bonzini wrote:
> Some versions of GCC require insane (>2GB) amounts of memory
> to compile translate.o. As a countermeasure, compile it
> with -O1. This should fix the buildbot failure for
> default_x86_64_fedora16.
>
> Signed-off-by: Paolo Bonzini
> ---
> Makefil
On 11/25/2012 05:01 PM, Andreas Färber wrote:
>
> Note that there are still some register_ioport_*() usages left:
> $ git grep register_ioport -- hw/ | grep -v isa_register_ioport | wc --lines
> 32
>
For the record, my plan for when that number drops to zero was to use
address_space_rw() (or fri
On 11/25/2012 02:42 PM, Andreas Färber wrote:
> Am 25.11.2012 10:10, schrieb Avi Kivity:
>> On 09/19/2012 02:50 PM, Julien Grall wrote:
>>> This is the tenth version of patch series about ioport registration.
>>>
>>> Some part of QEMU still use register_
On 11/25/2012 12:45 PM, Jan Kiszka wrote:
> On 2012-11-25 11:18, Avi Kivity wrote:
>> On 11/05/2012 02:37 PM, Jan Kiszka wrote:
>>>>
>>>> As I noted, init and destroy cannot cause a topology update.
>>>
>>> Ah, right. Why are we wrapping them in
On 11/05/2012 02:37 PM, Jan Kiszka wrote:
>>
>> As I noted, init and destroy cannot cause a topology update.
>
> Ah, right. Why are we wrapping them in transaction_begin/commit at all then?
>
We aren't.
void memory_region_destroy(MemoryRegion *mr)
{
assert(QTAILQ_EMPTY(&mr->subregions));
On 09/19/2012 02:50 PM, Julien Grall wrote:
> This is the tenth version of patch series about ioport registration.
>
> Some part of QEMU still use register_ioport* functions to register ioport.
> These functions doesn't allow to use Memory Listener on it.
Acked-by: Avi Kivity
On 11/24/2012 03:09 AM, Julien Grall wrote:
> ping ?
>
Sorry, I must have missed this (twice).
--
error compiling committee.c: too many arguments to function
On 11/20/2012 11:01 AM, Wanlong Gao wrote:
>> $ git bisect good
>> d22b096ef6e0b20810193b68a1d472f3fb8a4f9e is the first bad commit
>> commit d22b096ef6e0b20810193b68a1d472f3fb8a4f9e
>> Author: Avi Kivity
>> Date: Sun Sep 30 22:21:11 2012 +0200
>>
>>
On 11/13/2012 01:44 PM, Peter Maydell wrote:
> On 26 October 2012 17:00, Peter Maydell wrote:
>> On 26 October 2012 14:09, Paolo Bonzini wrote:
>>> As soon as Avi's iommu patches go in, in fact, dma->as will just be as.
>>> Even if as == NULL were to be outlawed and you'd be forced to write
>>> g
On 11/15/2012 09:47 AM, liu ping fan wrote:
> On Wed, Nov 14, 2012 at 5:47 PM, Paolo Bonzini wrote:
>> Il 14/11/2012 10:38, liu ping fan ha scritto:
>>> On Tue, Nov 13, 2012 at 6:11 PM, Paolo Bonzini wrote:
>> Il 05/11/2012 06:38, Liu Ping Fan ha scritto:
>>> From: Liu Ping Fan
>>>
>
On 11/02/2012 10:00 AM, Jan Kiszka wrote:
> >
> >> As I understand the series, as->lock == NULL means that we will never
> >> take any lock during dispatch as the caller is not yet ready for
> >> fine-grained locking. This prevents the problem - for PIO at least. But
> >> this series should break
On 11/05/2012 10:51 AM, Jan Kiszka wrote:
> On 2012-11-05 09:12, Avi Kivity wrote:
> > On 11/05/2012 08:26 AM, Jan Kiszka wrote:
> >> On 2012-11-04 20:21, Avi Kivity wrote:
> >>> On 11/04/2012 10:30 AM, Jan Kiszka wrote:
> >>>> From: Jan Kiszka
> &g
On 11/05/2012 08:26 AM, Jan Kiszka wrote:
> On 2012-11-04 20:21, Avi Kivity wrote:
> > On 11/04/2012 10:30 AM, Jan Kiszka wrote:
> >> From: Jan Kiszka
> >>
> >> Cirrus is triggering this, e.g. during Win2k boot: Changes only on
> >> disabled region
On 11/04/2012 10:30 AM, Jan Kiszka wrote:
> From: Jan Kiszka
>
> Cirrus is triggering this, e.g. during Win2k boot: Changes only on
> disabled regions require no topology update when transaction depth drops
> to 0 again.
817dcc5368988b0 (pci: give each device its own address space) mad this
much
On 10/30/2012 09:06 AM, liu ping fan wrote:
>>> while (len > 0) {
>>> page = addr & TARGET_PAGE_MASK;
>>> l = (page + TARGET_PAGE_SIZE) - addr;
>>> if (l > len)
>>> l = len;
>>> -section = phys_page_find(d, page >> TARGET_PAGE_BITS);
>>> +
>>> +
On 10/29/2012 11:46 AM, liu ping fan wrote:
> On Mon, Oct 29, 2012 at 5:32 PM, Avi Kivity wrote:
>> On 10/29/2012 01:48 AM, Liu Ping Fan wrote:
>>> For those address spaces which want to be able out of big lock, they
>>> will be protected by their own local.
>>
On 11/01/2012 03:44 PM, Avi Kivity wrote:
>
> However we do have a problem with non-1/2/4/8 byte writes. Right now
> any mismatched access ends up as an 8 byte write, we need an extra
> accessor for arbitrary writes, or rather better use of the .impl members
> of MemoryRegionOp
On 10/31/2012 08:59 PM, Benjamin Herrenschmidt wrote:
> On Wed, 2012-10-31 at 12:32 +0200, Avi Kivity wrote:
>> This has nothing to do with device endianness; we're translating from a
>> byte buffer (address_space_rw()) to a uint64_t
>> (MemoryRegionOps::read/write(
On 10/31/2012 02:18 PM, Stefan Hajnoczi wrote:
>>
>> IMO we should use the same mechanism as proposed for other devices:
>> address_space_map() should grab a reference on the dimm device, and
>> address_space_unmap() can release it. This way device destruction will
>> be deferred as soon as all de
On 10/31/2012 01:19 PM, Orit Wasserman wrote:
> The number of bits is off by one, for example if last_ram_offset
> is 0x1000 (the guest has one page) we get 0 bits instead of 1.
>
> Signed-off-by: Orit Wasserman
> ---
> arch_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> dif
On 10/31/2012 12:58 PM, Stefan Hajnoczi wrote:
> On Fri, Sep 21, 2012 at 1:17 PM, Vasilis Liaskovitis
> wrote:
>> This is v3 of the ACPI memory hotplug functionality. Only x86_64 target is
>> supported
>> for now.
>
> Hi Vasilis,
> Regarding the hot unplug issue we've been discussing, it's possi
On 10/24/2012 10:06 AM, liu ping fan wrote:
> On Tue, Oct 23, 2012 at 8:25 PM, Stefan Hajnoczi wrote:
>> On Fri, Sep 21, 2012 at 01:17:21PM +0200, Vasilis Liaskovitis wrote:
>>> +static void dimm_populate(DimmDevice *s)
>>> +{
>>> +DeviceState *dev= (DeviceState*)s;
>>> +MemoryRegion *new
On 10/30/2012 09:18 PM, Blue Swirl wrote:
> On Tue, Oct 30, 2012 at 11:47 AM, Avi Kivity wrote:
>> This iommu encrypts addresses on the device bus to avoid divuling information
>> to hackers equipped with bus analyzers. Following 3DES, addresses are
>> encrypted
>> mu
On 10/30/2012 09:14 PM, Blue Swirl wrote:
> On Tue, Oct 30, 2012 at 11:47 AM, Avi Kivity wrote:
>> Accesses which do not translate will hit the fault region, which
>> can then log the access.
>
> Maybe special casing the fault region should be avoided, the IOMMU
> cou
On 10/30/2012 09:11 PM, Blue Swirl wrote:
> On Tue, Oct 30, 2012 at 11:47 AM, Avi Kivity wrote:
>> Add a new memory region type that translates addresses it is given,
>> then forwards them to a target address space. This is similar to
>> an alias, except that the mapping is
On 10/30/2012 03:42 PM, Peter Crosthwaite wrote:
> On Tue, Oct 30, 2012 at 7:51 PM, Avi Kivity wrote:
>> On 10/29/2012 10:32 AM, Peter Maydell wrote:
>>> On 29 October 2012 06:35, Peter Crosthwaite
>>> wrote:
>>>> Device model for Primecell PL330 dma
On 10/30/2012 02:16 PM, Paolo Bonzini wrote:
> The LAPIC is loaded separately from the rest of the VCPU state. Thus,
> when restoring the CPU the dummy post-reset state is passed to the
> in-kernel APIC.
>
> This can cause MSI injection to fail if attempted during the restore of
> another device,
Accesses which do not translate will hit the fault region, which
can then log the access.
Signed-off-by: Avi Kivity
---
memory.c | 9 ++---
memory.h | 4
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/memory.c b/memory.c
index ba2d4a0..d6b46fd 100644
--- a/memory.c
implementation uses an AddressSpace mapping the target region to
avoid hierarchical dispatch all the way to the resolved region; only
iommu regions are looked up dynamically.
Signed-off-by: Avi Kivity
---
exec.c | 28 ++---
memory.c | 106
vfio doesn't support guest iommus yet, indicate it to the user
by gently depositing a core on their disk.
Signed-off-by: Avi Kivity
---
hw/vfio_pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/vfio_pci.c b/hw/vfio_pci.c
index 0473ae8..bd7a075 100644
--- a/hw/vfio_pci.c
+++
eliminated by the memory core, leaving only device regions
which have reasonable sizes. An IOMMU however cannot be eliminated by the
memory core, and may have an artificial size.
Signed-off-by: Avi Kivity
---
exec.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a
This iommu encrypts addresses on the device bus to avoid divuling information
to hackers equipped with bus analyzers. Following 3DES, addresses are encrypted
multiple times. A XOR cypher is employed for efficiency.
Signed-off-by: Avi Kivity
---
hw/piix_pci.c | 77
Use the new iommu support in the memory core for iommu support.
The only user, spapr, is also converted.
Signed-off-by: Avi Kivity
---
hw/pci.c | 59 +-
hw/pci.h | 7 +--
hw/pci_internals.h | 5 +++--
hw/spapr.h
A couple of fields were left uninitialized. This was not observed earlier
because all address spaces were statically allocated. Also free allocation
for those fields.
Signed-off-by: Avi Kivity
---
memory.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/memory.c b/memory.c
index
Changes from RFC:
- change ->translate to return read/write permissions in IOTLBEntry (was:
->translate received is_write parameter)
- add support for iommu fault reporting
Avi Kivity (7):
memory: fix address space initialization/destruction
memory: limit sections in the radix t
On 10/29/2012 10:32 AM, Peter Maydell wrote:
> On 29 October 2012 06:35, Peter Crosthwaite
> wrote:
>> Device model for Primecell PL330 dma controller.
>
> A general question -- this is a DMA controller so should it be using
> the DMAContext APIs now? Avi?
IOMMU functionality will be folded into
On 10/29/2012 01:37 AM, John Williams wrote:
>> IMO, an mr per reg would just add a massive overhead for no win.
>
> I tend to agree with Edgar here - QEMU has a careful line to walk between
> being an emulator and an RTL simulator.
>
> Any WAG on the runtime overhead of a mem region per regist
On 10/27/2012 06:12 AM, Edgar E. Iglesias wrote:
>
> Hi,
>
> If well designed, most hw has a well designed symtery between regs
> that makes things simpler if you can just opencode the decding.
> IMO, an mr per reg would just add a massive overhead for no win.
> And also, hw implemented decoders
1 - 100 of 4803 matches
Mail list logo
