On 30/04/25, Pierrick Bouvier wrote:
> Signed-off-by: Pierrick Bouvier
> ---
> target/arm/cpu.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 07f279fec8c..37b11e8866f 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
On 29/04/25, Pierrick Bouvier wrote:
> Remove TARGET_BIG_ENDIAN dependency.
>
> Signed-off-by: Pierrick Bouvier
> ---
> target/arm/cpu.c | 22 +++---
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index e7a15ade8b4..85e
On 28/04/25, Richard Henderson wrote:
> On 4/28/25 11:51, Anton Johansson wrote:
> > On 24/04/25, Philippe Mathieu-Daudé wrote:
> > > Restrict iotlb_to_section(), address_space_translate_for_iotlb()
> > > and memory_region_section_get_iotlb() to TCG. Declare them in
> > > the new "accel/tcg/iommu.h
On 24/04/25, Philippe Mathieu-Daudé wrote:
> Restrict iotlb_to_section(), address_space_translate_for_iotlb()
> and memory_region_section_get_iotlb() to TCG. Declare them in
> the new "accel/tcg/iommu.h" header. Declare iotlb_to_section()
> using the MemoryRegionSection typedef.
>
> Signed-off-by:
On 24/04/25, Philippe Mathieu-Daudé wrote:
> From: Richard Henderson
>
> Signed-off-by: Richard Henderson
> Message-ID: <20250424011918.599958-16-richard.hender...@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> accel/tcg/tb-hash.h | 3 +--
> accel/tcg/tb-maint.c | 2 --
> accel
On 24/04/25, Philippe Mathieu-Daudé wrote:
> From: Richard Henderson
>
> Signed-off-by: Richard Henderson
> Reviewed-by: Philippe Mathieu-Daudé
> Message-ID: <20250424011918.599958-15-richard.hender...@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/exec/exec-all.h
On 24/04/25, Philippe Mathieu-Daudé wrote:
> From: Richard Henderson
>
> Signed-off-by: Richard Henderson
> Message-ID: <20250424011918.599958-14-richard.hender...@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/user/page-protection.h | 17 +---
> accel/tcg/user-exe
On 24/04/25, Philippe Mathieu-Daudé wrote:
> Most files including "exec/helper-proto.h" call GETPC().
> Include it there (in the common part) instead of the
> unspecific "exec/exec-all.h" header.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> include/exec/exec-all.h| 1 -
> includ
On 21/03/25, Philippe Mathieu-Daudé wrote:
> Add the TCGCPUOps::guest_default_memory_order field and have
> each target initialize it.
>
> Use it to set TCGContext::guest_mo in tb_gen_code(), removing
> the need for the TCG_GUEST_DEFAULT_MO definition.
>
> Signed-off-by: Philippe Mathieu-Daudé
>
The purpose of the prepare script is to invoke `cpp` to preprocess input
to idef-parser by expanding a few select macros. On macOS `cpp`
expands into `clang ... -traditional-cpp` which breaks macro
concatenation. Replace `cpp` with `${compiler} -E`
and replace the script with a meson custom_targe
indent on macOS, installed via homebrew, doesn't support -linux. Only
run indent on linux hosts.
Signed-off-by: Anton Johansson
---
target/hexagon/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build
index abcf00c
A default macOS build with xcode cli tools installed lacks the `indent`
program needed by the idef-parser postprocess step. If `indent` is
installed through homebrew it doesn't support the `-linux` flag.
Conditionally run `indent` only on linux hosts.
Additionally `cpp` used by the idef-parser pre
On 21/03/25, Philippe Mathieu-Daudé wrote:
> Hi,
>
> In this series we replace the TCG_GUEST_DEFAULT_MO definition
> from "cpu-param.h" by a 'guest_default_memory_order' field in
> TCGCPUOps.
>
> Since tcg_req_mo() now accesses tcg_ctx, this impact the
> cpu_req_mo() calls in accel/tcg/{cputlb,us
On 25/03/25, Philippe Mathieu-Daudé wrote:
> - Remove the TARGET_MIPS64 use in 'cpu-qom.h' to
> make it target agnostic
> - Introduce mips_cpu_is_64bit() as a runtime check
> for compile time TARGET_MIPS64 definition
> - Replace the ldtul_p() gdbstub call by ldn_p()
> - Rename few symbols to av
On 25/03/25, Brian Cain wrote:
>
> On 3/24/2025 8:53 PM, ltaylorsimp...@gmail.com wrote:
> >
> > > -Original Message-
> > > From: Anton Johansson
> > > Sent: Wednesday, March 12, 2025 2:46 PM
> > > To: qemu-devel@nongnu.org
> > > Cc: a...@rev.ng; ltaylorsimp...@gmail.com; brian.c...@oss.
On 21/03/25, Philippe Mathieu-Daudé wrote:
> Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
> have each target set the 'mttcg_supported' field in the TCGCPUOps
> structure.
>
> Since so far we only emulate one target architecture at a time,
> tcg_init_machine() gets whether MTT
On 21/03/25, Philippe Mathieu-Daudé wrote:
> In order to use TCG with multiple targets, replace the
> compile time use of TCG_GUEST_DEFAULT_MO by a runtime
> access to tcg_ctx->guest_mo.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> accel/tcg/internal-target.h | 4 +---
> 1 file changed, 1 i
On 21/03/25, Philippe Mathieu-Daudé wrote:
> Use the OnOffAuto type as 3-state.
>
> Since the TCGState instance is zero-initialized, the
> mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO).
>
> In tcg_init_machine(), if mttcg_enabled is still AUTO,
> set a default value (effectively inlining
On 21/03/25, Philippe Mathieu-Daudé wrote:
> Now that TCG_GUEST_DEFAULT_MO is always defined,
> simplify the tcg_req_mo() macro.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> accel/tcg/internal-target.h | 9 +
> accel/tcg/tcg-all.c | 3 ---
> 2 files changed, 1 insertion(+),
On 21/03/25, Philippe Mathieu-Daudé wrote:
> We only require the TCG_GUEST_DEFAULT_MO for MTTCG-enabled
> frontends, otherwise we use a default value of TCG_MO_ALL.
>
> In order to simplify, require the definition for all targets,
> defining it for hexagon, m68k, rx, sh4 and tricore.
>
> Signed-o
The indent command is not available on a default mac osx setup with
xcode cli tools installed. While it does make idef-parser generated
code nicer to debug, it's not crucial and can be dropped.
Signed-off-by: Anton Johansson
---
target/hexagon/meson.build | 21 ++---
1 file chan
The purpose of the prepare script is to invoke `cpp` to preprocess input
to idef-parser by expanding a few select macros. On mac osx `cpp`
expands into `clang ... -traditional-cpp` which breaks macro
concatenation. Replace `cpp` with `${compiler} -E`
and replace the script with a meson custom_tar
A default macOS build with xcode cli tools installed lacks the `indent`
program needed by the idef-parser postprocess step, remove this step.
Additionally `cpp` used by the idef-parser preprocess step expands into
`clang ... -traditional-cpp` and doesn't support macro concatenation
among other th
On 12/03/25, Philippe Mathieu-Daudé wrote:
> In order to make QEMU core components endian agnostic,
> we need to remove the use of the target-specific MO_TE
> definition. For Hexagon it is easy as it is equivalent
> of MO_LE, since the target is only little-endian.
>
> Philippe Mathieu-Daudé (2):
On 04/03/25, Philippe Mathieu-Daudé wrote:
>
> On default macOS I get:
>
> Program bison found: NO found 2.3 but need: '>=3.0' (/usr/bin/bison)
>
> Fixed by installing via brew and:
>
> export PATH=/opt/homebrew/opt/bison/bin:$PATH
>
> > @@ -401,3 +409,4 @@ analyze_funcs_generated = custom_
On 04/02/25, Philippe Mathieu-Daudé wrote:
> ping for trivial review?
>
> On 8/11/24 16:43, Philippe Mathieu-Daudé wrote:
> > When a property value is static (not provided by QMP or CLI),
> > error shouldn't happen, otherwise it is a programming error.
> > Therefore simplify and use &error_abort a
QOL commit, all the various gen_* python scripts take a large set
arguments where order is implicit. Using argparse we also get decent
error messages if a field is missing or too many are added.
Signed-off-by: Anton Johansson
Reviewed-by: Brian Cain
---
target/hexagon/gen_analyze_funcs.py
Separate submission of patches 35 and 37 from the helper-to-tcg
patchset:
https://lore.kernel.org/qemu-devel/20241121014947.18666-1-a...@rev.ng/
Anton Johansson (2):
target/hexagon: Use argparse in all python scripts
target/hexagon: Make HVX vector args. restrict *
target/hexagon/gen_anal
Adds restrict qualifier to HVX pointer arguments. This will allow the
compiler to produce better optimized code, as input vectors are now
assumed not to alias, and no runtime aliasing checks will be required.
Signed-off-by: Anton Johansson
Reviewed-by: Brian Cain
---
target/hexagon/mmvec/macros
On 03/12/24, Richard Henderson wrote:
> On 12/3/24 12:08, Anton Johansson wrote:
> > On 22/11/24, Richard Henderson wrote:
> > > On 11/20/24 19:49, Anton Johansson wrote:
> > > > Adds new functions to the gvec API for truncating, sign- or zero
> > > > extending vector elements. Currently implement
On 22/11/24, Paolo Bonzini wrote:
> On 11/22/24 18:30, Richard Henderson wrote:
> > On 11/20/24 19:49, Anton Johansson wrote:
> > > Adds a meson option for enabling/disabling helper-to-tcg along with a
> > > CONFIG_* definition.
> > >
> > > CONFIG_* will in future commits be used to conditionally
On 25/11/24, Philippe Mathieu-Daudé wrote:
> On 22/11/24 19:12, Richard Henderson wrote:
> > On 11/20/24 19:49, Anton Johansson wrote:
> > > Wrap __attribute__((annotate(str))) in a macro for convenient
> > > function annotations. Will be used in future commits to tag functions
> > > for translati
On 25/11/24, Philippe Mathieu-Daudé wrote:
> On 21/11/24 02:49, Anton Johansson wrote:
>
> > create mode 100644 subprojects/helper-to-tcg/README.md
> > create mode 100755 subprojects/helper-to-tcg/get-llvm-ir.py
> > create mode 100644 subprojects/helper-to-tcg/include/CmdLineOptions.h
> >
On 25/11/24, Paolo Bonzini wrote:
> On 11/25/24 12:36, Philippe Mathieu-Daudé wrote:
> > > +#define QeV (*(MMQReg * restrict)(QeV_void))
> > > +#define QdV (*(MMQReg * restrict)(QdV_void))
> > > +#define QsV (*(MMQReg * restrict)(QsV_void))
> > > +#define QtV (*(MMQReg * restric
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson wrote:
> > Temporary vectors in helper-to-tcg generated code are allocated from an
> > array of bytes in CPUArchState, specified with --temp-vector-block.
> >
> > This commits adds such a block of memory to CPUArchState, if
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson wrote:
> > Adds a functions to return the current mmu index given tb_flags of the
> > current translation block. Required by helper-to-tcg in order to
> > retrieve the mmu index for memory operations without changing the
>
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson via wrote:
> > Adds a struct representing everything a LLVM value might map to in TCG,
> > this includes:
> >
> >* TCGv (IrValue);
> >* TCGv_ptr (IrPtr);
> >* TCGv_
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson wrote:
> > Introduces a new python helper script to convert a set of QEMU .c files to
> > LLVM IR .ll using clang. Compile flags are found by looking at
> > compile_commands.json, and llvm-link is used to link together all
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson wrote:
> > Adds a function pointer to the TCGContext which may be set by targets via
> > the TARGET_HELPER_DISPATCHER macro. The dispatcher is function
> >
> >(void *func, TCGTemp *ret, int nargs, TCGTemp **args) -> bo
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson wrote:
> > This commit adds a gvec function for copying data from constant array
> > given in C to a gvec intptr_t. For each element, a host store of
> > each constant is performed, this is not ideal and will inflate TBs fo
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson wrote:
> > Adds new functions to the gvec API for truncating, sign- or zero
> > extending vector elements. Currently implemented as helper functions,
> > these may be mapped onto host vector instructions in the future.
> >
On 22/11/24, Richard Henderson wrote:
> On 11/20/24 19:49, Anton Johansson wrote:
> > Adds necessary helper functions for mapping LLVM IR onto TCG.
> > Specifically, helpers corresponding to the bitreverse and funnel-shift
> > intrinsics in LLVM.
> >
> > Note: these may be converted to more effici
On 27/11/24, Philippe Mathieu-Daudé wrote:
> Rather than initializing the first random target architecture
> and ignore the following ones when a global boolean is set,
> use a bitmask allowing different frontend targets to be
> initialized.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> acce
On 27/11/24, Philippe Mathieu-Daudé wrote:
> When using multiple TCG frontends concurrently, we need to
> be able to discriminate by target architecture. While we
> can infer that from the CPUClass, it can be quicker to get
> it from a direct field in TCGCPUOps.
>
> Signed-off-by: Philippe Mathieu
On 27/11/24, Philippe Mathieu-Daudé wrote:
> Ease reading code by declaring a local 'tcg_ops' variable.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> accel/tcg/cpu-exec.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Anton Johansson
On 27/11/24, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> Acked-by: Nicholas Piggin
> ---
> target/ppc/cpu_init.c | 29 ++---
> 1 file changed, 14 insertions(+), 15 deletions(-)
Reviewed-by: Anton Johansson
If pointer arguments to HVX helper functions are not marked restrict *,
then LLVM will assume that input vectors may alias and emit runtime
checks.
Signed-off-by: Anton Johansson
---
target/hexagon/mmvec/macros.h | 36 +--
1 file changed, 18 insertions(+), 18 dele
Sets up a barebones meson.build that handles:
1. Exposing command for converting .c files to LLVM IR by looking at
compile_commads.json;
2. Finding LLVM and verifying the LLVM version manually by running
llvm-config, needed for dealing with multiple LLVM versions in a
sane way;
Wrap __attribute__((annotate(str))) in a macro for convenient
function annotations. Will be used in future commits to tag functions
for translation by helper-to-tcg, and to specify which helper function
arguments correspond to immediate or vector values.
Signed-off-by: Anton Johansson
---
inclu
Functions with cycles are removed for two primary reasons:
* as a simplifying assumption for register allocation which occurs down
the line, and;
* if a function contains cycles post-optimization neither unrolling or
loop vectorization were beneficial, and the function _might_ be
For HVX instructions that were successfully translated by helper-to-tcg,
emit calls to emit_*() "manually" from generate_*(). Recall that scalar
instructions translated by helper-to-tcg are automatically called by a
hook in tcg_gen_callN.
Signed-off-by: Anton Johansson
---
target/hexagon/gen_tc
Introduces a new python helper script to convert a set of QEMU .c files to
LLVM IR .ll using clang. Compile flags are found by looking at
compile_commands.json, and llvm-link is used to link together all LLVM
modules into a single module.
Signed-off-by: Anton Johansson
---
subprojects/helper-to
Adds a custom pipeline, similar to LLVM opt, with the goal of taking an
input LLVM IR module to an equivalent output .c file implementing
functions in TCG.
Initial LLVM boilerplate is added until the creation of a
ModulePassManager. A custom target derived from x64 is added, to ensure
consistent
The input LLVM module may define an array of cpu_mapping structs,
describing the mapping between fields in a specified struct (usually
CPUArchState) and TCG globals.
Create a map between offsets into the specified struct and TCG globals
(name, size, number of elements, stride) by iterating over th
Only generate input functions to idef-parser for instructions which
failed to be translated by helper-to-tcg.
Signed-off-by: Anton Johansson
---
target/hexagon/gen_idef_parser_funcs.py | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/hexagon/gen_idef_parser_funcs.py
b/target/hex
Make an early pass over all functions in the input module and filter out
functions with:
1. Invalid return type;
2. No helper-to-tcg annotation.
Signed-off-by: Anton Johansson
---
.../helper-to-tcg/include/PrepareForOptPass.h | 7 +-
.../PrepareForOptPass/PrepareForOptPass.cpp | 93 ++
This commit adds a gvec function for copying data from constant array
given in C to a gvec intptr_t. For each element, a host store of
each constant is performed, this is not ideal and will inflate TBs for
large vectors.
Moreover, data will be copied during each run of the generated code
impactin
Adds the following LLVM_ANNOTATE attributes to helper functions generated
by Hexagon:
1. "helper-to-tcg", to specify that a given helper functions should be
translated, and;
2. "immediate: ..." to make sure immediate arguments to helper
functions remain immediates in the emitted TCG
Simple function for creating Expected<> with nice error messages.
Signed-off-by: Anton Johansson
---
subprojects/helper-to-tcg/include/Error.h | 40 +++
1 file changed, 40 insertions(+)
create mode 100644 subprojects/helper-to-tcg/include/Error.h
diff --git a/subprojects/he
Convert llvm.returnaddress arguments to cpu_[ld|st]*() to undef, causing
the LLVM optmizer to discard the intrinsics. Needed as
llvm.returnadress is not representable in TCG, and usually results from
usage of GETPC() in helper functions.
Signed-off-by: Anton Johansson
---
.../PrepareForOptPass/
Adds a backend pass, taking previously optimized and canonicalized LLVM
IR and for each function:
1. Runs the TcgV register allocator;
2. Iterates over instructions and calls appropriate functions in
TcgEmit.h to emit TCG code.
Signed-off-by: Anton Johansson
---
.../helper-to-tcg/incl
Adds a new LLVM pass that runs early in the pipeline with the goal
of preparing the input module for optimization by doing some early
culling of functions and information gathering.
This commits sets up a new LLVM pass over the IR module and runs it from
the pipeline.
Signed-off-by: Anton Johanss
Adds a translation unit with the sole purpose of handling inter-LLVM
code changes. Instead of littering the code with #ifdefs, most of them
will be limited to llvm-compat.[cpp|h] and a saner compat::*() function
is exposed in its place.
Signed-off-by: Anton Johansson
---
subprojects/helper-to-t
In the LLVM IR module function annotations are stored in one big global
array of strings. Traverse this array and parse the data into a format
more useful for future passes. A map between Functions * and a list of
annotations is exposed.
Signed-off-by: Anton Johansson
---
.../include/FunctionA
Introduces simple end-to-end tests of helper-to-tcg of functions the
translator is expected to handle, any translation failure will result in
a test failure. More test cases to come.
Signed-off-by: Anton Johansson
---
subprojects/helper-to-tcg/meson.build | 2 +
subprojects/helper-to-
Adds a functions to return the current mmu index given tb_flags of the
current translation block. Required by helper-to-tcg in order to
retrieve the mmu index for memory operations without changing the
signature of helper functions.
Signed-off-by: Anton Johansson
---
target/hexagon/cpu.h | 12 +
PHI nodes have no clear analogue in TCG, this commits converts them to
stack accesses using a built-in LLVM transformation.
Signed-off-by: Anton Johansson
---
.../PrepareForTcgPass/PrepareForTcgPass.cpp | 24 +++
1 file changed, 24 insertions(+)
diff --git
a/subprojects/helpe
Iterates over the IR with the goal of converting it to a form closer to
TCG, taking care of IR disparencies between LLVM and TCG. This also
simplifies the backend by containing the bulk of custom IR
transformations, meaning the backend can be as dumb as possible.
Signed-off-by: Anton Johansson
-
Adds a meson option for enabling/disabling helper-to-tcg along with a
CONFIG_* definition.
CONFIG_* will in future commits be used to conditionally include the
helper-to-tcg subproject, and to remove unneeded code/memory when
helper-to-tcg is not in use.
Current meson option is limited to Hexagon
A new translation unit is added with the purpose of containing all code
which emits strings of TCG code. The idea is that maintainence of the
backend will be simpler if all "tcg_*(*)" strings are contained and
wrapped in functions.
Signed-off-by: Anton Johansson
---
.../helper-to-tcg/include/Cm
Modifies meson.build to use helper-to-tcg for automatic translation of
helper functions. Any helper functions with the "helper-to-tcg"
attribute will be automatically translated to TCG.
Order of code generation is changed, and helper functions are always
generated first, for all instructions. He
Adds a cpu_mapping struct to describe, in a declarative fashion, the
mapping between fields in a struct, and a corresponding TCG global. As
such, tcg_global_mem_new() can be automatically called given an array of
cpu_mappings.
This change is not limited to helper-to-tcg, but will be required in
f
Adds new functions to the gvec API for truncating, sign- or zero
extending vector elements. Currently implemented as helper functions,
these may be mapped onto host vector instructions in the future.
For the time being, allows translation of more complicated vector
instructions by helper-to-tcg.
Adds a struct representing everything a LLVM value might map to in TCG,
this includes:
* TCGv (IrValue);
* TCGv_ptr (IrPtr);
* TCGv_env (IrEnv);
* TCGLabel (IrLabel);
* tcg_constant_*() (IrConst);
* 123123ull (IrImmediate);
* intptr_t gvec_vector (IrPtrToOffset).
NOTE: Patch is subj
getelementpointer (GEP) instructions in LLVM IR represent general pointer
arithmetic (struct field access, array indexing, ...). From the
perspective of TCG, three distinct cases are important and are
transformed into pseudo instructions respectively:
* struct accesses whose offset into the str
Signed-off-by: Anton Johansson
---
subprojects/helper-to-tcg/README.md | 265
1 file changed, 265 insertions(+)
create mode 100644 subprojects/helper-to-tcg/README.md
diff --git a/subprojects/helper-to-tcg/README.md
b/subprojects/helper-to-tcg/README.md
new file mo
Temporary vectors in helper-to-tcg generated code are allocated from an
array of bytes in CPUArchState, specified with --temp-vector-block.
This commits adds such a block of memory to CPUArchState, if
CONFIG_HELPER_TO_TCG is set.
Signed-off-by: Anton Johansson
---
target/hexagon/cpu.h | 4
Hi all, this patchset introduces helper-to-tcg, a LLVM based build-time
C to TCG translator, as a QEMU subproject. The purpose of this tool is
to simplify implementation of instructions in TCG by automatically
translating helper functions for a given target to TCG. It may also be
used as a standa
Adds necessary helper functions for mapping LLVM IR onto TCG.
Specifically, helpers corresponding to the bitreverse and funnel-shift
intrinsics in LLVM.
Note: these may be converted to more efficient implementations in the
future, but for the time being it allows helper-to-tcg to support a
wider s
"pseudo" instructions makes it easy to add custom instructions to
LLVM IR in the form of calls to undefined functions. These will be used
in future commits to express functionality present in TCG that is missing
from LLVM IR (certain vector ops.), or to simplify the backend by
collecting similar i
QOL commit, all the various gen_* python scripts take a large set
arguments where order is implicit. Using argparse we also get decent
error messages if a field is missing or too many are added.
Signed-off-by: Anton Johansson
---
target/hexagon/gen_analyze_funcs.py | 6 +++--
target/hexago
Replaces previous calls to tcg_global_mem_new*() with a declarative
global array of cpu_mapping structs. This array can be used to
initialize all TCG globals with one function call from the target, and
may additionally be used from LLVM based tools to map between offsets
into a struct and a mapped
Makes sure gen_slotval() and check_noshuf() remains defined when
helper-to-tcg and idef-parser are both used. gen_slotval() is needed
for creating a TCGv of the slot value fed to helpers (generated
helper-to-tcg code), and check_noshuf() is needed for helper definitions
used as input to helper-to-
Based on the assumption of a cycle free IR, this commit adds a simple
register allocator for emitted values in TCG. The goal of this pass is
to reduce the number of temporaries required in the output code, which
is especially important when dealing with gvec vectors as to not require
very large am
Adds a function pointer to the TCGContext which may be set by targets via
the TARGET_HELPER_DISPATCHER macro. The dispatcher is function
(void *func, TCGTemp *ret, int nargs, TCGTemp **args) -> bool
which allows targets to hook the generation of helper calls in TCG and
take over translation.
Adds a new pass over the LLVM module which runs post-optimization with
the end-goal of:
* culling functions which aren't worth translating;
* canonicalizing the IR to something closer to TCG, and;
* extracting information which may be useful in the backend pass.
This commits sets up a new LL
Transformation of the IR, identity mapping trivial expressions which
would amount to nothing more than a move when emitted as TCG, but is
required in LLVM IR to not break the IR.
Trivial expressions are mapped to a @IdentityMap pseudo instruction
allowing them to be dealt with in a uniform manner
Run a standard LLVM -Os optimization pass, which makes up the bulk of
optimizations in helper-to-tcg.
Signed-off-by: Anton Johansson
---
subprojects/helper-to-tcg/pipeline/Pipeline.cpp | 12
1 file changed, 12 insertions(+)
diff --git a/subprojects/helper-to-tcg/pipeline/Pipeline.c
When producing LLVM IR using clang -O0, a noinline attribute is added.
Remove this attribute to not inhibit future optimization.
Signed-off-by: Anton Johansson
---
.../passes/PrepareForOptPass/PrepareForOptPass.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git
a/subprojects/h
Doubles amount of space allocated for translation blocks. This is
needed, particularly for Hexagon, where a single instruction packet may
consist of up to four vector instructions. If each vector instruction
then gets expanded into gvec operations that utilize a small host vector
size the TB blow
On 05/11/24, Philippe Mathieu-Daudé wrote:
> Allow down to 8-bit access, per the datasheet (reference added
> in previous commit):
>
> "Timer Counter registers are accessed as one of the following types:
> • Byte (8 bits)
> • Half word (2 bytes)
> • Word (4 bytes)"
>
> Signed-off-by: Phili
On 05/11/24, Philippe Mathieu-Daudé wrote:
> Per the datasheet (reference added in file header, p.10):
> 'Register Data Types and Organization':
>
> "The XPS Timer/Counter registers are organized as big-endian data."
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/timer/xilinx_timer.c |
On 05/11/24, Philippe Mathieu-Daudé wrote:
> Per the datasheet (reference added in file header, p.9)
> 'Programming Model' -> 'Register Data Types and Organization':
>
> "The XPS INTC registers are read as big-endian data"
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/intc/xilinx_int
On 05/11/24, Philippe Mathieu-Daudé wrote:
> Pass vCPU endianness as argument so we can load kernels
> with different endianness (different from the qemu-system-binary
> builtin one).
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/microblaze/boot.h | 4 ++--
> hw/microb
On 05/11/24, Philippe Mathieu-Daudé wrote:
> All these MemoryRegionOps read() and write() handlers are
> implemented expecting 32-bit accesses. Clarify that setting
> .impl.min/max_access_size fields.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/char/xilinx_uartlite.c | 4
> hw/intc
On 05/11/24, Philippe Mathieu-Daudé wrote:
> Replace DEFINE_MACHINE() by DEFINE_TYPES(), converting the
> class_init() handler.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 17 +++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
R
On 05/11/24, Philippe Mathieu-Daudé wrote:
> The petalogix-ml605 machine was explicitly added as little-endian only
> machine in commit 00914b7d970 ("microblaze: Add PetaLogix ml605 MMU
> little-endian ref design"). Mark the big-endian version as deprecated.
>
> When the xlnx-zynqmp-pmu machine's
On 05/11/24, Philippe Mathieu-Daudé wrote:
> Rename the 'endian' property as 'little-endian' because the 'ENDI'
> bit is set when the endianness is in little order, and unset in
> big order.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/microblaze/petalogix_ml605_mmu.c | 2 +-
> hw/microb
On 05/11/24, Philippe Mathieu-Daudé wrote:
> The machine datasheet mentions the GPIO device as 'xps_gpio'.
> Rename it accordingly to easily find its documentation.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/microblaze/petalogix_s3adsp1800_mmu.c | 2 +-
> 1 file changed, 1 insertion(+)
On 10/09/24, Philippe Mathieu-Daudé wrote:
> Since commits 139c1837db ("meson: rename included C source files
> to .c.inc") and 0979ed017f ("meson: rename .inc.h files to .h.inc"),
> EMU standard procedure for included header files is to use *.h.inc.
>
> Besides, since commit 6a0057aa22 ("docs/dev
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