qapi/misc.json| 77 +++
> replay/Makefile.objs |3
> replay/replay-debugging.c | 319
> +
> replay/replay-events.c| 16 ++
> replay/replay-internal.h |7 +
> replay/replay-time.c |
639d170,
>> name=name@entry=0x559a4157 "realized",
>> errp=errp@entry=0x7fffc6d8) at
>> /home/thuth/devel/qemu/qom/qom-qobject.c:27
>> #5 0x557f0270 in object_property_set_bool (obj=0x5639b160,
>> value=, name=0x559a4157 "realized",
>> errp=0x7fffc6d8)
>> at /home/thuth/devel/qemu/qom/object.c:1171
>> #6 0x5570b549 in qdev_device_add
>> (opts=opts@entry=0x5640cb50, errp=errp@entry=0x7fffc7b0) at
>> /home/thuth/devel/qemu/qdev-monitor.c:632
>> ...
>>
>> Thomas
>>
>
Thanks,
Aleksandr Bezzubikov
me/thuth/devel/qemu/hw/core/qdev.c:914
>
> Any clue what might be wrong here?
>
> Thomas
Hi Thomas,
This bug was already reported by Eduardo with ppc64, try this patch
that is intended to fix it
http://lists.nongnu.org/archive/html/qemu-devel/2017-09/msg06696.html
--
Aleksandr Bezzubikov
s not available.
Also set the bridge's 'msi' property default value to 'auto' in order to
trigger errors
only when user explicitly set msi=on.
v2:
rewrite the commit message
Reported-by: Eduardo Habkost
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelba
2017-09-21 13:16 GMT+03:00 Marcel Apfelbaum :
> Hi Aleksandr,
>
> On 21/09/2017 0:21, Aleksandr Bezzubikov wrote:
>>
>> Signed-off-by: Aleksandr Bezzubikov
>> ---
>> hw/pci-bridge/pcie_pci_bridge.c | 24 ++--
>> 1 file changed, 18 inse
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/pcie_pci_bridge.c | 24 ++--
1 file changed, 18 insertions(+), 6 deletions(-)
diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c
index 9aa5cc3..da562fe 100644
--- a/hw/pci-bridge
2017-09-20 17:02 GMT+03:00 Marcel Apfelbaum :
> On 20/09/2017 16:57, Eduardo Habkost wrote:
>>
>> On Wed, Sep 20, 2017 at 09:52:01AM +0000, Aleksandr Bezzubikov wrote:
>>>
>>> ср, 20 сент. 2017 г. в 10:13, Marcel Apfelbaum :
>>>
>>>> On 19/09
ср, 20 сент. 2017 г. в 10:13, Marcel Apfelbaum :
> On 19/09/2017 23:34, Eduardo Habkost wrote:
> > On Fri, Aug 18, 2017 at 02:36:47AM +0300, Aleksandr Bezzubikov wrote:
> >> Introduce a new PCIExpress-to-PCI Bridge device,
> >> which is a hot-pluggable PCI Express devic
2017-09-19 12:30 GMT+03:00 Alex Bennée :
>
> Pavel Dovgalyuk writes:
>
>>> From: Aleksandr Bezzubikov [mailto:zuban...@gmail.com]
>>> 2017-09-18 15:02 GMT+03:00 Aleksandr Bezzubikov :
>>> > 2017-05-02 15:42 GMT+03:00 Igor R :
>>> >>>>
[+CC Pavel Dovgaluk, me]
2017-09-18 15:02 GMT+03:00 Aleksandr Bezzubikov :
> 2017-05-02 15:42 GMT+03:00 Igor R :
>>>>>> I'm trying to use the deterministic record/replay feature, and I would
>>>>>> like to know which commit I should take to get it
play WinXP boot process, and I've encountered
exactly the same problem as described above - record is fine, replay
gets stuck early. I use current master.
And I've discovered the second problem - recording makes initial snapshot,
but it doesn't seem to be saved to the disk - replay can't see it.
Hope you've already found the solution (as the last post was on 2 May)
and it's just got missed the mailing list.
>
--
Aleksandr Bezzubikov
2017-09-10 22:40 GMT+03:00 Marcel Apfelbaum :
> On 10/09/2017 21:34, Aleksandr Bezzubikov wrote:
>>
>>
>> пт, 18 авг. 2017 г. в 2:33, Aleksandr Bezzubikov > <mailto:zuban...@gmail.com>>:
>>
>>
>> Now PCI bridges get a bus range number o
пт, 18 авг. 2017 г. в 2:33, Aleksandr Bezzubikov :
> Now PCI bridges get a bus range number on a system init,
> basing on currently plugged devices. That's why when one wants to hotplug
> another bridge,
> it needs his child bus, which the parent is unable to provide (speakin
ср, 23 авг. 2017 г. в 5:46, Michael S. Tsirkin :
> On Tue, Aug 22, 2017 at 02:43:39PM +0300, Marcel Apfelbaum wrote:
> > On 18/08/2017 2:36, Aleksandr Bezzubikov wrote:
> > > This series introduces a new device - Generic PCI Express to PCI
> bridge,
> > > and also
=zuban32
SeaBIOS part github:
https://github.com/zuban32/seabios/commits/qemu_res_cap?author=zuban32
--
Aleksandr Bezzubikov
reserve are provided to the device
via
a corresponding property, and to the firmware via new PCI capability.
The properties' default values are -1 to keep default behavior unchanged.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci-bridge/gen_pcie_root_port.c
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Laszlo Ersek
Reviewed-by: Marcel Apfelbaum
---
docs/pcie.txt| 49 ++--
docs/pcie_pci_bridge.txt | 114 +++
2 files changed, 140 insertions(+), 23 deletions(-)
create mode
On PCI init PCI bridges may need some extra info about bus number,
IO, memory and prefetchable memory to reserve. QEMU can provide this
with a special vendor-specific PCI capability.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci/pci_bridge.c | 46
ent on _OSC which isn't correct anymore - address Marcel's
comment.
10. Add documentation for the Generic PCIE-PCI Bridge and QEMU PCI capability -
addresses Michael's comment.
Changes v1->v2:
1. Enable SHPC for the bridge.
2. Enable SHPC support for the Q35 machine (ACPI stuff).
Introduce a new PCIExpress-to-PCI Bridge device,
which is a hot-pluggable PCI Express device and
supports devices hot-plug with SHPC.
This device is intended to replace the DMI-to-PCI Bridge.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci-bridge/Makefile.objs
-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
src/fw/dev-pci.h | 53 +
1 file changed, 53 insertions(+)
create mode 100644 src/fw/dev-pci.h
diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 000
Refactor pci_find_capability function to get bdf instead of
a whole pci_device* as the only necessary field for this function
is still bdf.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
src/fw/pciinit.c| 4 ++--
src/hw/pci.c| 25
tion - addresses Michael's comment
7. Add capability length and bus_reserve field sanity checks - addresses
Michael's comment
Changes v1->v2:
1. New #define for Red Hat vendor added (addresses Konrad's comment).
2. Refactored pci_find_capability function (addresses Marcel's
In case of Red Hat Generic PCIE Root Port reserve additional buses
and/or IO/MEM/PREF space, which values are provided in a vendor-specific
capability.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
src/fw/pciinit.c | 106
bus_reserve field sanity checks - addresses
Michael's comment
Changes v1->v2:
1. New #define for Red Hat vendor added (addresses Konrad's comment).
2. Refactored pci_find_capability function (addresses Marcel's comment).
3. Capability reworked:
- data type added;
Refactor pci_find_capability function to get bdf instead of
a whole pci_device* as the only necessary field for this function
is still bdf.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
src/fw/pciinit.c| 4 ++--
src/hw/pci.c| 25
In case of Red Hat Generic PCIE Root Port reserve additional buses
and/or IO/MEM/PREF space, which values are provided in a vendor-specific
capability.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
src/fw/pciinit.c | 106
-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
src/fw/dev-pci.h | 53 +
1 file changed, 53 insertions(+)
create mode 100644 src/fw/dev-pci.h
diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 000
In case of Red Hat Generic PCIE Root Port reserve additional buses
and/or IO/MEM/PREF space, which values are provided in a vendor-specific
capability.
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/pciinit.c | 99 +---
src/hw/pci_ids.h | 3
at vendor added (addresses Konrad's comment).
2. Refactored pci_find_capability function (addresses Marcel's comment).
3. Capability reworked:
- data type added;
- reserve space in a structure for IO, memory and
prefetchable memory limits.
Aleksandr Bezzubikov (3):
Refactor pci_find_capability function to get bdf instead of
a whole pci_device* as the only necessary field for this function
is still bdf.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
src/fw/pciinit.c| 4 ++--
src/hw/pci.c| 25
-off-by: Aleksandr Bezzubikov
---
src/fw/dev-pci.h | 53 +
1 file changed, 53 insertions(+)
create mode 100644 src/fw/dev-pci.h
diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 000..0dc5556
--- /dev/null
+++ b/src/fw
2017-08-13 18:49 GMT+03:00 Aleksandr Bezzubikov :
> This series introduces a new device - Generic PCI Express to PCI bridge,
> and also makes all necessary changes to enable hotplug of the bridge itself
> and any device into the bridge.
>
> Changes v5->v6:
> 1. Fix indentatio
Introduce a new PCIExpress-to-PCI Bridge device,
which is a hot-pluggable PCI Express device and
supports devices hot-plug with SHPC.
This device is intended to replace the DMI-to-PCI Bridge.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci-bridge/Makefile.objs
On PCI init PCI bridges may need some extra info about bus number,
IO, memory and prefetchable memory to reserve. QEMU can provide this
with a special vendor-specific PCI capability.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci/pci_bridge.c | 46
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Laszlo Ersek
Reviewed-by: Marcel Apfelbaum
---
docs/pcie.txt| 49 ++--
docs/pcie_pci_bridge.txt | 114 +++
2 files changed, 140 insertions(+), 23 deletions(-)
create mode
reserve are provided to the device
via
a corresponding property, and to the firmware via new PCI capability.
The properties' default values are -1 to keep default behavior unchanged.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci-bridge/gen_pcie_root_port.c
Add documentation for the Generic PCIE-PCI Bridge and QEMU PCI capability -
addresses Michael's comment.
Changes v1->v2:
1. Enable SHPC for the bridge.
2. Enable SHPC support for the Q35 machine (ACPI stuff).
3. Introduce PCI capability to help firmware on the system init.
This allows t
On PCI init PCI bridges may need some extra info about bus number,
IO, memory and prefetchable memory to reserve. QEMU can provide this
with a special vendor-specific PCI capability.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci/pci_bridge.c | 54
Signed-off-by: Aleksandr Bezzubikov
---
docs/pcie.txt| 49 ++--
docs/pcie_pci_bridge.txt | 115 +++
2 files changed, 141 insertions(+), 23 deletions(-)
create mode 100644 docs/pcie_pci_bridge.txt
diff --git a/docs
Introduce a new PCIExpress-to-PCI Bridge device,
which is a hot-pluggable PCI Express device and
supports devices hot-plug with SHPC.
This device is intended to replace the DMI-to-PCI Bridge.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/Makefile.objs | 2 +-
hw/pci-bridge
addresses Michael's comment.
Changes v1->v2:
1. Enable SHPC for the bridge.
2. Enable SHPC support for the Q35 machine (ACPI stuff).
3. Introduce PCI capability to help firmware on the system init.
This allows the bridge to be hotpluggable. Now it's supported
only for pcie-r
reserve are provided to the device
via
a corresponding property, and to the firmware via new PCI capability.
The properties' default values are -1 to keep default behavior unchanged.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/pci-bridge/gen_pcie_root_port.c
In case of Red Hat Generic PCIE Root Port reserve additional buses
and/or IO/MEM/PREF space, which values are provided in a vendor-specific
capability.
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/dev-pci.h | 2 +-
src/fw/pciinit.c | 125
-off-by: Aleksandr Bezzubikov
---
src/fw/dev-pci.h | 52
1 file changed, 52 insertions(+)
create mode 100644 src/fw/dev-pci.h
diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 000..cf16b2e
--- /dev/null
+++ b/src/fw
ability function (addresses Marcel's comment).
3. Capability reworked:
- data type added;
- reserve space in a structure for IO, memory and
prefetchable memory limits.
Aleksandr Bezzubikov (3):
pci: refactor pci_find_capapibilty to get bdf as the first argument
instead of the whole
2017-08-09 13:18 GMT+03:00 Laszlo Ersek :
> On 08/08/17 21:21, Aleksandr Bezzubikov wrote:
>> 2017-08-08 18:11 GMT+03:00 Laszlo Ersek :
>>> one comment below
>>>
>>> On 08/05/17 22:27, Aleksandr Bezzubikov wrote:
>>>
>>>> +
2017-08-08 22:54 GMT+03:00 Michael S. Tsirkin :
> On Sat, Aug 05, 2017 at 11:27:37PM +0300, Aleksandr Bezzubikov wrote:
>> To enable hotplugging of a newly created pcie-pci-bridge,
>> we need to tell firmware (SeaBIOS in this case)
>
> Why SeaBIOS is this case?
>
It is t
2017-08-08 18:11 GMT+03:00 Laszlo Ersek :
> one comment below
>
> On 08/05/17 22:27, Aleksandr Bezzubikov wrote:
>
>> +Capability layout (defined in include/hw/pci/pci_bridge.h):
>> +
>> +uint8_t id; Standard PCI capability header field
>> +uin
In case of Red Hat Generic PCIE Root Port reserve additional buses,
which number is provided in a vendor-specific capability.
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/pciinit.c | 69
src/hw/pci_ids.h | 3 +++
2 files changed, 68
hecks - addresses
Michael's comment
Changes v1->v2:
1. New #define for Red Hat vendor added (addresses Konrad's comment).
2. Refactored pci_find_capability function (addresses Marcel's comment).
3. Capability reworked:
- data type added;
- reserve
-off-by: Aleksandr Bezzubikov
---
src/fw/dev-pci.h | 50 ++
1 file changed, 50 insertions(+)
create mode 100644 src/fw/dev-pci.h
diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 000..2c8ddb0
--- /dev/null
+++ b/src/fw
On PCI init PCI bridges may need some extra info about bus number,
IO, memory and prefetchable memory to reserve. QEMU can provide this
with a special vendor-specific PCI capability.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci/pci_bridge.c | 29 +
include
Signed-off-by: Aleksandr Bezzubikov
---
docs/pcie.txt| 49 +++--
docs/pcie_pci_bridge.txt | 110 +++
2 files changed, 136 insertions(+), 23 deletions(-)
create mode 100644 docs/pcie_pci_bridge.txt
diff --git a/docs
provided to the device via a corresponding
property, and to the firmware via new PCI capability.
The properties' default value is -1 to keep default behavior unchanged.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/gen_pcie_root_port.c | 33 +
include/h
Introduce a new PCIExpress-to-PCI Bridge device,
which is a hot-pluggable PCI Express device and
supports devices hot-plug with SHPC.
This device is intended to replace the DMI-to-PCI
Bridge in an overwhelming majority of use-cases.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge
Unmask previously masked SHPC feature in _OSC method.
Signed-off-by: Aleksandr Bezzubikov
Reviewed-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b9c245c..98dd424 100644
(ACPI stuff).
3. Introduce PCI capability to help firmware on the system init.
This allows the bridge to be hotpluggable. Now it's supported
only for pcie-root-port. Now it's supposed to used with
SeaBIOS only, look at the SeaBIOS corresponding series
"Allow RedHat PCI b
On PCI init PCI bridges may need some
extra info about bus number to reserve, IO, memory and
prefetchable memory limits. QEMU can provide this
with a special vendor-specific PCI capability.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci/pci_bridge.c | 37
Refactor pci_find_capability function to get bdf instead of
a whole pci_device* as the only necessary field for this function
is still bdf.
Reviewed-by: Marcel Apfelbaum
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/pciinit.c| 4 ++--
src/hw/pci.c| 25
Signed-off-by: Aleksandr Bezzubikov
---
docs/pcie.txt| 46 ++
docs/pcie_pci_bridge.txt | 121 +++
2 files changed, 147 insertions(+), 20 deletions(-)
create mode 100644 docs/pcie_pci_bridge.txt
diff --git a/docs/pcie.txt
-off-by: Aleksandr Bezzubikov
---
src/fw/dev-pci.h | 62
1 file changed, 62 insertions(+)
create mode 100644 src/fw/dev-pci.h
diff --git a/src/fw/dev-pci.h b/src/fw/dev-pci.h
new file mode 100644
index 000..fbd49ed
--- /dev/null
+++ b/src
From: Aleksandr Bezzubikov
To enable hotplugging of a newly created pcie-pci-bridge,
we need to tell firmware (SeaBIOS in this case) to reserve
additional buses for pcie-root-port, that allows us to
hotplug pcie-pci-bridge into this root port.
The number of buses to reserve is provided to the
for the Q35 machine (ACPI stuff).
3. Introduce PCI capability to help firmware on the system init.
This allows the bridge to be hotpluggable. Now it's supported
only for pcie-root-port. Now it's supposed to used with
SeaBIOS only, look at the SeaBIOS corresponding series
&q
Introduce a new PCIExpress-to-PCI Bridge device,
which is a hot-pluggable PCI Express device and
supports devices hot-plug with SHPC.
This device is intended to replace the DMI-to-PCI
Bridge in an overwhelming majority of use-cases.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge
Unmask previously masked SHPC feature in _OSC method.
Signed-off-by: Aleksandr Bezzubikov
---
hw/i386/acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6b7bade..2ab32f9 100644
--- a/hw/i386/acpi-build.c
+++ b
In case of Red Hat Generic PCIE Root Port reserve additional buses,
which number is provided in a vendor-specific capability.
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/pciinit.c | 37 +++--
src/hw/pci_ids.h | 3 +++
src/types.h | 2 ++
3 files changed
bus_reserve field sanity checks - addresses
Michael's comment
Changes v1->v2:
1. New #define for Red Hat vendor added (addresses Konrad's comment).
2. Refactored pci_find_capability function (addresses Marcel's comment).
3. Capability reworked:
- data type added;
property, and to the firmware via new PCI capability (next patch).
The property's default value is 1 as we want to hotplug at least 1 bridge.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/pcie_root_port.c | 1 +
include/hw/pci/pcie_port.h | 3 +++
2 files changed, 4 insertions(+)
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/pcie_root_port.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
index b0e49e1..ca92d85 100644
--- a/hw/pci-bridge/pcie_root_port.c
+++ b/hw/pci-bridge/pcie_root_port.c
only 1 byte
since it is the size of Subordinate Bus Number register.
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci/pci_bridge.c | 27 +++
include/hw/pci/pci_bridge.h | 18 ++
2 files changed, 45 insertions(+)
diff --git a/hw/pci/pci_bridge.c b/hw
ility to help firmware on the system init.
This allows the bridge to be hotpluggable. Now it's supported
only for pcie-root-port. Now it's supposed to used with
SeaBIOS only, look at the SeaBIOS corresponding series
"".
Aleksandr Bezzubikov (6):
hw/pci: introduce
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/Makefile.objs | 2 +-
hw/pci-bridge/pcie_pci_bridge.c | 151
include/hw/pci/pci.h| 1 +
3 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 hw/pci-bridge
Unmask previously masked SHPC feature in _OSC method.
Signed-off-by: Aleksandr Bezzubikov
---
hw/i386/acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6b7bade..0d99585 100644
--- a/hw/i386/acpi-build.c
+++ b/hw
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/pcie_pci_bridge.c | 63 -
1 file changed, 62 insertions(+), 1 deletion(-)
diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c
index 0991a7b..38f665f 100644
--- a/hw/pci
limits match ones from
PCI Type 1 Configuration Space Header,
number of buses to reserve occupies only 1 byte
since it is the size of Subordinate Bus Number register.
Signed-off-by: Aleksandr Bezzubikov
---
src/hw/pci_cap.h | 23 +++
1 file changed, 23 insertions(+)
create
In case of Red Hat PCI bridges reserve additional buses, which number is
provided
in a vendor-specific capability.
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/pciinit.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
eserve space in a structure for IO, memory and
prefetchable memory limits.
Aleksandr Bezzubikov (4):
pci: refactor pci_find_capapibilty to get bdf as the first argument
instead of the whole pci_device
pci: add RedHat vendor ID
pci: add QEMU-specific PCI capability structure
Refactor pci_find_capability function to get bdf instead of
a whole pci_device* as the only necessary field for this function
is still bdf.
It greatly helps when we have bdf but not pci_device.
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/pciinit.c| 4 ++--
src/hw/pcidevice.c | 12
Signed-off-by: Aleksandr Bezzubikov
---
src/hw/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/hw/pci_ids.h b/src/hw/pci_ids.h
index 4ac73b4..db2e694 100644
--- a/src/hw/pci_ids.h
+++ b/src/hw/pci_ids.h
@@ -2263,6 +2263,8 @@
#define PCI_DEVICE_ID_KORENIX_JETCARDF0
ility in RedHat
generic pcie-root-port
that contains number of additional bus to reserve on BIOS PCI init.
Aleksandr Bezzubikov (2):
pci: add support for direct usage of bdf for capability lookup
pci: enable RedHat pci bridges to reserve more buses
src/fw/pciinit.c | 12 ++--
s
In case of RedHat PCI bridges reserve additional buses, which number is provided
in a vendor-specific capability.
Signed-off-by: Aleksandr Bezzubikov
---
src/fw/pciinit.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index
Add a capability lookup function which gets bdf instead of pci_device
as its first argument. It may be useful when we have bdf,
but don't have the whole pci_device structure.
Signed-off-by: Aleksandr Bezzubikov
---
src/hw/pcidevice.c | 24
src/hw/pcidevice.h | 1
Signed-off-by: Aleksandr Bezzubikov
---
hw/i386/acpi-build.c | 47 +++
1 file changed, 31 insertions(+), 16 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index e434efe..8bbece5 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386
Signed-off-by: Aleksandr Bezzubikov
---
hw/acpi/ich9.c | 31 +++
hw/isa/lpc_ich9.c | 12
include/hw/acpi/ich9.h | 4
include/hw/i386/pc.h | 7 ++-
4 files changed, 53 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/ich9.c b/hw
Signed-off-by: Aleksandr Bezzubikov
---
hw/i386/acpi-build.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b0dcd34..c99dbcc 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -129,17 +129,18 @@ static
Signed-off-by: Aleksandr Bezzubikov
---
hw/i386/acpi-build.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index afcadac..6fce967 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1912,16 +1912,6 @@ build_dsdt(GArray
to be generated
dynamically.
In other words, the bridge plugged in - a new acpi definition block is
loaded (using LoadTable method).
This is necessary for PCIE-PCI bridge hotplugging feature.
Aleksandr Bezzubikov (6):
hw/acpi: remove dead acpi code
hw/acpi: simplify dsdt building code
hw/acp
Signed-off-by: Aleksandr Bezzubikov
---
hw/i386/acpi-build.c | 59 +++-
1 file changed, 26 insertions(+), 33 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6fce967..b0dcd34 100644
--- a/hw/i386/acpi-build.c
+++ b/hw
Signed-off-by: Aleksandr Bezzubikov
---
hw/i386/acpi-build.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index c99dbcc..e434efe 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -135,12 +135,6
Signed-off-by: Aleksandr Bezzubikov
---
hw/pci-bridge/Makefile.objs | 2 +-
hw/pci-bridge/pcie_pci_bridge.c | 152
include/hw/pci/pci.h| 1 +
3 files changed, 154 insertions(+), 1 deletion(-)
create mode 100644 hw/pci-bridge
vel/2016-05/msg05681.html,
but will require dynamic ACPI code emission in case when the bridge was
hotplugged itself.
Aleksandr Bezzubikov (1):
hw/pci-bridge: implement pcie-pci-bridge device
hw/pci-bridge/Makefile.objs | 2 +-
hw/pci-bridge/pci
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