I'm not sure this makes sense - we're dealing with time here.
--
Alastair D'Silva mob: 0423 762 819
skype: alastair_dsilva msn: alast...@d-silva.org
blog: http://alastair.d-silva.orgTwitter: @EvilDeece
> -Original Message-
> From: P
From: Alastair D'Silva
Connect an RX8900 RTC to i2c12 of the AST2500 SOC at address 0x32
Signed-off-by: Alastair D'Silva
Signed-off-by: Chris Smart
---
hw/arm/aspeed.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspe
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
tests/Makefile.include | 2 +
tests/rx8900-test.c| 880 +
2 files changed, 882 insertions(+)
create mode 100644 tests/rx8900-test.c
diff --git a/tests/Makefile.inclu
From: Alastair D'Silva
Some devices change their behaviour based on the state of their input GPIO
lines.
This patch allows testing of the variable behaviour by providing facilities
for the test to set the state of these GPIO lines.
Signed-off-by: Alastair D'Silva
---
qtest.c
From: Alastair D'Silva
This patch adds support for the Epson RX8900 I2C RTC.
The following chip features are implemented:
- RTC (wallclock based, ptimer 10x oversampling to pick up
wallclock transitions)
- Time update interrupt (per second/minute, wallclock based)
- Alarms (wall
From: Alastair D'Silva
The imx25 chip provides 3 i2c buses, but they have all been named
"i2c", which makes it difficult to predict which bus a device will
be connected to when specified on the command line.
This patch addresses the issue by naming the buses uniquely:
i2c-bus.
From: Alastair D'Silva
This patch series adds support for the Epson RX8900 RTC to the
Aspeed board.
The tests use the existing imx25 infrastructure, and some minor
changes have been made to uniquely identify the I2C buses.
Support for named interrupts has been implemented in qte
From: Alastair D'Silva
The QTest framework cannot check the state of named interrupts. This patch
adds support for them.
Read actions are via callbacks, which allows for pulsed interrupts
to be read (the polled method used for the unnamed interrupts
cannot read pulsed interrupts as the val
From: Alastair D'Silva
Fix 2 cases of incorrect indentation
Signed-off-by: Alastair D'Silva
---
qtest.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qtest.c b/qtest.c
index a947892..143077e 100644
--- a/qtest.c
+++ b/qtest.c
@@ -309,7 +309,7 @@ s
On Wed, 2017-01-04 at 16:44 +1030, Andrew Jeffery wrote:
> Hi Alastair,
>
> Again, small comments below.
>
> On Thu, 2016-12-15 at 16:48 +1100, Alastair D'Silva wrote:
> > > From: Alastair D'Silva
> > > Signed-off-by: Alastair D'Silva
On Wed, 2017-01-04 at 15:29 +1030, Andrew Jeffery wrote:
> Hi Alastair,
>
> I have some mostly minor comments below.
Ok, I'm removing Chris from the CC list since he's left the team.
>
> On Thu, 2016-12-15 at 16:48 +1100, Alastair D'Silva wrote:
> > >
sends out the
> slave address and r/w bit. I think that makes sense, but rather
> than having a state flag in the I2CSlave struct, we should
> change the prototype of the I2CSlaveClass event method so that
> it can return a value indicating ack or nak.
>
Hmm, this could end up being quite an invasive change, but ultimately
more elegant. I'm not sure which way the community prefers.
> thanks
> -- PMM
--
Alastair D'Silva
Open Source Developer
Linux Technology Centre, IBM Australia
mob: 0423 762 819
From: Alastair D'Silva
Fix 2 cases of incorrect indentation
Signed-off-by: Alastair D'Silva
---
qtest.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qtest.c b/qtest.c
index a947892..143077e 100644
--- a/qtest.c
+++ b/qtest.c
@@ -309,7 +309,7 @@ s
From: Alastair D'Silva
This patch adds support for the Epson RX8900 I2C RTC.
The following chip features are implemented:
- RTC (wallclock based, ptimer 10x oversampling to pick up
wallclock transitions)
- Time update interrupt (per second/minute, wallclock based)
- Alarms (wall
From: Alastair D'Silva
Connect an RX8900 RTC to i2c12 of the AST2500 SOC at address 0x32
Signed-off-by: Alastair D'Silva
Signed-off-by: Chris Smart
---
hw/arm/aspeed.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspe
From: Alastair D'Silva
Remove unnecessary syntax
Signed-off-by: Alastair D'Silva
---
hw/i2c/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i2c/core.c b/hw/i2c/core.c
index ae3ca94..e40781e 100644
--- a/hw/i2c/core.c
+++ b/hw/i2c/core.c
@@ -26
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
tests/Makefile.include | 2 +
tests/rx8900-test.c| 882 +
2 files changed, 884 insertions(+)
create mode 100644 tests/rx8900-test.c
diff --git a/tests/Makefile.inclu
From: Alastair D'Silva
The QTest framework cannot check the state of named interrupts. This patch
adds support for them.
Read actions are via callbacks, which allows for pulsed interrupts
to be read (the polled method used for the unnamed interrupts
cannot read pulsed interrupts as the val
From: Alastair D'Silva
The imx25 chip provides 3 i2c buses, but they have all been named
"i2c", which makes it difficult to predict which bus a device will
be connected to when specified on the command line.
This patch addresses the issue by naming the buses uniquely:
i2c-bus.
From: Alastair D'Silva
This patch series adds support for the Epson RX8900 RTC to the
Aspeed board.
The tests use the existing imx25 infrastructure, and some minor
changes have been made to uniquely identify the I2C buses.
Support for named interrupts has been implemented in qte
From: Alastair D'Silva
Some devices change their behaviour based on the state of their input GPIO
lines.
This patch allows testing of the variable behaviour by providing facilities
for the test to set the state of these GPIO lines.
Signed-off-by: Alastair D'Silva
---
qtest.c
On Wed, 2016-12-14 at 18:02 +, Peter Maydell wrote:
> On 2 December 2016 at 05:46, Alastair D'Silva
> wrote:
> > From: Alastair D'Silva
> >
> > This patch adds support for the Epson RX8900 I2C RTC.
> >
> > The following chip features are im
On Wed, 2016-12-14 at 18:29 +, Peter Maydell wrote:
> On 2 December 2016 at 05:46, Alastair D'Silva
> wrote:
> > From: Alastair D'Silva
> >
> > The QTest framework cannot work with named interrupts. This patch
> > adds support for them, as well as
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
tests/Makefile.include | 2 +
tests/rx8900-test.c| 882 +
2 files changed, 884 insertions(+)
create mode 100644 tests/rx8900-test.c
diff --git a/tests/Makefile.inclu
From: Alastair D'Silva
This patch adds support for the Epson RX8900 I2C RTC.
The following chip features are implemented:
- RTC (wallclock based, ptimer 10x oversampling to pick up
wallclock transitions)
- Time update interrupt (per second/minute, wallclock based)
- Alarms (wall
From: Alastair D'Silva
Add a NULL check for i2c slave init callbacks, so that we no longer need to
implement empty init functions.
Signed-off-by: Alastair D'Silva
---
hw/arm/pxa2xx.c | 7 ---
hw/arm/tosa.c | 7 ---
hw/arm/z2.c | 7 ---
hw/i2c/core.c | 6
From: Alastair D'Silva
The QTest framework cannot work with named interrupts. This patch
adds support for them, as well as the ability to manipulate them
from within a test.
Read actions are via callbacks, which allows for pulsed interrupts
to be read (the polled method used for the un
From: Alastair D'Silva
Connect an RX8900 RTC to i2c12 of the AST2500 SOC at address 0x32
Signed-off-by: Alastair D'Silva
Signed-off-by: Chris Smart
---
hw/arm/aspeed.c | 58 +++--
1 file changed, 56 insertions(+), 2 deletions(-)
From: Alastair D'Silva
This patch series adds support for the Epson RX8900 RTC to the
Aspeed board.
The tests use the existing imx25 infrastructure, and some minor
changes have been made to uniquely identify the I2C buses.
A NULL check have been added to eliminate empty i2cslave init
func
From: Alastair D'Silva
The imx25 chip provides 3 i2c buses, but they have all been named
"i2c", which makes it difficult to predict which bus a device will
be connected to when specified on the command line.
This patch addresses the issue by naming the buses uniquely:
i2c-bus.
From: Alastair D'Silva
Remove trailing whitespace in hw/arm/pxa2xx.c
Signed-off-by: Alastair D'Silva
---
hw/arm/pxa2xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 21ea1d6..8aa0f8a 100644
--- a/hw/arm/pxa2xx.c
++
On Fri, 2016-12-02 at 15:07 +1100, Alexey Kardashevskiy wrote:
> On 02/12/16 14:30, Alastair D'Silva wrote:
> > On Fri, 2016-12-02 at 13:48 +1100, Alexey Kardashevskiy wrote:
> > > On 02/12/16 11:19, Alastair D'Silva wrote:
> > > > On Thu, 2016-12-01 at
On Fri, 2016-12-02 at 13:48 +1100, Alexey Kardashevskiy wrote:
> On 02/12/16 11:19, Alastair D'Silva wrote:
> > On Thu, 2016-12-01 at 16:53 +1100, Alexey Kardashevskiy wrote:
> >
> > > On 30/11/16 16:36, Alastair D'Silva wrote:
> > > > From: Alas
On Thu, 2016-12-01 at 16:53 +1100, Alexey Kardashevskiy wrote:
> On 30/11/16 16:36, Alastair D'Silva wrote:
> > From: Alastair D'Silva
> >
> > This patch adds support for the Epson RX8900 I2C RTC.
> >
> > The following chip features are implement
On Thu, 2016-12-01 at 13:31 +0100, Cédric Le Goater wrote:
> On 12/01/2016 01:42 AM, Alastair D'Silva wrote:
> > On Wed, 2016-11-30 at 09:18 +0100, Cédric Le Goater wrote:
> > > On 11/30/2016 06:36 AM, Alastair D'Silva wrote:
> > > > diff --git a/hw/i2c/im
On Wed, 2016-11-30 at 09:18 +0100, Cédric Le Goater wrote:
> On 11/30/2016 06:36 AM, Alastair D'Silva wrote:
> > From: Alastair D'Silva
> >
> > The imx25 chip provides 3 i2c buses, but they have all been named
> > "i2c", which makes it diff
On Wed, 2016-11-30 at 16:36 +1100, Alastair D'Silva wrote:
>
> This patch series adds support for the Epson RX8900 RTC to the
> Aspeed board.
>
> The tests use the existing imx25 infrastructure, and some minor
> changes have been made to uniquely identify the I2C buses.
From: Alastair D'Silva
This patch adds support for the Epson RX8900 I2C RTC.
The following chip features are implemented:
- RTC (wallclock based, ptimer 10x oversampling to pick up
wallclock transitions)
- Time update interrupt (per second/minute, wallclock based)
- Alarms (wall
From: Alastair D'Silva
The imx25 chip provides 3 i2c buses, but they have all been named
"i2c", which makes it difficult to predict which bus a device will
be connected to when specified on the command line.
This patch addresses the issue by naming the buses uniquely:
i2
From: Alastair D'Silva
The QTest framework cannot work with named interrupts. This patch
adds support for them, as well as the ability to manipulate them
from within a test.
Read actions are via callbacks, which allows for pulsed interrupts
to be read (the polled method used for the un
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
tests/Makefile.include | 2 +
tests/rx8900-test.c| 881 +
2 files changed, 883 insertions(+)
create mode 100644 tests/rx8900-test.c
diff --git a/tests/Makefile.inclu
From: Alastair D'Silva
Connect an RX8900 RTC to i2c12 of the AST2500 SOC at address 0x32
Signed-off-by: Alastair D'Silva
---
hw/arm/aspeed.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index c7206fd..8de95f2 100644
--- a/hw/ar
From: Alastair D'Silva
Add a NULL check for i2c slave init callbacks, so that we no longer
need to implement empty init functions.
Signed-off-by: Alastair D'Silva
---
hw/arm/pxa2xx.c | 9 +
hw/arm/tosa.c | 7 ---
hw/arm/z2.c | 7 ---
hw/i2c/core
From: Alastair D'Silva
This patch series adds support for the Epson RX8900 RTC to the
Aspeed board.
The tests use the existing imx25 infrastructure, and some minor
changes have been made to uniquely identify the I2C buses.
A NULL check have been added to eliminate empty i2cslave init
func
On Tue, 2016-11-22 at 17:56 +0100, Cédric Le Goater wrote:
> On 11/17/2016 05:36 AM, Alastair D'Silva wrote:
> >
> > From: Alastair D'Silva
> >
> > Connect an RX8900 RTC to i2c12 of the AST2500 SOC at address 0x32
>
> If this is a board device, we
On Tue, 2016-11-22 at 23:39 +0100, Paolo Bonzini wrote:
> On 22/11/2016 23:31, Alastair D'Silva wrote:
> >
> > >
> > > >
> > > > >
> > > > > >
> > > > > > >
> > > > &g
NULL) {
> > > +qtest_send_prefix(chr);
> > > +qtest_send(chr, "FAIL Unknown IRQ\n");
> > > +return;
> > > +}
> > > +
> > > +qemu_set_irq(irq, level);
>
> This seems wron
On Thu, 2016-11-17 at 09:29 +0100, Cédric Le Goater wrote:
On 11/17/2016 05:36 AM, Alastair D'Silva wrote:
> >
> > From: Alastair D'Silva
> >
> > This patch adds support for the Epson RX8900 RTC chip.
>
> It would be nice to have a short list of the fea
From: Alastair D'Silva
Connect an RX8900 RTC to i2c12 of the AST2500 SOC at address 0x32
Signed-off-by: Alastair D'Silva
---
hw/arm/aspeed.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index c7206fd..554ae20 100644
--- a/hw/arm/aspe
From: Alastair D'Silva
The QTest framework cannot work with named interrupts. This patch
adds support for them, as well as the ability to manipulate them
from within a test.
Read actions are via callbacks, which allows for pulsed interrupts
to be read (the polled method used for the un
From: Alastair D'Silva
This patch adds support for the Epson RX8900 RTC chip.
Signed-off-by: Alastair D'Silva
---
default-configs/arm-softmmu.mak | 1 +
hw/timer/Makefile.objs | 2 +
hw/timer/rx8900.c | 891
From: Alastair D'Silva
The imx25 chip provides 3 i2c buses, but they have all been named
"i2c", which makes it difficult to predict which bus a device will
be connected to when specified on the command line.
This patch addresses the issue by naming the buses uniquely:
i2
From: Alastair D'Silva
This patch series adds support for the Epson RX8900 RTC to the
Aspeed board.
The tests use the existing imx25 infrastructure, and some minor
changes have been made to uniquely identify the I2C buses.
Support for named interrupts has been implemented in qte
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