Re: [PATCH 2/2] i386/tdx: Don't build TDX for 32bit target

On 6/25/2025 1:59 PM, Cédric Le Goater wrote: On 6/25/25 05:49, Xiaoyao Li wrote: TDX cannot work on 32-bit host. It's also not worth supported TDX with 32-bit QEMU. Thus, make TDX depends on !I386. Signed-off-by: Xiaoyao Li ---   hw/i386/Kconfig | 2 +-   1 file changed, 1 insertion(+), 1 del

Re: [PATCH 1/2] target/riscv: disable *stimecmp interrupts without *envcfg.STCE

Hi Radim, Does your patchset want to resolve the same issue as my sstc patch [1]? My sstc patchset has been merged to "riscv-to-apply.next". Maybe you can review it or check if there is still any issue in the "riscv-to-apply.next" branch, thanks! [1] "[PATCH v3 4/4] target/riscv: Enable/Disable

[PATCH v6 7/9] target/i386/kvm: reset AMD PMU registers during VM reset

QEMU uses the kvm_get_msrs() function to save Intel PMU registers from KVM and kvm_put_msrs() to restore them to KVM. However, there is no support for AMD PMU registers. Currently, pmu_version and num_pmu_gp_counters are initialized based on cpuid(0xa), which does not apply to AMD processors. For A

Re: [PATCH v2 2/3] tracetool: introduce generate_unconditional

> 1. nocheck isn't necessary anymore. The body of nocheck could be inlined > here instead to simplify the generated code. Yes I agree.I will remove nocheck and inline the body of nocheck in trace-foo > 2. "if (%(cond)s) {" is only useful for backends that implement > .generate(). For example, i

Re: [PATCH 1/1] hw/s390x: Use preferred API call for IPLB chain write

Hi, On 24/6/25 15:16, Jared Rossi wrote: On 6/24/25 2:27 AM, Thomas Huth wrote: On 23/06/2025 22.12, jro...@linux.ibm.com wrote: From: Jared Rossi Replace a recently introduced legacy API call with the preferred API call. fixes: 0927875 (hw/s390x: Build an IPLB for each boot device) Signe

Re: [PATCH v3 05/11] migration: Drop save_live_complete_postcopy hook

On 2025-06-13 10:07, Peter Xu wrote: > The hook is only defined in two vmstate users ("ram" and "block dirty > bitmap"), meanwhile both of them define the hook exactly the same as the > precopy version. Hence, this postcopy version isn't needed. > > No functional change intended. > > Signed-off-

Re: [PATCH 2/2] i386/tdx: Don't build TDX for 32bit target

On 6/25/25 05:49, Xiaoyao Li wrote: TDX cannot work on 32-bit host. It's also not worth supported TDX with 32-bit QEMU. Thus, make TDX depends on !I386. Signed-off-by: Xiaoyao Li --- hw/i386/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/Kconfig b/hw/i38

Re: [RFC v6 1/3] hw/misc/aspeed_otp: Add ASPEED OTP memory device model

Hello Kane, On 6/25/25 07:59, Kane Chen wrote: Hi Cédric, Thanks for your review and helpful comments. I will update the code accordingly. I also have a question regarding the OTP memory content initialization. Since the OTP memory only needs to be initialized once, I plan to move the initiali

RE: [RFC v6 1/3] hw/misc/aspeed_otp: Add ASPEED OTP memory device model

Hi Cédric, Thanks for your review and helpful comments. I will update the code accordingly. I also have a question regarding the OTP memory content initialization. Since the OTP memory only needs to be initialized once, I plan to move the initialization code into the reset function and use a fl

[PATCH] MAINTAINERS: update nvme tree

://git.infradead.org/qemu-nvme.git nvme-next +T: git https://gitlab.com/birkelund/qemu nvme.next ufs M: Jeuk Kim --- base-commit: 43ba160cb4bbb193560eb0d2d7decc4b5fc599fe change-id: 20250624-qemu-maintainers-2-a3a91e499312 Best regards, -- Jesper Wendel Devantier

[PATCH] i386/tdx: Don't mask off CPUID_EXT_PDCM

It gets below warning when booting TDX VMs: warning: TDX forcibly sets the feature: CPUID[eax=01h].ECX.pdcm [bit 15] Because CPUID_EXT_PDCM is fixed1 for TDX, and MSR_IA32_PERF_CAPABILITIES is supported for TDX guest unconditioanlly. Don't mask off CPUID_EXT_PDCM for TDX. Signed-off-by: Xiaoy

[PATCH 0/2] i386: Don't build TDX for 32-bit target

Build errors of TDX were reported when built on 32-bit host[1][2]. People were agreed to disable TDX on 32-bit build[3]. This series implemnts the agreement that it makes TDX available when !I386. [1] https://lore.kernel.org/qemu-devel/20250602173101.1052983-1-...@redhat.com/ [2] https://lore.ke

[PATCH] i386/tdx: Remove task->watch only when it's valid

In some case (e.g., failed to connect to QGS socket), tdx_generate_quote_cleanup() is called with task->watch invalid. It triggers assertion of qemu-system-x86_64: GLib: g_source_remove: assertion 'tag > 0' failed Fix it by checking task->watch. Fixes: 40da501d8989 ("i386/tdx: handle TDG.VP.VM

[PATCH 1/2] i386/Kconfig: Make I386 and X86_64 independant

Commit 4921d0a7535b ('i386: switch boards to "default y"') makes CONIFG_X86_64 select CONFIG_I386, which makes it difficult to define X86_64 only configs, e.g., for TDX. Decouple I386 from X86_64. Signed-off-by: Xiaoyao Li --- hw/i386/Kconfig | 10 +- target/i386/Kconfig | 1 - 2 f

[PATCH 2/2] i386/tdx: Don't build TDX for 32bit target

TDX cannot work on 32-bit host. It's also not worth supported TDX with 32-bit QEMU. Thus, make TDX depends on !I386. Signed-off-by: Xiaoyao Li --- hw/i386/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 6fc353930985..c58802462a

Re: [PATCH 0/8] net: Add passt netdev backend

Because of these code changes the virtio-net files, CI triggers regression tests for it with virtio-net, everything works fine. Tested-by: Lei Yang On Tue, Jun 24, 2025 at 8:41 AM Jason Wang wrote: > > On Mon, Jun 23, 2025 at 4:10 PM Laurent Vivier wrote: > > > > On 23/06/2025 10:03, Jason Wan

Re: [PATCH v2 046/101] target/arm: Implement SME2 SMLALL, SMLSLL, UMLALL, UMLSLL

On Sun, 22 Jun 2025 at 01:01, Richard Henderson wrote: > > Signed-off-by: Richard Henderson > --- > target/arm/tcg/helper-sme.h| 22 ++ > target/arm/tcg/sme_helper.c| 60 +++ > target/arm/tcg/translate-sme.c | 78 +++ > target/arm/tcg/sme.decode |

Re: [PATCH v2 046/101] target/arm: Implement SME2 SMLALL, SMLSLL, UMLALL, UMLSLL

On 6/21/25 16:49, Richard Henderson wrote: +#define DO_MLALL(NAME, TYPEW, TYPEN, TYPEM, HW, HN, OP) \ +void HELPER(NAME)(void *vd, void *vn, void *vm, void *va, uint32_t desc) \ +{ \ +intptr_t elements = simd_oprsz(desc) / sizeof(T

Re: [RFC 01/10] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel

On 6/25/25 11:03 AM, Zhao Liu wrote: On Tue, Jun 24, 2025 at 07:04:02PM +0800, Ewan Hai wrote: Date: Tue, 24 Jun 2025 19:04:02 +0800 From: Ewan Hai Subject: Re: [RFC 01/10] i386/cpu: Mark CPUID[0x8005] as reserved for Intel On 6/24/25 3:22 PM, Zhao Liu wrote: On Tue, May 27, 202

Re: [RFC 01/10] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel

On Tue, Jun 24, 2025 at 07:04:02PM +0800, Ewan Hai wrote: > Date: Tue, 24 Jun 2025 19:04:02 +0800 > From: Ewan Hai > Subject: Re: [RFC 01/10] i386/cpu: Mark CPUID[0x8005] as reserved for > Intel > > > > On 6/24/25 3:22 PM, Zhao Liu wrote: > > > > On Tue, May 27, 2025 at 05:56:07PM +0800,

Re: [PATCH] rust: log: implement io::Write

> > @@ -136,8 +137,7 @@ macro_rules! log_mask_ln { > > if unsafe { > > (::qemu_api::bindings::qemu_loglevel & ($mask as > > std::os::raw::c_int)) != 0 > > } { > > -#[allow(unused_must_use)] > > -::qemu_api::log::LogGuard::log_fmt( > > +

Re: [PATCH] vfio: add license tag to some files

+ Daniel On 6/23/25 11:30, John Levon wrote: Add SPDX-License-Identifier to some files missing it in hw/vfio/. Signed-off-by: John Levon --- hw/vfio/trace.h | 3 +++ hw/vfio/Kconfig | 2 ++ hw/vfio/meson.build | 2 ++ hw/vfio/trace-events | 2 ++ 4 files changed, 9 insertions(

Re: [PATCH 1/3] migration: Pass error object to report it to the caller

Hi, Arun, On Tue, Jun 24, 2025 at 05:53:04PM +0530, Arun Menon wrote: > - This is an incremental step in converting vmstate loading > code to report errors. > - Minimal changes to the signature and body of the following > functions are done, > - vmstate_load() > - vmstate_load_state() >

RE: [PATCH V5 30/38] migration: vfio cpr state hook

>-Original Message- >From: Steve Sistare >Subject: [PATCH V5 30/38] migration: vfio cpr state hook > >Define a list of vfio devices in CPR state, in a subsection so that >older QEMU can be live updated to this version. However, new QEMU >will not be live updateable to old QEMU. This i

Re: [PATCH 2/4] vfio/container: fails mdev hotplug if add migration blocker failed

On 6/23/25 12:22, Zhenzhong Duan wrote: It's aggressive to abort a running QEMU process when hotplug a mdev and it fails migration blocker adding. Fix by just failing mdev hotplug itself. Signed-off-by: Zhenzhong Duan --- hw/vfio/container.c | 8 ++-- 1 file changed, 6 insertions(+), 2

[PATCH v6 6/9] target/i386/kvm: query kvm.enable_pmu parameter

When PMU is enabled in QEMU, there is a chance that PMU virtualization is completely disabled by the KVM module parameter kvm.enable_pmu=N. The kvm.enable_pmu parameter is introduced since Linux v5.17. Its permission is 0444. It does not change until a reload of the KVM module. Read the kvm.enabl

Re: [PATCH 1/2] target/riscv: disable *stimecmp interrupts without *envcfg.STCE

On Mon, Jun 23, 2025 at 06:39:02PM -0300, Daniel Henrique Barboza wrote: > Hi Radim, > > It seems like this patch is breaking 'make check-functional': > > 12/12 qemu:func-quick+func-riscv64 / func-riscv64-riscv_opensbi TIMEOUT > 90.06s killed by signal 15 SIGTERM > > Checking the lo

Re: [PATCH v5 0/3] docs: define policy forbidding use of "AI" / LLM code generators

On Tue, Jun 24, 2025 at 1:02 AM Markus Armbruster wrote: > > Alex Bennée writes: > > > Stefan Hajnoczi writes: > > > >> Any final comments before I merge this? > > > > It's well reviewed lets get it merged. > > Stefan, would you like a PR from me? No, that won't be necessary. I will merge the s

Re: [PATCH 2/3] migration: Use error_setg instead of error_report

On Tue, Jun 24, 2025 at 05:53:05PM +0530, Arun Menon wrote: > - This is an incremental step in converting vmstate > loading code to report error via Error object. > - error_report() has been replaced with error_setg(); > and in places where error has been already set, > error_prepend() is use

Re: [PATCH 3/3] backends/tpm: Propagate vTPM error on migration failure

On 6/24/25 8:23 AM, Arun Menon wrote: - Introduce a new post_load_with_error() hook that will take in the Error object as a parameter. - This error object is set if the loading of state fails. - The error can then be retrieved using QMP command {"execute" : "query-migrate"} Buglink: htt

Re: [PATCH v2 040/101] target/arm: Implemement SME2 SDOT, UDOT, USDOT, SUDOT

On 6/24/25 03:02, Peter Maydell wrote: On Sun, 22 Jun 2025 at 00:58, Richard Henderson wrote: Signed-off-by: Richard Henderson --- target/arm/tcg/helper.h| 8 target/arm/tcg/translate-sme.c | 85 ++ target/arm/tcg/vec_helper.c| 51

Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug

On 6/20/25 2:38 PM, Igor Mammedov wrote: > On Fri, 20 Jun 2025 10:35:38 +0100 > Jonathan Cameron wrote: > >> On Mon, 16 Jun 2025 11:46:46 +0200 >> Eric Auger wrote: >> >>> Modify the DSDT ACPI table to enable ACPI PCI hotplug. >>> >>> Signed-off-by: Eric Auger >>> >>> --- >>> v2 -> v3: >>> -

Re: [PATCH v2 091/101] target/arm: Implement SME2 counted predicate register load/store

On Sun, 22 Jun 2025 at 01:00, Richard Henderson wrote: > > Implement the SVE2p1 consecutive register LD1/ST1, > and the SME2 strided register LD1/ST1. > > +static bool gen_ldst_zcrr_c(DisasContext *s, arg_zcrr_ldst *a, > +bool is_write, bool strided) > +{ > +TCGv

Re: [RFC 01/10] i386/cpu: Mark CPUID[0x80000005] as reserved for Intel

On 6/24/25 3:22 PM, Zhao Liu wrote: On Tue, May 27, 2025 at 05:56:07PM +0800, Ewan Hai wrote: Date: Tue, 27 May 2025 17:56:07 +0800 From: Ewan Hai Subject: Re: [RFC 01/10] i386/cpu: Mark CPUID[0x8005] as reserved for Intel On 5/27/25 5:15 PM, Zhao Liu wrote: On 4/23/25 7:46 PM,

Synced invitation: QEMU/KVM developers conference call @ Every 2 weeks from 14:00 to 15:00 on Tuesday from Tue 10 Jun to Tue 24 Jun (BST) (qemu-devel@nongnu.org)

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Re: [PATCH 05/20] tcg/optimize: Build and use z_bits and o_bits in fold_eqv

On 5/5/25 1:27 PM, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/optimize.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index faee3e8580..08d15e5395 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1917,7

Re: aspeed: Split the machine definition into individual source files

On Thu, 2025-06-19 at 11:23 +0200, Cédric Le Goater wrote: > Hi, > > This is a follow up of a private discussion with Patrick. > > Aspeed modeling started nearly 10y ago with the palmetto-bmc machine. > We now have 5 SoCs and 25 machines which are mostly defined in > in a single aspeed.c file. Mu

Re: [PATCH 04/20] tcg/optimize: Build and use o_bits in fold_andc

On 5/5/25 1:27 PM, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/optimize.c | 21 - 1 file changed, 8 insertions(+), 13 deletions(-) Reviewed-by: Pierrick Bouvier

Re: [PULL 00/11] Migration staging patches

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any user-visible changes. signature.asc Description: PGP signature

Re: [PATCH v5 0/3] docs: define policy forbidding use of "AI" / LLM code generators

On Mon, Jun 16, 2025 at 11:22:38AM +0200, Markus Armbruster wrote: > More than a year ago, Daniel posted patches to put an AI policy in > writing. Reception was mostly positive. A v2 to address feedback > followed with some delay. But no pull request. > > I asked Daniel why, and he told me he w

Re: [PATCH 03/20] tcg/optimize: Build and use o_bits in fold_and

On 5/5/25 1:27 PM, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/optimize.c | 17 ++--- 1 file changed, 6 insertions(+), 11 deletions(-) Reviewed-by: Pierrick Bouvier

Re: [PATCH 02/20] tcg/optimize: Add one's mask to TempOptInfo

On 5/5/25 1:27 PM, Richard Henderson wrote: Add o_mask mirroring z_mask, but for 1's instead of 0's. Drop is_const and val fields, which now logically overlap. Signed-off-by: Richard Henderson --- tcg/optimize.c | 51 -- 1 file changed, 37 inse

Re: [PATCH 01/20] tcg/optimize: Introduce arg_const_val

On 5/5/25 1:27 PM, Richard Henderson wrote: Use arg_const_val instead of direct access to the TempOptInfo val member. Rename both val and is_const to catch all direct accesses. Signed-off-by: Richard Henderson --- tcg/optimize.c | 78 ++ 1 fil

Re: [PULL 24/24] i386/tdx: handle TDG.VP.VMCALL

On Tue, Jun 24, 2025 at 11:03:19AM -0400, Stefan Hajnoczi wrote: > On Mon, Jun 23, 2025 at 4:37 PM Cédric Le Goater wrote: > > > > On 6/23/25 20:57, Stefan Hajnoczi wrote: > > > On Mon, Jun 23, 2025 at 9:09 AM Daniel P. Berrangé > > > wrote: > > >> > > >> On Mon, Jun 23, 2025 at 09:04:33AM -0400

Re: [PATCH v2 023/101] target/arm: Implement SME2 MOVA to/from tile, multiple registers

On Mon, 23 Jun 2025 at 16:42, Richard Henderson wrote: > > On 6/23/25 07:20, Peter Maydell wrote: > > Exceedingly nitpicky nit: the pseudocode seems to require > > that if the SVL is < 256 bits because the implementation > > doesn't support any larger SVL then this UNDEF should take > > precedence

Re: [PATCH v2 3/3] tracetool: remove redundant event_get_state checks

On Fri, Jun 20, 2025 at 02:37:20PM +, Tanish Desai wrote: > diff --git a/scripts/tracetool/backend/ftrace.py > b/scripts/tracetool/backend/ftrace.py > index baed2ae61c..2d6d608add 100644 > --- a/scripts/tracetool/backend/ftrace.py > +++ b/scripts/tracetool/backend/ftrace.py > @@ -34,18 +34,15

Re: FreeBSD 14.1 aarch64 iso URL is down

On Tue, Jun 24, 2025 at 1:41 PM Warner Losh wrote: > > On Tue, Jun 24, 2025 at 11:16 AM Stefan Hajnoczi wrote: > > > > On Tue, Jun 24, 2025 at 12:28 PM Warner Losh wrote: > > > > > > On Tue, Jun 24, 2025 at 10:02 AM Thomas Huth wrote: > > > > > > > > On 22/06/2025 03.46, Warner Losh wrote: > >

Invitation: QEMU/KVM developers conference call @ Every 2 weeks from 14:00 to 15:00 on Tuesday (BST) (qemu-devel@nongnu.org)

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Synced invitation: QEMU/KVM developers conference call @ Tue 14 Oct 2025 14:00 - 15:00 (BST) (qemu-devel@nongnu.org)

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Re: FreeBSD 14.1 aarch64 iso URL is down

On Tue, Jun 24, 2025 at 12:28 PM Warner Losh wrote: > > On Tue, Jun 24, 2025 at 10:02 AM Thomas Huth wrote: > > > > On 22/06/2025 03.46, Warner Losh wrote: > > > > > > > > > On Sat, Jun 21, 2025, 6:01 PM Stefan Hajnoczi > > > wrote: > > > > > > On Sat, Jun 21, 2025

Re: [PATCH 3/4] vfio/container: Fix potential SIGSEGV when recover from unmap-all-vaddr failure

On 6/23/25 12:22, Zhenzhong Duan wrote: cpr.saved_dma_map isn't initialized in source qemu which lead to vioc->dma_map assigned a NULL value, this will trigger SIGSEGV. I don't understand the scenario. Could you please explain more ? Fix it by save and restore vioc->dma_map locally. Steve,

Re: [PATCH v13 0/7] Add additional plugin API functions to read and write memory and registers

Rowan Hart writes: > This patch series adds several new API functions focused on enabling use > cases around reading and writing guest memory from QEMU plugins. To support > these new APIs, some utility functionality around retrieving information about > address spaces is added as well. I think

[PATCH v14 3/8] plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacks

This patch adds functionality to enforce the requested QEMU_PLUGIN_CB_ flags level passed when registering a callback function using the plugins API. Each time a callback is about to be invoked, a thread-local variable will be updated with the level that callback requested. Then, called API functio

Re: [RFC PATCH qemu 0/5] hw/cxl/mctp/i2c/usb: MCTP for OoB control of CXL devices.

On Mon, Jun 09, 2025 at 05:33:28PM +0100, Jonathan Cameron wrote: > This posting is primarily about sharing the USB device emulation to get some > early feedback. > > RFC reasons: > - Known 'inaccuracies' in emulation (not obeying MTU in the to host direction > for > example)./ > - Not sure wha

Re: [PATCH v2 091/101] target/arm: Implement SME2 counted predicate register load/store

On 6/24/25 07:21, Peter Maydell wrote: +TRANS_FEAT(LD1_zcrr, aa64_sme2_or_sve2p1, gen_ldst_zcrr_c, a, false, false) +TRANS_FEAT(LD1_zcri, aa64_sme2_or_sve2p1, gen_ldst_zcri_c, a, false, false) +TRANS_FEAT(ST1_zcrr, aa64_sme2_or_sve2p1, gen_ldst_zcrr_c, a, true, false) +TRANS_FEAT(ST1_zcri, aa64_s

Re: [PATCH v5 4/7] vhost_user: Add frontend get_shmem_config command

On Mon, Jun 09, 2025 at 04:47:26PM +0200, Albert Esteve wrote: > The frontend can use this command to retrieve > VirtIO Shared Memory Regions configuration from > the backend. The response contains the number of > shared memory regions, their size, and shmid. > > This is useful when the frontend i

Re: [PATCH v13 0/7] Add additional plugin API functions to read and write memory and registers

make[1]: *** No rule to make target 'patch-target', needed by 'run-plugin-patch-target-with-libpatch.so'. Stop. make: *** [/home/alex/lsrc/qemu.git/tests/Makefile.include:56: run-tcg-tests-x86_64-softmmu] Error 2 You need to ensure vpath is set, something like: Thanks for the note Alex.

Re: [PATCH v2 3/3] target/arm: Fix 128-bit element ZIP, UZP, TRN

On 6/24/25 07:59, Peter Maydell wrote: On Sun, 22 Jun 2025 at 22:36, Richard Henderson wrote: We missed the instructions UDEF when the vector size is too small. I think this part also applies to FMMLA_d and trans_LD1RO_zprr and trans_LD1RO_zprr ? LD1RO is handled in do_ldro; the address ca

Re: [PATCH v2 2/3] tracetool: introduce generate_unconditional

On Tue, Jun 24, 2025 at 11:07:34PM +0530, Tanish Desai wrote: > > 1. nocheck isn't necessary anymore. The body of nocheck could be inlined > > here instead to simplify the generated code. > Yes I agree.I will remove nocheck and inline the body of nocheck in > trace-foo > > 2. "if (%(cond)s) {" is

Re: [PATCH v2 043/101] target/arm: Implement SDOT, UDOT (2-way) for SME2/SVE2p1

On Sun, 22 Jun 2025 at 01:00, Richard Henderson wrote: > > Signed-off-by: Richard Henderson > --- > target/arm/tcg/translate-sve.c | 10 ++ > target/arm/tcg/sve.decode | 8 +++- > 2 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/target/arm/tcg/translate-sve.c b

[PATCH v14 1/8] gdbstub: Expose gdb_write_register function to consumers of gdbstub

This patch exposes the gdb_write_register function from gdbstub/gdbstub.c via the exec/gdbstub.h header file to support use in plugins to write register contents. Reviewed-by: Alex Bennée Reviewed-by: Julian Ganz Reviewed-by: Pierrick Bouvier Signed-off-by: Rowan Hart --- gdbstub/gdbstub.c

[PATCH 1/3] vfio/migration: Max in-flight VFIO device state buffer count limit

From: "Maciej S. Szmigiero" Allow capping the maximum count of in-flight VFIO device state buffers queued at the destination, otherwise a malicious QEMU source could theoretically cause the target QEMU to allocate unlimited amounts of memory for buffers-in-flight. Since this is not expected to b

[PATCH v14 5/8] plugins: Add memory hardware address read/write API

This patch adds functions to the plugins API to allow plugins to read and write memory via hardware addresses. The functions use the current address space of the current CPU in order to avoid exposing address space information to users. A later patch may want to add a function to permit a specified

[PATCH v14 6/8] tests/tcg: Remove copy-pasted notes and from i386 and add x86_64 system tests to tests

The x86_64-softmmu Makefile seems to have been copy-pasted from the i386 Makefile at some point in the past. Cleaning up a vestigial unused variable and removing some outdated comments. Signed-off-by: Rowan Hart --- tests/tcg/x86_64/Makefile.softmmu-target | 12 +--- 1 file changed, 5 in

[PATCH 0/3] VFIO multifd device state transfer patches for QEMU 10.1

From: "Maciej S. Szmigiero" When VFIO multifd device state transfer support was merged in QEMU 10.0 some of patches were separated for the future QEMU release after the spring cleanup. Since QEMU 10.1 code freeze is getting closer let's have them reviewed now. The most important patch from this

[PATCH v14 4/8] plugins: Add memory virtual address write API

This patch adds functions to the plugins API to allow reading and writing memory via virtual addresses. These functions only permit doing so on the current CPU, because there is no way to ensure consistency if plugins are allowed to read or write to other CPUs that aren't currently in the context o

[PATCH v14 8/8] plugins: Update plugin version and add notes

This patch updates the plugin version to gate new APIs and adds notes describing what has been added. Reviewed-by: Pierrick Bouvier Signed-off-by: Rowan Hart --- include/qemu/qemu-plugin.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/include/qemu/qemu-plugin.h b/i

[PATCH v14 7/8] plugins: Add patcher plugin and test

This patch adds a plugin that exercises the virtual and hardware memory read-write API functions added in a previous patch. The plugin takes a target and patch byte sequence, and will overwrite any instruction matching the target byte sequence with the patch. Reviewed-by: Pierrick Bouvier Signed-

[PATCH v14 2/8] plugins: Add register write API

This patch adds a function to the plugins API to allow plugins to write register contents. It also moves the qemu_plugin_read_register function so all the register-related functions are grouped together in the file. Reviewed-by: Pierrick Bouvier Signed-off-by: Rowan Hart --- include/qemu/qemu-p

[PATCH 3/3] vfio/migration: Add also max in-flight VFIO device state buffers size limit

From: "Maciej S. Szmigiero" There's already a max in-flight VFIO device state buffers *count* limit, add also max queued buffers *size* limit. Signed-off-by: Maciej S. Szmigiero --- docs/devel/migration/vfio.rst | 8 +--- hw/vfio/migration-multifd.c | 21 +++-- hw/vfio/p

[PATCH 2/3] vfio/migration: Add x-migration-load-config-after-iter VFIO property

From: "Maciej S. Szmigiero" This property allows configuring whether to start the config load only after all iterables were loaded. Such interlocking is required for ARM64 due to this platform VFIO dependency on interrupt controller being loaded first. The property defaults to AUTO, which means

Re: FreeBSD 14.1 aarch64 iso URL is down

On Tue, Jun 24, 2025 at 11:16 AM Stefan Hajnoczi wrote: > > On Tue, Jun 24, 2025 at 12:28 PM Warner Losh wrote: > > > > On Tue, Jun 24, 2025 at 10:02 AM Thomas Huth wrote: > > > > > > On 22/06/2025 03.46, Warner Losh wrote: > > > > > > > > > > > > On Sat, Jun 21, 2025, 6:01 PM Stefan Hajnoczi >

Re: [PULL 00/11] tcg patch queue

Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any user-visible changes. signature.asc Description: PGP signature

Re: [PATCH v6 0/3] Add SCLP event type CPI

On 16/06/2025 16.01, Shalini Chellathurai Saroja wrote: Implement the Service-Call Logical Processor (SCLP) event type Control-Program Identification (CPI) in QEMU. Changed since v5: - Add identifiers as class properties instead of object properties - Add description for all the class properties

Re: FreeBSD 14.1 aarch64 iso URL is down

On Tue, Jun 24, 2025 at 10:02 AM Thomas Huth wrote: > > On 22/06/2025 03.46, Warner Losh wrote: > > > > > > On Sat, Jun 21, 2025, 6:01 PM Stefan Hajnoczi > > wrote: > > > > On Sat, Jun 21, 2025 at 7:59 PM Stefan Hajnoczi > > wrote: >

Re: [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place

Hi Igor, Jonathan, On 6/20/25 2:27 PM, Igor Mammedov wrote: > On Fri, 20 Jun 2025 10:19:36 +0100 > Jonathan Cameron wrote: > >> On Mon, 16 Jun 2025 11:46:45 +0200 >> Eric Auger wrote: >> >>> Move aml_pci_edsm to pci-bridge.c since we want to reuse that for >>> ARM and acpi-index support. >>> >>>

Re: [PATCH v2 2/3] target/arm: Fix sve_access_check for SME

On 6/24/25 06:58, Peter Maydell wrote: +switch (dc_isar_feature(aa64_sme, s)) { +case true: Why this rather than if (dc_isar_feature(aa64_sme, s)) { ? +if (s->pstate_sm) { +ret = sme_enabled_check(s); +} else if (!dc_isar_feature(aa64_sve, s)) { +

Re: [PATCH v3 19/29] hw/arm/virt: Pass the bus on the ged creation

Hi Jonathan, On 6/20/25 11:38 AM, Jonathan Cameron wrote: > On Mon, 16 Jun 2025 11:46:48 +0200 > Eric Auger wrote: > >> The bus will be needed on ged realize for acpi pci hp setup. >> >> Signed-off-by: Eric Auger > I guess doing this in separate patches for previous and this one > maybe makes it

Re: [PATCH 1/3] memory: reintroduce BQL-free fine-grained PIO/MMIO

On Tue, 24 Jun 2025 09:07:11 +0200 Gerd Hoffmann wrote: > Hi, > > > Gerd mentioned this in the relevant bz: > > > > Note: root cause for the initrd issue noted in comment 5 is seabios > > running into problems with ehci -> io errors -> corrupted initrd. > > Sometimes i

Re: [PATCH v3 06/11] migration: Rename save_live_complete_precopy to save_complete

On Tue, Jun 24, 2025 at 04:36:39PM +0200, Juraj Marcin wrote: [...] > There are still mentions of 'save_live_complete_precopy' in: > > include/migration/register.h:100 > * parallel with @save_live_complete_precopy handlers. > docs/devel/migration/vfio.rst:78 > * A ``save_

Re: [PATCH] vfio: add license tag to some files

On 6/24/25 11:19, John Levon wrote: On Tue, Jun 24, 2025 at 10:05:44AM +0100, Daniel P. Berrangé wrote: On Tue, Jun 24, 2025 at 10:34:40AM +0200, Cédric Le Goater wrote: + Daniel On 6/23/25 11:30, John Levon wrote: Add SPDX-License-Identifier to some files missing it in hw/vfio/. Signed-off

Re: [PATCH v2 042/101] target/arm: Tighten USDOT (vectors) decode

On 6/24/25 03:13, Peter Maydell wrote: -USDOT_ 01000100 .. 0 . 011 110 . . @rda_rn_rm +USDOT__4s 01000100 10 0 . 011 110 . . @rda_rn_rm_e0 This sets esz to 0, when it used to be 2. The helper function looks like it looks at the simd_oprsz() so I think th

Re: [PULL 24/24] i386/tdx: handle TDG.VP.VMCALL

On 6/24/25 17:08, Daniel P. Berrangé wrote: On Tue, Jun 24, 2025 at 11:03:19AM -0400, Stefan Hajnoczi wrote: On Mon, Jun 23, 2025 at 4:37 PM Cédric Le Goater wrote: On 6/23/25 20:57, Stefan Hajnoczi wrote: On Mon, Jun 23, 2025 at 9:09 AM Daniel P. Berrangé wrote: On Mon, Jun 23, 2025 at 0

Re: [PULL 24/24] i386/tdx: handle TDG.VP.VMCALL

On Mon, Jun 23, 2025 at 4:37 PM Cédric Le Goater wrote: > > On 6/23/25 20:57, Stefan Hajnoczi wrote: > > On Mon, Jun 23, 2025 at 9:09 AM Daniel P. Berrangé > > wrote: > >> > >> On Mon, Jun 23, 2025 at 09:04:33AM -0400, Stefan Hajnoczi wrote: > >>> On Mon, Jun 23, 2025 at 4:04 AM Daniel P. Berran

Re: [PATCH v3 01/28] Add boot-certificates to s390-ccw-virtio machine type option

On 6/20/25 11:45 AM, Zhuoying Cai wrote: On 6/6/25 10:00 AM, Daniel P. Berrangé wrote: On Wed, Jun 04, 2025 at 05:56:29PM -0400, Zhuoying Cai wrote: Add boot-certificates as a parameter of s390-ccw-virtio machine type option. The `boot-certificates=/path/dir:/path/file` parameter is impleme

Re: [PATCH v2 3/3] target/arm: Fix 128-bit element ZIP, UZP, TRN

On Sun, 22 Jun 2025 at 22:36, Richard Henderson wrote: > > We missed the instructions UDEF when the vector size is too small. I think this part also applies to FMMLA_d and trans_LD1RO_zprr and trans_LD1RO_zprr ? We should also probably put something in so that if the user asks for a CPU with a m

Re: [PATCH v3 07/11] migration: qemu_savevm_complete*() helpers

On 2025-06-13 10:07, Peter Xu wrote: > Since we use the same save_complete() hook for both precopy and postcopy, > add a set of helpers to invoke the hook() to dedup the code. > > Signed-off-by: Peter Xu > --- Reviewed-by: Juraj Marcin

Re: [PATCH v3 06/11] migration: Rename save_live_complete_precopy to save_complete

Hi Peter, On 2025-06-13 10:07, Peter Xu wrote: > Now after merging the precopy and postcopy version of complete() hook, > rename the precopy version from save_live_complete_precopy() to > save_complete(). > > Dropping the "live" when at it, because it's in most cases not live when > happening (in

Synced invitation: QEMU/KVM developers conference call @ (BST) (qemu-devel@nongnu.org)

BEGIN:VCALENDAR PRODID:-//Google Inc//Google Calendar 70.9054//EN VERSION:2.0 CALSCALE:GREGORIAN METHOD:CANCEL BEGIN:VTIMEZONE TZID:America/New_York X-LIC-LOCATION:America/New_York BEGIN:DAYLIGHT TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT DTSTART:19700308T02 RRULE:FREQ=YEARLY;BYMONTH=3;BYDA

Re: [PATCH v2 034/101] target/arm: Implement SME2 FMLAL, BFMLAL

On Sun, 22 Jun 2025 at 00:55, Richard Henderson wrote: > > Signed-off-by: Richard Henderson > --- > target/arm/tcg/translate-sme.c | 93 ++ > target/arm/tcg/sme.decode | 71 ++ > 2 files changed, 164 insertions(+) > > diff --git a/targ

Re: [PATCH v3 02/11] migration/hmp: Fix postcopy-blocktime per-vCPU results

On 2025-06-13 10:07, Peter Xu wrote: > Unfortunately, it was never correctly shown.. > > This is only found when I started to look into making the blocktime feature > more useful (so as to avoid using bpftrace, even though I'm not sure which > one will be harder to use..). > > So the old dump wou

Re: [PATCH] MAINTAINERS: add reviewers for some s390 areas

On 23/06/2025 18.00, Matthew Rosato wrote: To improve review coverage, assign additional people as reviewers for multiple s390 sections. Signed-off-by: Matthew Rosato --- MAINTAINERS | 12 1 file changed, 12 insertions(+) Thanks for your help, guys! I've queued the patch now

Re: [PATCH v2 2/3] target/arm: Fix sve_access_check for SME

On Sun, 22 Jun 2025 at 22:36, Richard Henderson wrote: > > Do not assume SME implies SVE. Ensure that the > non-streaming check is present along the SME path, > since it is not implied by sme_*_enabled_check. > > Cc: qemu-sta...@nongnu.org > Signed-off-by: Richard Henderson > --- > target/arm/t

Re: [PATCH 1/2] target/riscv: disable *stimecmp interrupts without *envcfg.STCE

2025-06-23T18:39:02-03:00, Daniel Henrique Barboza : > Hi Radim, > > It seems like this patch is breaking 'make check-functional': That is a nice command to know of, thanks! > 12/12 qemu:func-quick+func-riscv64 / func-riscv64-riscv_opensbi TIMEOUT > 90.06s killed by signal 15 SIGTERM

Re: [PATCH 1/1] hw/s390x: Use preferred API call for IPLB chain write

On 6/24/25 2:27 AM, Thomas Huth wrote: On 23/06/2025 22.12, jro...@linux.ibm.com wrote: From: Jared Rossi Replace a recently introduced legacy API call with the preferred API call. fixes: 0927875 (hw/s390x: Build an IPLB for each boot device) Signed-off-by: Jared Rossi ---   hw/s390x/ip

Re: [PATCH] vfio: add license tag to some files

On Tue, Jun 24, 2025 at 10:34:40AM +0200, Cédric Le Goater wrote: > + Daniel > > On 6/23/25 11:30, John Levon wrote: > > Add SPDX-License-Identifier to some files missing it in hw/vfio/. > > > > Signed-off-by: John Levon > > --- > > hw/vfio/trace.h | 3 +++ > > hw/vfio/Kconfig | 2 +

Re: [PATCH v2 1/3] target/arm: Fix SME vs AdvSIMD exception priority

On Sun, 22 Jun 2025 at 22:36, Richard Henderson wrote: > > We failed to raise an exception when > sme_excp_el == 0 and fp_excp_el == 1. > > Cc: qemu-sta...@nongnu.org > Fixes: 3d74825f4d6 ("target/arm: Add SME enablement checks") > Signed-off-by: Richard Henderson > --- > target/arm/tcg/translat

Re: [PATCH v6 2/3] hw/s390x: add Control-Program Identification to QOM

On 16/06/2025 16.01, Shalini Chellathurai Saroja wrote: Add Control-Program Identification (CPI) data to the QEMU Object Model (QOM), along with the timestamp in which the data was received as shown below. virsh # qemu-monitor-command vm --pretty '{"execute":"qom-list", "arguments":{"path":"/mac

Re: [PATCH v2 09/10] net: Add passt network backend

On 24/06/2025 10:16, Markus Armbruster wrote: Laurent Vivier writes: This commit introduces support for passt as a new network backend. passt is an unprivileged, user-mode networking solution that provides connectivity for virtual machines by launching an external helper process. The implemen

Re: [PATCH 1/3] memory: reintroduce BQL-free fine-grained PIO/MMIO

On Mon, 23 Jun 2025 09:36:05 -0400 Peter Xu wrote: > On Mon, Jun 23, 2025 at 02:51:46PM +0200, Igor Mammedov wrote: > > On Fri, 20 Jun 2025 12:53:06 -0400 > > Peter Xu wrote: > > > > > On Fri, Jun 20, 2025 at 05:14:16PM +0200, Igor Mammedov wrote: > > > > This patch brings back Jan's idea [

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