Daniel P. Berrangé writes:
> On Thu, Jun 05, 2025 at 12:38:09PM +0100, Peter Maydell wrote:
>> On Thu, 5 Jun 2025 at 11:52, Markus Armbruster wrote:
>> > +At times contributors may use or create scripts/tools to generate an
>> > initial
>> > +boilerplate code template which is then filled in to
Hi Daniel,
> Subject: Re: [PATCH v5 2/7] ui/spice: Add an option for users to provide a
> preferred codec
>
> On Wed, May 28, 2025 at 10:11:13PM -0700, Vivek Kasireddy wrote:
> > Giving users an option to choose a particular codec will enable
> > them to make an appropriate decision based on thei
On 6/6/25 05:20, Shaoqin Huang wrote:
Hi, guys
Thanks for all of your suggestions.
On 6/5/25 11:11 PM, Philippe Mathieu-Daudé wrote:
On 5/6/25 14:21, Gerd Hoffmann wrote:
Hi,
Now the ramfb will load the vgabios-ramfb.bin unconditionally, but
only
the x86 need the vgabios-ramfb.bin, this
If kvm_irqchip_in_kernel() return true, interrupt controller
ExtIOI, IPI, PCH_PCI and PCH_MSI should be emlated in kernel. And
it is not necessary to create memory region for these devices in
user space.
Signed-off-by: Bibo Mao
---
hw/loongarch/virt.c| 57 ++--
Register IOCSR MISC_FUNC_REG is to enable features about EXTIOI
irqchip. If EXTIOI is emulated in kernel, MISC_FUNC_REG register
should be emulated in kernel also.
Signed-off-by: Bibo Mao
---
hw/loongarch/virt.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/loongarch/virt.c b/hw
Option kernel_irqchip=split is not supported on LoongArch virt machine,
report error and exit if detect split kernel_irqchip option.
Signed-off-by: Bibo Mao
---
target/loongarch/kvm/kvm.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/loongarch/kvm/kvm.c b/targe
When system reboot, interrupt controller is restored to initial
state. However if interrupt controller extioi/ipi/pch_pic is
emulated in kernel, it should notify kvm to do so. Here suspend
and restore API is used for reset, set initial state in qemu user
space and restore API is used to notify kvm
If kvm_irqchip_in_kernel() return true, MSI interrupt can be injected
with API kvm_irqchip_send_msi() to KVM.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_msi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c
index 06
If kvm_irqchip_in_kernel() return true, irq line interrupt can be
injected with API kvm_set_irq() to KVM.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index 4d232f4cca..7
Add save and store funtction if kvm_irqchip_in_kernel() return true,
it is to get and set ExtIOI irqchip state from KVM kernel.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_extioi.c | 14 +
hw/intc/loongarch_extioi_kvm.c | 90 ++
include/hw/intc/loong
Add pre_save and post_load interfaces with ipi_common class, here only
framework ipi_common adds these interfaces. The defailed implementation
is LoongArchIPI child device in later.
Signed-off-by: Bibo Mao
---
hw/intc/loongson_ipi_common.c | 28 +++
include/hw/int
Function kvm_extioi_realize() is added if kvm_irqchip_in_kernel is
set. It is to create and initialize ExtIOI device in kernel mode.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_extioi.c | 31
hw/intc/loongarch_extioi_kvm.c | 46 ++
h
Add save and store funtction if kvm_irqchip_in_kernel() return true,
it is to get and set PCH PCI irqchip state from KVM kernel.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c| 22
hw/intc/loongarch_pic_kvm.c| 47 ++
include/h
Function kvm_pic_realize() is added if kvm_irqchip_in_kernel() return true.
It is to notify KVM kernel to create and initialize PCH PCI device in
kernel mode.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_pch_pic.c | 14 ---
hw/intc/loongarch_pic_kvm.c | 38 ++
Add save and store funtction if kvm_irqchip_in_kernel() return true,
it is to get and set IPI irqchip state from KVM kernel.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_ipi.c | 20
hw/intc/loongarch_ipi_kvm.c | 54 +
include/hw/intc/loon
Function kvm_ipi_realize() is added if kvm_irqchip_in_kernel() return true.
It is to create and initialize IPI device in kernel mode.
Signed-off-by: Bibo Mao
---
hw/intc/loongarch_ipi.c | 5 +
hw/intc/loongarch_ipi_kvm.c | 27 +++
hw/intc/loongson_ipi_com
If kernel irqchip is set such as kvm_irqchip_in_kernel() return true, there
is special operations with irqchips in such fields:
1. During irqchip object realization, kvm_create_device() is used here
to create irqchip in KVM kernel.
2. Add pre_save and post_load function, where register sta
On 5/6/25 22:53, Pierrick Bouvier wrote:
On 6/5/25 12:35 PM, Philippe Mathieu-Daudé wrote:
Do not use g_alloca(), simply allocate the CharBackend
structure on the stack.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-char.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
On 2025/06/06 1:26, Alex Bennée wrote:
QOM objects can be embedded in other QOM objects and managed as part
of their lifetime but this isn't the case for
virtio_gpu_virgl_hostmem_region. However before we can split it out we
need some other way of associating the wider data structure with the
mem
This patch adds max_satp_mode from host kvm cpu setting.
Tested on: Milkv Megrez (Eswin 7700x)
Reviewed-by: Andrew Jones
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2931
Signed-off-by: Meng Zhuo
---
Change in v6:
- Rebase on https://github.com/alistair23/qemu/tree/riscv-to-apply.nex
Hi, guys
Thanks for all of your suggestions.
On 6/5/25 11:11 PM, Philippe Mathieu-Daudé wrote:
On 5/6/25 14:21, Gerd Hoffmann wrote:
Hi,
Now the ramfb will load the vgabios-ramfb.bin unconditionally, but only
the x86 need the vgabios-ramfb.bin, this can cause that when use the
release pac
On Mon, Jun 02, 2025 at 05:46:57PM +, Anisa Su wrote:
> On Fri, May 30, 2025 at 03:26:55PM +0100, Jonathan Cameron wrote:
> > On Tue, 20 May 2025 14:39:47 +0100
> > Jonathan Cameron via wrote:
> >
> > > On Thu, 8 May 2025 00:00:56 +
> > > anisa.su...@gmail.com wrote:
> > >
> > > > From:
From: Anisa Su
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
Signed-off-by: Anisa Su
---
hw/cxl/cxl-mailbox-utils.c | 152
hw/mem/cxl_type3.c | 8 +-
include/hw/cxl/cxl_device.h | 4 +
3 files changed, 160 in
From: Anisa Su
Move definition/enum to cxl_events.h for shared use in next patch
Reviewed-by: Fan Ni
Signed-off-by: Anisa Su
---
hw/mem/cxl_type3.c | 15 ---
include/hw/cxl/cxl_events.h | 15 +++
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a
From: Anisa Su
FM DCD Managment command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
Signed-off-by: Anisa Su
---
hw/cxl/cxl-mailbox-utils.c | 62 ++
1 file changed, 62 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-util
From: Anisa Su
Add a lock on the bitmap of each CXLDCRegion in preparation for the next
patch which implements FMAPI Set DC Region Configuration. This command
can modify the block size, which means the region's bitmap must be updated
accordingly.
The lock becomes necessary when commands that add
From: Anisa Su
FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
Signed-off-by: Anisa Su
---
hw/cxl/cxl-mailbox-utils.c | 86
hw/mem/cxl_type3.c | 6 +--
include/hw/cxl/cxl_device.h | 3 ++
include/hw/cxl/cxl_ma
From: Anisa Su
This patchset adds support for 6 FM API DCD Management commands (0x5600-0x5605)
according to the CXL r3.2 Spec.
The code was tested with libcxlmi, which runs in the QEMU VM and sends 56xxh
commands to the device (QEMU emulated) through MCTP messages over I2C
bus. To perform end-to
From: Anisa Su
FM DCD Management command 0x5603 implemented per CXL r3.2 Spec Section 7.6.7.6.4
Very similar to previously implemented command 0x4801.
Reviewed-by: Fan Ni
Signed-off-by: Anisa Su
---
hw/cxl/cxl-mailbox-utils.c | 76 ++
1 file changed, 76 ins
From: Anisa Su
FM DCD Management command 0x5601 implemented per CXL r3.2 Spec Section 7.6.7.6.2
Reviewed-by: Fan Ni
Signed-off-by: Anisa Su
---
hw/cxl/cxl-mailbox-utils.c | 103 +
1 file changed, 103 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/
From: Anisa Su
Add booleans to DC Region struct to represent dsmas flags (defined in CDAT) in
preparation for the next command, which returns the flags in the next mailbox
command 0x5601.
Reviewed-by: Fan Ni
Signed-off-by: Anisa Su
---
hw/mem/cxl_type3.c | 8 +++-
include/hw/cxl
From: Anisa Su
FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
Reviewed-by: Fan Ni
Signed-off-by: Anisa Su
---
hw/cxl/cxl-mailbox-utils.c | 59 +
hw/mem/cxl_type3.c | 4 +++
include/hw/cxl/cxl_device.h | 1 +
3 f
When the source VM attempts to connect to the destination VM's Unix
domain socket(cpr.sock) during CPR transfer, the socket file might not
yet be exist if the destination side hasn't completed the bind
operation. This can lead to connection failures when running tests with
the qtest framework.
To
Il gio 5 giu 2025, 21:20 Daniel P. Berrangé ha
scritto:
> > > How is this patch series related to Rust tracing? If generated code
> > > needs to be restructured so Rust can call it, then that's a strong
> > > justification.
> > Well, moving code to the .c file would make it possible to call it in
On Thu, 5 Jun 2025, Philippe Mathieu-Daudé wrote:
tpm_emulator_ctrlcmd() is not in hot path.
Use the heap instead of the stack, removing
the g_alloca() call.
Typo in subject L -> :
Regards,
BALATON Zoltan
Signed-off-by: Philippe Mathieu-Daudé
---
backends/tpm/tpm_emulator.c | 4 ++--
1 file
On 5/27/25 12:04, John Levon wrote:
On Tue, May 27, 2025 at 11:39:48AM +0200, Cédric Le Goater wrote:
On 5/20/25 17:03, John Levon wrote:
The series contains an implement of a vfio-user client in QEMU, along with a few
more preparatory patches.
I am planning to take first patches 2,3,4 in vf
On 6/5/25 17:16, Steven Sistare wrote:
On 6/4/2025 11:02 PM, Duan, Zhenzhong wrote:
-Original Message-
From: Steven Sistare
Subject: Re: [PATCH V4 04/43] vfio/pci: vfio_pci_put_device on failure
On 6/3/2025 11:55 PM, Duan, Zhenzhong wrote:
-Original Message-
From: Steven Sista
Reviewed-by: Glenn Miles
Thanks!
Glenn
On Thu, 2025-06-05 at 21:35 +0200, Philippe Mathieu-Daudé wrote:
> We have pin_count <= PCA955X_PIN_COUNT_MAX. Having
> PCA955X_PIN_COUNT_MAX = 16, it is safe to explicitly
> allocate the char buffer on the stack, without g_newa().
>
> Signed-off-by: Phil
On Mon, Jun 02, 2025 at 10:37:52PM -0300, Fabiano Rosas wrote:
> The MigrationParameter (singular) enumeration is not part of the
> migration QMP API, it's only used for nicely converting HMP strings
> into MigrationParameters (plural) members and for providing readline
> completion.
>
> Documenti
On 6/5/25 1:58 PM, Nathan Chen wrote:
On 6/4/2025 7:34 PM, Donald Dutile wrote:
On 6/4/25 10:02 PM, Nathan Chen wrote:
On 6/2/2025 8:41 AM, Shameer Kolothum wrote:
This patch series introduces support for a user-creatable SMMUv3 device
(-device arm-smmuv3) in QEMU.
Tested-by: Nathan Che
On Mon, Jun 02, 2025 at 10:37:51PM -0300, Fabiano Rosas wrote:
> Now that the TLS options have been made the same between
> migrate-set-parameters and query-migrate-parameters, a single type can
> be used. Remove MigrateSetParameters.
>
> The TLS options documentation from MigrationParameters were
On 6/5/25 12:35 PM, Philippe Mathieu-Daudé wrote:
Eradicate alloca() uses on system code, then enable
-Walloca to prevent new ones to creep back in.
Philippe Mathieu-Daudé (4):
hw/gpio/pca9552: Avoid using g_newa()
backends/tpmL Avoid using g_alloca()
tests/unit/test-char: Avoid using g
On 6/5/25 12:35 PM, Philippe Mathieu-Daudé wrote:
Do not use g_alloca(), simply allocate the CharBackend
structure on the stack.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-char.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/tests/unit/test-char.c b/tes
On Mon, Jun 02, 2025 at 10:37:50PM -0300, Fabiano Rosas wrote:
> The migration parameters tls_creds, tls_authz and tls_hostname
> currently have a non-uniform handling. When used as arguments to
> migrate-set-parameters, their type is StrOrNull and when used as
> return value from query-migrate-par
tpm_emulator_ctrlcmd() is not in hot path.
Use the heap instead of the stack, removing
the g_alloca() call.
Signed-off-by: Philippe Mathieu-Daudé
---
backends/tpm/tpm_emulator.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/backends/tpm/tpm_emulator.c b/backends/tpm/tpm
Do not use g_alloca(), simply allocate the CharBackend
structure on the stack.
Signed-off-by: Philippe Mathieu-Daudé
---
tests/unit/test-char.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/tests/unit/test-char.c b/tests/unit/test-char.c
index 60a843b79d9..f30a39f61ff 100
We have pin_count <= PCA955X_PIN_COUNT_MAX. Having
PCA955X_PIN_COUNT_MAX = 16, it is safe to explicitly
allocate the char buffer on the stack, without g_newa().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/gpio/pca9552.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/gpio
Eradicate alloca() uses on system code, then enable
-Walloca to prevent new ones to creep back in.
Philippe Mathieu-Daudé (4):
hw/gpio/pca9552: Avoid using g_newa()
backends/tpmL Avoid using g_alloca()
tests/unit/test-char: Avoid using g_alloca()
buildsys: Prohibit alloca() use on system c
Similarly to commit 64c1a544352 ("meson: Enable -Wvla") with
variable length arrays, forbid alloca() uses on system code.
There are few uses on ancient linux-user code, do not bother
there.
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build | 4
1 file changed, 4 insertions(+)
diff --g
Hi, I've long been a little confused about the specifics of our build
platform guarantee and how it applies to documentation and testing.
My *current* understanding is that our build platform guarantee applies to
both unit tests and building documentation, but that this requirement may
not be as a
On Thu, Jun 05, 2025 at 08:49:36PM +0200, Paolo Bonzini wrote:
> On 6/5/25 20:37, Stefan Hajnoczi wrote:
> > On Thu, Jun 5, 2025 at 9:57 AM Paolo Bonzini wrote:
> > > > It's easier to understand the code generator and the generated code when
> > > > each trace event is implemented as a single func
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any
user-visible changes.
signature.asc
Description: PGP signature
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any
user-visible changes.
signature.asc
Description: PGP signature
On Wed, Jun 04, 2025 at 03:18:43PM -0400, Stefan Hajnoczi wrote:
> Since commit 7ff9ff039380 ("meson: mitigate against use of uninitialize
> stack for exploits") the -ftrivial-auto-var-init=zero compiler option is
> used to zero local variables. While this reduces security risks
> associated with u
On 6/5/25 20:37, Stefan Hajnoczi wrote:
On Thu, Jun 5, 2025 at 9:57 AM Paolo Bonzini wrote:
It's easier to understand the code generator and the generated code when
each trace event is implemented as a single function in the header file.
Splitting the trace event up adds complexity. I don't thi
On Thu, May 29, 2025 at 04:11:21PM -0500, Eric Blake wrote:
> On Wed, May 28, 2025 at 03:09:16PM -0400, Stefan Hajnoczi wrote:
> > AioContext has its own io_uring instance for file descriptor monitoring.
> > The disk I/O io_uring code was developed separately. Originally I
> > thought the character
On Thu, Jun 5, 2025 at 9:57 AM Paolo Bonzini wrote:
>
> On 6/3/25 00:24, Stefan Hajnoczi wrote:
> > On Sun, Jun 01, 2025 at 06:12:30PM +, Tanish Desai wrote:
> >> Moved rarely used (cold) code from the header file to the C file to avoid
> >> unnecessary inlining and reduce binary size.
> >
> >
Queued, thanks.
Paolo
This restores the linting baseline in qapidoc. The order of some imports
change slightly here due to configuring isort a little better:
previously, isort was having difficulty understanding that "compat" and
"qapidoc_legacy" were local modules because docs/sphinx "isn't a python
package". Configuri
Update the python tests to also check QAPI and the QAPI Sphinx
extensions. The docs/sphinx/qapidoc_legacy.py file is not included in
these checks, as it is destined for removal soon. mypy is also not
called on the QAPI Sphinx extensions, owing to difficulties supporting
Sphinx 3.x - 8.x while maint
Since the previous commit, python/setup.cfg applies to scripts/qapi/ as
well. Configuration files in scripts/qapi/ override python/setup.cfg.
scripts/qapi/.flake8 and scripts/qapi/.isort.cfg actually match
python/setup.cfg exactly, and can go.
The differences between scripts/qapi/mypy.ini and py
This restores the linting baseline in QAPI.
Signed-off-by: John Snow
Reviewed-by: Markus Armbruster
Message-id: 20250604200354.459501-2-js...@redhat.com
---
scripts/qapi/backend.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/scripts/qapi/backend.py b/scripts/qapi/backend.py
index 14e6
The following changes since commit f8a113701dd2d28f3bedb216e59125ddcb77fd05:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2025-06-04 11:43:31 -0400)
are available in the Git repository at:
https://gitlab.com/jsnow/qemu.git tags/python-pull-request
for you to fe
From: Markus Armbruster
strict = True implies warn_unused_configs = True.
Signed-off-by: Markus Armbruster
Signed-off-by: John Snow
Reviewed-by: Markus Armbruster
Message-id: 20250604200354.459501-6-js...@redhat.com
---
python/setup.cfg | 1 -
1 file changed, 1 deletion(-)
diff --git a/pyth
We pin all dependencies for the "check-minreqs" test because pip lacks a
dependency resolver that installs "the oldest possible package that
meets dependency criteria". So, in order to test our stated minimum
requirements, we pin all of our dependencies (and their dependencies,
transitively) at the
On 6/4/25 9:47 AM, Anthony Krowiak wrote:
On 6/3/25 4:30 PM, Cédric Le Goater wrote:
On 6/3/25 20:01, Rorie Reyes wrote:
On 6/3/25 10:21 AM, Cédric Le Goater wrote:
On 6/3/25 14:58, Rorie Reyes wrote:
Hey Cedric,
You mentioned the following in my v9 patches
"In that case, let's keep i
On 6/4/2025 7:34 PM, Donald Dutile wrote:
On 6/4/25 10:02 PM, Nathan Chen wrote:
On 6/2/2025 8:41 AM, Shameer Kolothum wrote:
This patch series introduces support for a user-creatable SMMUv3 device
(-device arm-smmuv3) in QEMU.
Tested-by: Nathan Chen
I am able to create 16 SMMUv3 devices
On Thu, May 29, 2025 at 03:02:16PM -0500, Eric Blake wrote:
> On Wed, May 28, 2025 at 03:09:14PM -0400, Stefan Hajnoczi wrote:
> > Introduce the aio_add_sqe() API for submitting io_uring requests in the
> > current AioContext. This allows other components in QEMU, like the block
> > layer, to take
On Wed, May 28, 2025 at 04:06:13PM -0500, Eric Blake wrote:
> On Wed, May 28, 2025 at 03:09:11PM -0400, Stefan Hajnoczi wrote:
> > g_source_destroy() only removes the GSource from the GMainContext it's
> > attached to, if any. It does not free it.
> >
> > Use g_source_unref() instead so that the A
On 6/4/2025 11:02 PM, Duan, Zhenzhong wrote:
-Original Message-
From: Steven Sistare
Subject: Re: [PATCH V4 04/43] vfio/pci: vfio_pci_put_device on failure
On 6/3/2025 11:55 PM, Duan, Zhenzhong wrote:
-Original Message-
From: Steven Sistare
Subject: Re: [PATCH V4 04/43] vfio/p
Hi Jonathan,
On 5/30/25 12:17 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:13 +0200
> Eric Auger wrote:
>
>> Extract the code that reserves resources for ACPI PCI hotplug
>> into a new helper named build_append_pcihp_resources() and
>> move it to pcihp.c. We will reuse it on ARM.
>>
>>
On Mon, Jun 2, 2025 at 7:16 AM Daniel P. Berrangé
wrote:
> On Fri, May 23, 2025 at 02:08:09PM -0400, John Snow wrote:
> > This patch changes the "by type" categorization in favor of using
> > sub-categories of a literal "By type" category instead. A new "By
> > module" categorization is also adde
From: Manos Pitsidianakis
Update aarch64-core.xml to include field definitions for PSTATE, which
in gdb is modelled in the cpsr (current program status register)
pseudo-register, named after the actual cpsr register in armv7.
Defining the fields layout of the register allows easy inspection of f
From: Dominik 'Disconnect3d' Czarnota
This commit adds support for the `qGDBServerVersion` packet to the qemu
gdbstub which could be used by clients to detect the QEMU version
(and, e.g., use a workaround for known bugs).
This packet is not documented/standarized by GDB but it was implemented
b
On Wed, Jun 04 2025, Shameerali Kolothum Thodi
wrote:
>> -Original Message-
>> From: Cornelia Huck
>> Sent: Wednesday, June 4, 2025 1:36 PM
>> To: Shameerali Kolothum Thodi
>> ; eric.auger@gmail.com;
>> eric.au...@redhat.com; qemu-devel@nongnu.org; qemu-...@nongnu.org;
>> kvm...@lis
The following changes since commit 09be8a511a2e278b45729d7b065d30c68dd699d0:
Merge tag 'pull-qapi-2025-06-03' of https://repo.or.cz/qemu/armbru into
staging (2025-06-03 09:19:26 -0400)
are available in the Git repository at:
https://gitlab.com/stsquad/qemu.git
tags/pull-10.1-maintainer-may
Seeing as I've taken a few patches to here now I might as well put
myself forward to maintain virtio-gpu. I've marked it as Odd Fixes as
it is not my core focus. If someone with more GPU experience comes
forward we can always update again.
Reviewed-by: Markus Armbruster
Signed-off-by: Alex Bennée
On Thu, 5 Jun 2025 at 17:18, Philippe Mathieu-Daudé wrote:
>
> On 5/6/25 14:50, Stefan Hajnoczi wrote:
> > On Thu, Jun 05, 2025 at 01:28:49PM +0200, Philippe Mathieu-Daudé wrote:
> >> diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
> >> index 85110bce374..b96c6ec603c 100644
> >> --- a/hw/virt
It's easy to get lost in zeros while setting the numbers of
instructions per second. Add a scaling suffix to make things simpler.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Alex Bennée
Message-ID: <20250603110204.838117-6-alex.ben...@linaro.org>
diff --git a/contrib/plugins/ips.c b/contrib/pl
Thanks for volunteering to help.
Cc: Akihiko Odaki
Cc: Dmitry Osipenko
Reviewed-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Michael S. Tsirkin
Signed-off-by: Alex Bennée
Message-ID: <20250603110204.838117-9-alex.ben...@linaro.org>
diff --git a/MAINTAINERS b/MAINTAINE
Currently the boot.S code assumes everything starts at EL1. This will
break things like the memory test which will barf on unaligned memory
access when run at a higher level.
Adapt the boot code to do some basic verification of the starting mode
and the minimal configuration to move to the lower e
From: Yiwei Zhang
Venus and later native contexts have their own fence context along with
multiple timelines within. Fences wtih VIRTIO_GPU_FLAG_INFO_RING_IDX in
the flags must be dispatched to be created on the target context. Fence
signaling also has to be handled on the specific timeline withi
Reviewed-by: Pierrick Bouvier
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-ID: <20250603110204.838117-15-alex.ben...@linaro.org>
diff --git a/include/gdbstub/commands.h b/include/gdbstub/commands.h
index 40f0514fe9..bff3674872 100644
--- a/include/gdbstub/commands.h
++
If you want to run functional tests we should share .cache/qemu so we
don't force containers to continually re-download images. We also move
ccache to use this shared area.
Reviewed-by: Thomas Huth
Signed-off-by: Alex Bennée
Message-ID: <20250603110204.838117-2-alex.ben...@linaro.org>
diff --gi
From: Nabih Estefan
../tests/qtest/libqos/igb.c:106:5: runtime error: load of misaligned address
0x562040be8e33 for type 'uint32_t', which requires 4 byte alignment
Instead of straight casting the uint8_t array, we can use ldl_le_p and
lduw_l_p to assure the unaligned access works properly ag
Our default build enables debug info which adds hugely to the size of
the builds as well as the size of cached objects. Disable debug info
across the board to save space and reduce pressure on the CI system.
We still have a number of builds which explicitly enable debug and
related extra asserts li
The default is we update time every 1/10th of a second or so. However
for some cases we might want to update time more frequently. Allow
this to be set via the command line through the ipq argument.
Reviewed-by: Pierrick Bouvier
Signed-off-by: Alex Bennée
Message-ID: <20250603110204.838117-7-ale
When things go wrong we want to assert on the register that failed to
be able to figure out what went wrong.
Reviewed-by: Pierrick Bouvier
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Alex Bennée
Message-ID: <20250603110204.838117-16-alex.ben...@linaro.org>
diff --git a/gdbstub/gdbstub.c
We can handle larger sized memops now, expand the range of the assert.
Fixes: 4b473e0c60 (tcg: Expand MO_SIZE to 3 bits)
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
Message-ID: <20250603110204.838117-14-alex.ben...@linaro.org>
diff --git a/include/exec/memop.h b/include/exec/memop
From: Manos Pitsidianakis
Change the 3 part async cleanup of a blob memory mapping to check if the
unmapping has finished already after deleting the subregion; this
condition allows us to skip suspending the command and responding to the
guest right away.
Signed-off-by: Manos Pitsidianakis
Revi
From: Dongwon Kim
This partially reverts commit 77bf310084dad38b3a2badf01766c659056f1cf2
which causes some guest display corruption when gtk-gl-area
is used for GTK rendering (e.g. Wayland Compositor) possibly due to
simulataneous accesses on the guest frame buffer by host compositor
and the gues
QOM objects can be embedded in other QOM objects and managed as part
of their lifetime but this isn't the case for
virtio_gpu_virgl_hostmem_region. However before we can split it out we
need some other way of associating the wider data structure with the
memory region.
Fortunately MemoryRegion has
On 5/6/25 14:50, Stefan Hajnoczi wrote:
On Thu, Jun 05, 2025 at 01:28:49PM +0200, Philippe Mathieu-Daudé wrote:
On 5/6/25 10:34, Daniel P. Berrangé wrote:
On Wed, Jun 04, 2025 at 03:18:43PM -0400, Stefan Hajnoczi wrote:
Since commit 7ff9ff039380 ("meson: mitigate against use of uninitialize
st
On Thu, Jun 5, 2025 at 2:35 AM Markus Armbruster wrote:
> John Snow writes:
>
> > Hiya, this series turns on automated linting for scripts/qapi,
> > docs/sphinx/qapidoc.py and docs/sphinx/qapi_domain.py.
> >
> > This includes flake8/isort/pylint/mypy for scripts/qapi, but omits mypy
> > from the
Hi Jonathan,
On 5/30/25 12:24 PM, Jonathan Cameron wrote:
> On Tue, 27 May 2025 09:40:16 +0200
> Eric Auger wrote:
>
>> We intend to reuse build_append_pci_bus_devices and
>> build_append_pcihp_slots on ARM. So let's move them to
>> hw/acpi/pcihp.c as well as all static helpers they
>> use.
> Oddl
On Thu, Jun 5, 2025 at 4:36 AM Daniel P. Berrangé
wrote:
> On Thu, Jun 05, 2025 at 08:33:44AM +0200, Markus Armbruster wrote:
> > John Snow writes:
> >
> > [...]
> >
> > > diff --git a/python/tests/qapi-flake8.sh b/python/tests/qapi-flake8.sh
> > > new file mode 100755
> > > index 000..2
On Thu, 1 May 2025 23:04:45 +0200
Philippe Mathieu-Daudé wrote:
> QEMU_PCIE_EXTCAP_INIT was only used by the hw_compat_2_8[]
> array, via the 'x-pcie-extcap-init=off' property. We removed
> all machines using that array, lets remove all the code around
> QEMU_PCIE_EXTCAP_INIT.
>
> Signed-off-by
On 5/6/25 14:21, Gerd Hoffmann wrote:
Hi,
Now the ramfb will load the vgabios-ramfb.bin unconditionally, but only
the x86 need the vgabios-ramfb.bin, this can cause that when use the
release package on arm64 it can't find the vgabios-ramfb.bin.
Simpler to directly pass the ROM path instea
Markus Armbruster writes:
> Markus Armbruster writes:
>
>> Alex Bennée writes:
>
> [...]
>
>>> We don't mention the Link: or Message-Id: tags.
>>
>> Yes, but should it go into code-provenance.rst or
>> submitting-a-patch.rst?
>>
>> You asked for guidance on use of "Message-Id:" in your review o
On Thu, 1 May 2025 23:04:44 +0200
Philippe Mathieu-Daudé wrote:
> The PFlashCFI01::old_multiple_chip_handling boolean was only set
> in the hw_compat_2_8[] array, via the 'old-multiple-chip-handling=on'
> property. We removed all machines using that array, lets remove that
> property and all the
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