On 28/05/25 01:38PM, Jonathan Cameron wrote:
On Wed, 28 May 2025 13:31:06 +0100
Jonathan Cameron wrote:
On Fri, 16 May 2025 19:12:45 +0530
Arpit Kumar wrote:
> On 12/05/25 05:40PM, Jonathan Cameron wrote:
> >On Mon, 12 May 2025 09:37:07 -0400
> >"Michael S. Tsirkin" wrote:
> >
> >> On Mon,
Hi Eric,
On 5/28/25 06:48, Eric Auger wrote:
Hi Igor,
On 5/28/25 11:38 AM, Igor Mammedov wrote:
On Tue, 27 May 2025 09:40:26 +0200
Eric Auger wrote:
From: Gustavo Romero
ACPI PCI hotplug is now turned on by default so we need to change the
existing tests to keep it off. However, even sett
From: novafacing
This patch adds functions to the plugins API to allow plugins to read
and write memory via hardware addresses. The functions use the current
address space of the current CPU in order to avoid exposing address
space information to users. A later patch may want to add a function to
From: novafacing
This patch exposes the gdb_write_register function from
gdbstub/gdbstub.c via the exec/gdbstub.h header file to support use in
plugins to write register contents.
Signed-off-by: novafacing
Signed-off-by: Rowan Hart
---
gdbstub/gdbstub.c | 2 +-
include/exec/gdbstub.h |
From: novafacing
This patch adds a plugin that exercises the virtual and hardware memory
read-write API functions added in a previous patch. The plugin takes a
target and patch byte sequence, and will overwrite any instruction
matching the target byte sequence with the patch.
Signed-off-by: nova
From: novafacing
This patch exposes the gdb_write_register function from
gdbstub/gdbstub.c via the exec/gdbstub.h header file to support use in
plugins to write register contents.
Signed-off-by: novafacing
Signed-off-by: Rowan Hart
---
gdbstub/gdbstub.c | 2 +-
include/exec/gdbstub.h |
From: novafacing
This patch updates the plugin version to gate new APIs and adds notes
describing what has been added.
Signed-off-by: Rowan Hart
---
include/qemu/qemu-plugin.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/qemu/qemu-plugin.h b/include/qemu/
On 09/05/2025 17.23, Igor Mammedov wrote:
On Thu, 8 May 2025 15:35:24 +0200
Philippe Mathieu-Daudé wrote:
These machines has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6ff "docs: document special exception for machin
Hi Igor and Eric,
I'm sending again this to the mailing list since it seems the first one
got lost... I can't find it either in qemu-devel@ or in qemu-arm@ :(
On 5/30/25 08:51, Igor Mammedov wrote:
On Wed, 28 May 2025 12:04:26 -0300
Gustavo Romero wrote:
Hi Igor,
On 5/28/25 10:02, Igor Mamm
From: novafacing
This patch adds a plugin that implements a simple form of hypercalls
from guest code to the plugin by using the register read API. It accepts
only one hypercall, which writes a magic value to guest memory.
Signed-off-by: novafacing
Signed-off-by: Rowan Hart
---
tests/tcg/Make
From: novafacing
This patch adds a function to the plugins API to allow plugins to write
register contents. It also moves the qemu_plugin_read_register function
so all the register-related functions are grouped together in the file.
Signed-off-by: novafacing
Signed-off-by: Rowan Hart
---
incl
Hi Igor and Eric,
On 5/30/25 08:51, Igor Mammedov wrote:
On Wed, 28 May 2025 12:04:26 -0300
Gustavo Romero wrote:
Hi Igor,
On 5/28/25 10:02, Igor Mammedov wrote:
On Wed, 28 May 2025 09:41:15 -0300
Gustavo Romero wrote:
Hi Igor,
On 5/28/25 06:38, Igor Mammedov wrote:
On Tue, 27 May 2
From: novafacing
This patch adds functions to the plugins API to allow reading and
writing memory via virtual addresses. These functions only permit doing
so on the current CPU, because there is no way to ensure consistency if
plugins are allowed to read or write to other CPUs that aren't current
This patch adds functionality to enforce the requested QEMU_PLUGIN_CB_
flags level passed when registering a callback function using the
plugins API. Each time a callback is about to be invoked, a thread-local
variable will be updated with the level that callback requested. Then,
called API functio
On Wed, May 21, 2025 at 7:21 PM Roan Richmond
wrote:
>
Can you include in the commit message which exact version (please
include a link) of the spec this targets. We need exact versions as
RISC-V will often release multiple conflicting "final" versions, so
it's good to have a record of what this
This patch series adds several new API functions focused on enabling use
cases around reading and writing guest memory from QEMU plugins. To support
these new APIs, some utility functionality around retrieving information about
address spaces is added as well.
The new qemu_plugin_write_register ut
Sairaj: Are you passing a full NVME device to the guest (i.e. a PF)? I
ask because the BDF in '-device vfio-pci,host=:44:00.0' doesn't look
like a typical VF...
Hey Alejandro,
I am passing full NVME device to the guest (not just VF).
Thanks
Sairaj
From: novafacing
This patch adds functions to the plugins API to allow reading and
writing memory via virtual addresses. These functions only permit doing
so on the current CPU, because there is no way to ensure consistency if
plugins are allowed to read or write to other CPUs that aren't current
From: novafacing
This patch adds functions to the plugins API to allow plugins to read
and write memory via hardware addresses. The functions use the current
address space of the current CPU in order to avoid exposing address
space information to users. A later patch may want to add a function to
From: novafacing
This patch adds a plugin that implements a simple form of hypercalls
from guest code to the plugin by using the register read API. It accepts
only one hypercall, which writes a magic value to guest memory.
Signed-off-by: novafacing
Signed-off-by: Rowan Hart
---
tests/tcg/Make
On Fri, Apr 25, 2025 at 10:22 PM Ran Wang wrote:
>
> From: Huang Borong <3543977...@qq.com>
>
> Add a CPU entry for the Xiangshan Kunminghu CPU, an open-source,
> high-performance RISC-V processor. More details can be found at:
> https://github.com/OpenXiangShan/XiangShan
>
> Note: The ISA extensi
On Fri, May 30, 2025 at 6:24 AM Daniel Henrique Barboza
wrote:
>
> Most of the named features are added directly in isa_edata_arr[], some
> of them are also added in riscv_cpu_named_features(). There is a reason
> for that, and the existing docs can do better explaining it.
>
> Signed-off-by: Dani
This patch is required to make the insn plugin work after adding
enforcement of QEMU_PLUGIN_CB_ flags in calls to read or write
registers. Previously, these flags were not enforced and the API could
be called from anywhere, but this was not intended as described by the
documentation. Now, the flags
On Fri, May 30, 2025 at 6:24 AM Daniel Henrique Barboza
wrote:
>
> 'ssstrict' is a RVA23 profile-defined extension defined as follows:
>
> "No non-conforming extensions are present. Attempts to execute
> unimplemented opcodes or access unimplemented CSRs in the standard or
> reserved encoding spac
From: novafacing
This patch updates the plugin version to gate new APIs and adds notes
describing what has been added.
Signed-off-by: Rowan Hart
---
include/qemu/qemu-plugin.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/qemu/qemu-plugin.h b/include/qemu/
This patch series adds several new API functions focused on enabling use
cases around reading and writing guest memory from QEMU plugins. To support
these new APIs, some utility functionality around retrieving information about
address spaces is added as well.
The new qemu_plugin_write_register ut
From: novafacing
This patch adds a plugin that exercises the virtual and hardware memory
read-write API functions added in a previous patch. The plugin takes a
target and patch byte sequence, and will overwrite any instruction
matching the target byte sequence with the patch.
Signed-off-by: nova
This patch adds functionality to enforce the requested QEMU_PLUGIN_CB_
flags level passed when registering a callback function using the
plugins API. Each time a callback is about to be invoked, a thread-local
variable will be updated with the level that callback requested. Then,
called API functio
On Thu, May 22, 2025 at 12:29 PM Chao Liu wrote:
>
> riscv_plic_hart_config_string() when getting CPUState via qemu_get_cpu()
> should be consistent with keeping sifive_plic_realize()
> by hartid_base + cpu_index.
>
> A better approach is to use cpu_by_arch_id() instead of qemu_get_cpu(),
> in ris
This patch is required to make the insn plugin work after adding
enforcement of QEMU_PLUGIN_CB_ flags in calls to read or write
registers. Previously, these flags were not enforced and the API could
be called from anywhere, but this was not intended as described by the
documentation. Now, the flags
From: novafacing
This patch adds a function to the plugins API to allow plugins to write
register contents. It also moves the qemu_plugin_read_register function
so all the register-related functions are grouped together in the file.
Signed-off-by: novafacing
Signed-off-by: Rowan Hart
---
incl
On Fri, May 30, 2025 at 6:24 AM Daniel Henrique Barboza
wrote:
>
> We have support for sdtrig for awhile but we are not advertising it. It
> is enabled by default via the 'debug' flag. Use the same flag to also
> advertise sdtrig.
>
> Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair
On Thu, May 29, 2025 at 10:52 PM Nutty Liu
wrote:
>
> The original implementation incorrectly performed a bitwise AND
> operation between the PPN of iova and PPN Mask, leading to an
> incorrect PPN field in Translation-reponse register.
>
> The PPN of iova should be set entirely in the PPN field o
Hi Igor and Eric,
On 5/27/25 10:03, Igor Mammedov wrote:
On Tue, 27 May 2025 14:38:16 +0200
Igor Mammedov wrote:
On Tue, 27 May 2025 09:40:10 +0200
Eric Auger wrote:
From: Gustavo Romero
This commit adds DSDT blobs to the whilelist in the prospect to
allow changes in the GPEX _OSC method
On Fri, May 30, 2025 at 6:24 AM Daniel Henrique Barboza
wrote:
>
> Hi,
>
> These simple patches add two missing named features in riscv,isa. Third
> patch is a doc change I figured was worth doing.
>
> Drew, as far as Server SoC Reference platform goes, we don't have
> 'sdext'. I guess we'll have
On Fri, May 30, 2025 at 12:01 AM Meng Zhuo wrote:
>
> This patch adds host satp mode while kvm/host cpu satp mode is not
> set.
>
> Reviewed-by: Andrew Jones
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2931
> Signed-off-by: Meng Zhuo
> ---
> This patch don't change the output of er
On Fri, May 30, 2025 at 11:47 PM Daniel Henrique Barboza
wrote:
>
> These properties were deprecated in QEMU 8.2, commit 8043effd9b.
>
> Signed-off-by: Daniel Henrique Barboza
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/cpu.c | 17 -
> target/
On Fri, May 30, 2025 at 11:47 PM Daniel Henrique Barboza
wrote:
>
> These properties were deprecated in QEMU 8.2, commit 8043effd9b.
>
> Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 17 -
> target/riscv/cpu
On Sun, Jun 01, 2025 at 06:38:43PM +0200, Cédric Le Goater wrote:
> On 5/29/25 21:24, Steve Sistare wrote:
> > Do not reset a vfio-pci device during CPR.
> >
> > Signed-off-by: Steve Sistare
> > ---
> > include/hw/pci/pci_device.h | 3 +++
> > hw/pci/pci.c| 5 +
> > hw/vfi
On 5/30/2025 4:32 PM, Chenyi Qiang wrote:
Update ReplayRamDiscard() function to return the result and unify the
ReplayRamPopulate() and ReplayRamDiscard() to ReplayRamDiscardState() at
the same time due to their identical definitions. This unification
simplifies related structures, such as VirtIO
On 5/29/25 21:24, Steve Sistare wrote:
In new QEMU, do not register the memory listener at device creation time.
Register it later, in the container post_load handler, after all vmstate
that may affect regions and mapping boundaries has been loaded. The
post_load registration will cause the list
Moved frequently used hot paths from the .c file to the .h file to enable
inlining
and improve performance. This approach is inspired by past QEMU optimizations,
where performance-critical code was inlined based on profiling results.
Signed-off-by: Tanish Desai
---
scripts/tracetool/backend/log
inline: move hot paths from .c to .h for better performance
Moved frequently used hot paths from the .c file to the .h file to enable
inlining
and improve performance. This approach is inspired by past QEMU optimizations,
where performance-critical code was inlined based on profiling results.
Sig
Moved rarely used (cold) code from the header file to the C file to avoid
unnecessary inlining and reduce binary size. This improves code organization
and follows good practices for managing cold paths.
Signed-off-by: Tanish Desai
---
scripts/tracetool/backend/ftrace.py | 44
This patch continues the optimize fast trace paths started in previous patch
(trace/simple: seperate hot paths of tracing fucntions), which optimized the
simple backend by moving its hot path to the header. Here, we apply the same
pattern to the log, ftrace, and syslog backends.
The fast path re
On 5/30/25 11:35, Zhenzhong Duan wrote:
Hi,
The first 6 patches of [1] are all VFIO or IOMMUFD related additions.
Split them out per Cédric and seek for quick acceptance.
I didn't copy changelog from [1] as it's a mix of the whole nesting series.
For who want a quick view of the whole nesting
On 5/28/25 19:44, Steven Sistare wrote:
Hi Cedric,
Do you have any comments on this before I send V4?
Ditto for patch "vfio-pci: preserve INTx".
In both, I made the changes you requested in V2.
And I will change all "reused" tests to cpr_is_incoming as we
discussed elsewhere.
I saw. Thanks f
On 5/29/25 21:23, Steve Sistare wrote:
Support vfio and iommufd devices with the cpr-transfer live migration mode.
Devices that do not support live migration can still support cpr-transfer,
allowing live update to a new version of QEMU on the same host, with no loss
of guest connectivity.
No use
On 5/29/25 21:24, Steve Sistare wrote:
At vfio creation time, save the value of vfio container, group, and device
descriptors in CPR state. On qemu restart, vfio_realize() finds and uses
the saved descriptors.
During reuse, device and iommu state is already configured, so operations
in vfio_rea
On 5/29/25 21:24, Steve Sistare wrote:
Do not reset a vfio-pci device during CPR.
Signed-off-by: Steve Sistare
---
include/hw/pci/pci_device.h | 3 +++
hw/pci/pci.c| 5 +
hw/vfio/pci.c | 7 +++
3 files changed, 15 insertions(+)
diff --git a/include/hw
On 5/29/25 21:24, Steve Sistare wrote:
Do not reset a vfio-pci device during CPR, and do not complain if the
kernel's PCI config space changes for non-emulated bits between the
vmstate save and load, which can happen due to ongoing interrupt activity.
Signed-off-by: Steve Sistare
Reviewed-by
From: Bibo Mao
Add support to build bios-tables-test iso image for LoongArch system.
Signed-off-by: Bibo Mao
Acked-by: Gerd Hoffmann
Message-Id: <20250520130158.767083-2-maob...@loongson.cn>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/uefi-test-tools/Makefil
On 5/30/2025 4:32 PM, Chenyi Qiang wrote:
Modify memory_region_set_ram_discard_manager() to return -EBUSY if a
RamDiscardManager is already set in the MemoryRegion. The caller must
handle this failure, such as having virtio-mem undo its actions and fail
the realize() process. Opportunistically mo
From: Bibo Mao
Update the list of supported architectures to include LoongArch.
Signed-off-by: Bibo Mao
Message-Id: <20250520130158.767083-7-maob...@loongson.cn>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/data/acpi/rebuild-expected-aml.sh | 4 ++--
1 file cha
On 5/30/2025 4:32 PM, Chenyi Qiang wrote:
Rename the helper to memory_region_section_intersect_range() to make it
more generic. Meanwhile, define the @end as Int128 and replace the
related operations with Int128_* format since the helper is exported as
a wider API.
Suggested-by: Alexey Kardashev
From: CLEMENT MATHIEU--DRIF
A device can send a PRI request to the IOMMU using pci_pri_request_page.
The PRI response is sent back using the notifier managed with
pci_pri_register_notifier and pci_pri_unregister_notifier.
Signed-off-by: Clement Mathieu--Drif
Co-authored-by: Ethan Milon
Message
From: CLEMENT MATHIEU--DRIF
Devices implementing ATS can send translation requests using
pci_ats_request_translation. The invalidation events are sent
back to the device using the iommu notifier managed with
pci_iommu_register_iotlb_notifier / pci_iommu_unregister_iotlb_notifier.
Signed-off-by:
From: CLEMENT MATHIEU--DRIF
pri_enabled can be used to check whether the capability is present and
enabled on a PCIe device
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-6-clement.mathieu--d...@eviden.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsir
From: Yuri Benditovich
virtio processes indirect descriptors even if the respected
feature VIRTIO_RING_F_INDIRECT_DESC was not negotiated.
If qemu is used with reduced set of features to emulate the
hardware device that does not support indirect descriptors,
the will probably trigger problematic
On 5/29/25 21:24, Steve Sistare wrote:
Extract a subroutine vfio_pci_vector_init. No functional change.
Signed-off-by: Steve Sistare
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/vfio/pci.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --gi
From: CLEMENT MATHIEU--DRIF
ats_enabled checks whether the capability is
present or not. If so, we read the configuration space to get
the status of the feature (enabled or not).
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-4-clement.mathieu--d...@eviden.com>
Reviewed
From: CLEMENT MATHIEU--DRIF
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-2-clement.mathieu--d...@eviden.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie.h | 6 +-
include/hw/pci/pcie_regs.h | 5 +
hw/pci/p
From: CLEMENT MATHIEU--DRIF
pasid_enabled checks whether the capability is
present or not. If so, we read the configuration space to get
the status of the feature (enabled or not).
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-3-clement.mathieu--d...@eviden.com>
Review
From: CLEMENT MATHIEU--DRIF
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-5-clement.mathieu--d...@eviden.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie.h | 5 -
include/hw/pci/pcie_regs.h | 3 +++
hw/pci/pcie
From: Bibo Mao
The acpi table data is filled for LoongArch virt machine with the
following command:
tests/data/acpi/rebuild-expected-aml.sh
Signed-off-by: Bibo Mao
Message-Id: <20250520130806.767181-1-maob...@loongson.cn>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
From: Vasant Hegde
If vCPUs > 255 then x86 common code (x86_cpus_init()) call kvm_enable_x2apic().
But if vCPUs <= 255 then the common code won't calls kvm_enable_x2apic().
This is because commit 8c6619f3e692 ("hw/i386/amd_iommu: Simplify non-KVM
checks on XTSup feature") removed the call to kvm
From: CLEMENT MATHIEU--DRIF
The cached is_master value is necessary to know if a device is
allowed to issue ATS/PRI requests or not as these operations do not go
through the master_enable memory region.
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-7-clement.mathieu--d
From: Eugenio Pérez
To map the guest memory while it is migrating we need to create the
iova_tree, as long as the destination uses x-svq=on. Checking to not
override it.
The function vhost_vdpa_net_client_stop clear it if the device is
stopped. If the guest starts the device again, the iova tree
The following changes since commit d2e9b78162e31b1eaf20f3a4f563da82da56908d:
Merge tag 'pull-qapi-2025-05-28' of https://repo.or.cz/qemu/armbru into
staging (2025-05-29 08:36:01 -0400)
are available in the Git repository at:
https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upst
From: Eugenio Pérez
Current memory operations like pinning may take a lot of time at the
destination. Currently they are done after the source of the migration is
stopped, and before the workload is resumed at the destination. This is a
period where neigher traffic can flow, nor the VM workload
From: Bernhard Beschow
Commit 56b1f50e3c10 ("hw/i386/pc: Wire RTC ISA IRQs in south bridges")
attempted to refactor RTC IRQ wiring which was previously done in
pc_basic_device_init() but forgot about the isapc machine. Fix this by
wiring in the code section dedicated exclusively to the isapc mach
On 5/29/25 21:24, Steve Sistare wrote:
Export various MSI functions, renamed with a vfio_pci prefix, for use by
CPR in subsequent patches. No functional change.
Signed-off-by: Steve Sistare
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/vfio/pci.h | 8
hw/vfio/pci.c | 29
From: Eugenio Pérez
Since commit f6fe3e333f ("vdpa: move memory listener to
vhost_vdpa_shared") this piece of code repeatedly assign
shared->listener members. This was not a problem as it was not used
until device start.
However next patches move the listener registration to this
vhost_vdpa_ini
From: CLEMENT MATHIEU--DRIF
This is meant to be used by ATS-capable devices.
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-10-clement.mathieu--d...@eviden.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pci.h | 33 ++
From: Eugenio Pérez
The backend does not reset them until the vdpa file descriptor is closed
so there is no harm in doing it only once.
This allows the destination of a live migration to premap memory in
batches, using VHOST_BACKEND_F_IOTLB_BATCH.
Tested-by: Lei Yang
Reviewed-by: Si-Wei Liu
A
From: Bibo Mao
Add empty acpi table for LoongArch virt machine, it is only empty
file and there is no data in these files.
Signed-off-by: Bibo Mao
Message-Id: <20250520130158.767083-5-maob...@loongson.cn>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-
From: Eugenio Pérez
As we are moving to keep the mapping through all the vdpa device life
instead of resetting it at VirtIO reset, we need to move all its
dependencies to the initialization too. In particular devices with
x-svq=on need a valid iova_tree from the beginning.
Simplify the code als
From: Bibo Mao
Replace 1024 * 1024 with MiB macro.
Signed-off-by: Bibo Mao
Message-Id: <20250520130158.767083-4-maob...@loongson.cn>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-tables-test.c | 20 ++--
1 file changed, 10 insertions(+
From: CLEMENT MATHIEU--DRIF
This kind of information is needed by devices implementing ATS in order
to initialize their translation cache.
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-8-clement.mathieu--d...@eviden.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by:
From: Eugenio Pérez
Check if the listener has been registered or not, so it needs to be
registered again at start.
Tested-by: Lei Yang
Reviewed-by: Si-Wei Liu
Acked-by: Jason Wang
Signed-off-by: Eugenio Pérez
Signed-off-by: Jonah Palmer
Message-Id: <20250522145839.59974-5-jonah.pal...@oracl
From: Huaitong Han
The vring call fd is set even when the guest does not use MSI-X (e.g., in the
case of virtio PMD), leading to unnecessary CPU overhead for processing
interrupts.
The commit 96a3d98d2c("vhost: don't set vring call if no vector") optimized the
case where MSI-X is enabled but the
From: Bibo Mao
Remove stale allowed tables for LoongArch virt machine.
Signed-off-by: Bibo Mao
Message-Id: <20250520130806.767181-2-maob...@loongson.cn>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-tables-test-allowed-diff.h | 8
1 file chan
From: Eugenio Pérez
It will be used directly by vhost_vdpa_init.
Tested-by: Lei Yang
Reviewed-by: Si-Wei Liu
Acked-by: Jason Wang
Signed-off-by: Eugenio Pérez
Signed-off-by: Jonah Palmer
Message-Id: <20250522145839.59974-3-jonah.pal...@oracle.com>
Reviewed-by: Michael S. Tsirkin
Signed-off
From: Bibo Mao
Add basic ACPI table test case for LoongArch, including cpu topology,
numa memory, memory hotplug and oem-id test cases.
Signed-off-by: Bibo Mao
Message-Id: <20250520130158.767083-6-maob...@loongson.cn>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
test
From: CLEMENT MATHIEU--DRIF
This will help developers of ATS-capable devices to track a state.
Signed-off-by: Clement Mathieu--Drif
Message-Id: <20250520071823.764266-9-clement.mathieu--d...@eviden.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/system/memo
From: Bibo Mao
To test ACPI tables, edk2 needs to be booted with a disk image having
EFI partition. This image is created using UefiTestToolsPkg.
The image is generated with the following command:
make -f tests/uefi-test-tools/Makefile
Signed-off-by: Bibo Mao
Acked-by: Gerd Hoffmann
Message
From: Sairaj Kodilkar
Commit c1f46999ef506 ("amd_iommu: Add support for pass though mode")
introduces the support for "pt" flag by enabling nodma memory when
"pt=off". This allowed VFIO devices to successfully register notifiers
by using nodma region.
But, This also broke things when guest is bo
On 5/29/25 21:24, Steve Sistare wrote:
Register a legacy container for cpr-transfer, replacing the generic CPR
register call with a more specific legacy container register call. Add a
blocker if the kernel does not support VFIO_UPDATE_VADDR or VFIO_UNMAP_ALL.
This is mostly boiler plate. The f
Change virtio-gpu Venus link, pointing it at the Mesa Venus
documentation instead of the protocol. The Mesa doc provides more
information and also has a link to the protocol.
Suggested-by: Akihiko Odaki
Reviewed-by: Akihiko Odaki
Signed-off-by: Dmitry Osipenko
---
docs/system/devices/virtio-gp
On 5/30/25 11:35, Zhenzhong Duan wrote:
This helper passes cache invalidation request from guest to invalidate
stage-1 page table cache in host hardware.
Signed-off-by: Nicolin Chen
Signed-off-by: Zhenzhong Duan
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/system/iommufd.h
Add support for DRM native contexts to VirtIO-GPU. DRM context is enabled
using a new virtio-gpu-gl device option "drm_native_context=on".
Unlike Virgl and Venus contexts that operate on application API level,
DRM native contexts work on a kernel UAPI level. This lower level results
in a lightweig
Support asynchronous fencing feature of virglrenderer. It allows Qemu to
handle fence as soon as it's signalled instead of periodically polling
the fence status. This feature is required for enabling DRM context
support in Qemu because legacy fencing mode isn't supported for DRM
contexts in virglre
Display refreshment is invoked by a timer and it erroneously disables
the active scanout if it happens to be invoked after scanout has been
enabled. This offending scanout-disable race condition with a timer
can be easily hit when Qemu runs with a disabled vsync by using SDL or
GTK displays (with v
Extend virtio-gpu documentation with a link to the Mesa VirGL
documentation.
Suggested-by: Akihiko Odaki
Reviewed-by: Akihiko Odaki
Signed-off-by: Dmitry Osipenko
---
docs/system/devices/virtio-gpu.rst | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/docs/system/devices/vi
Display refreshment is invoked by a timer and it erroneously disables
the active scanout if it happens to be invoked after scanout has been
enabled. This offending scanout-disable race condition with a timer
can be easily hit when Qemu runs with a disabled vsync by using SDL or
GTK displays (with v
From: Alex Bennée
This attempts to tidy up the VirtIO GPU documentation to make the list
of requirements clearer. There are still a lot of moving parts and the
distros have some catching up to do before this is all handled
automatically.
Signed-off-by: Alex Bennée
Cc: Sergio Lopez Pascual
Revi
SDL API changes GL context to a newly created GL context, which differs
from other GL providers that don't switch context. Change SDL backend to
restore the original GL context. This allows Qemu's virtio-gpu to support
new virglrenderer async-fencing feature for Virgl contexts, otherwise
virglrende
This patchset adds DRM native context support to VirtIO-GPU on Qemu.
Contarary to Virgl and Venus contexts that mediates high level GFX APIs,
DRM native context [1] mediates lower level kernel driver UAPI, which
reflects in a less CPU overhead and less/simpler code needed to support it.
DRM contex
Print out error messages when virgl fence creation fails to aid debugging
of the fence-related bugs.
Reviewed-by: Akihiko Odaki
Acked-by: Michael S. Tsirkin
Tested-by: Alex Bennée
Signed-off-by: Dmitry Osipenko
---
hw/display/virtio-gpu-virgl.c | 27 ++-
1 file changed
From: Pierre-Eric Pelloux-Prayer
If EGL is used, we can rely on dmabuf to import textures without
doing copies.
To get this working on X11, we use the existing SDL hint:
SDL_HINT_VIDEO_X11_FORCE_EGL (because dmabuf can't be used with GLX).
Reviewed-by: Akihiko Odaki
Acked-by: Michael S. Tsirki
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