Jason Wang writes:
> On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>>
>> Current memory operations like pinning may take a lot of time at the
>> destination. Currently they are done after the source of the migration is
>> stopped, and before the workload is resumed at the destination. Thi
> On May 16, 2025, at 11:30, Itaru Kitayama wrote:
>
> Hi Jonathan,
>
>> On May 13, 2025, at 20:14, Jonathan Cameron
>> wrote:
>>
>> V13:
>> - Make CXL fixed memory windows sysbus devices.
>> IIRC this was requested by Peter in one of the reviews a long time back
>> but at the time the mot
On 13/05/2025 19:14, Jonathan Cameron via wrote:
>
> +hwaddr cxl_fmws_set_memmap(hwaddr base, hwaddr max_addr)
> +{
> +GSList *cfmws_list, *iter;
> +
> +struct cfmw_update_state cfmwss = {
> +.base = base,
> +.maxaddr = max_addr,
> +.update_mmio = false,
> +
On 13/05/2025 19:14, Jonathan Cameron via wrote:
> To enable these to be found in a fixed order, that order needs
> to be known. This will later be used to sort a list of these
> structures that address map and ACPI table entries are predictable.
>
> Signed-off-by: Jonathan Cameron
Reviewed-
On 13/05/2025 19:14, Jonathan Cameron via wrote:
> Previously these somewhat device like structures were tracked using a list
> in the CXLState in each machine. This is proving restrictive in a few
> cases where we need to iterate through these without being aware of the
> machine type. Just mak
On 2025/05/15 2:06, Peter Xu wrote:
On Wed, May 14, 2025 at 04:34:33PM +0900, Akihiko Odaki wrote:
On 2025/05/13 23:39, 'Peter Xu' via devel wrote:
On Sun, May 11, 2025 at 03:08:18PM +0900, Akihiko Odaki wrote:
futex(2) - Linux manual page
https://man7.org/linux/man-pages/man2/futex.2.html
No
On 5/15/25 10:27 PM, Pierrick Bouvier wrote:
Recently, common libraries per target base architecture were introduced in order
to compile those files only once. However, it was missing common dependencies
(which include external libraries), so it failed to build on some hosts.
This series fixes t
On 5/15/25 5:35 PM, Pierrick Bouvier wrote:
On 5/13/25 4:20 PM, Pierrick Bouvier wrote:
Hi Thomas,
On 5/13/25 4:56 AM, Thomas Huth wrote:
From: Thomas Huth
Since commit 6f4e8a92bbd ("hw/arm: make most of the compilation units
common"), compilation of some arm machines (like musicpal) fails o
Recently, common libraries per target base architecture were introduced in order
to compile those files only once. However, it was missing common dependencies
(which include external libraries), so it failed to build on some hosts.
This series fixes this, inspired by Thomas fix [1], and applied to
As mentioned in 20250513115637.184940-1-th...@redhat.com, dependencies
were missing when compiling per target libraries, thus breaking
compilation on certain host systems.
We now explicitely add common dependencies to those libraries, so it
solves the problem.
Signed-off-by: Pierrick Bouvier
---
Signed-off-by: Pierrick Bouvier
---
hw/arm/meson.build | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 5098795f61d..d90be8f4c94 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -8,7 +8,7 @@ arm_common_ss.add(when: 'C
Signed-off-by: Pierrick Bouvier
---
target/arm/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index b404fa54863..2ff7ed6e98f 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -28,7 +28,7 @@ arm_user
Now that target configuration can be applied to lib{system, user}_ss,
there is no reason to keep that separate from the existing {system,
user}_ss.
We extract existing system/user code common common libraries to
lib{system, user}.
To not break existing meson files, we alias libsystem_ss to system
semihosting code needs to be included only if CONFIG_SEMIHOSTING is set.
However, this is a target configuration, so we need to apply it to the
lib{system, user}_ss.
As well, this prepares merging lib{system, user}_ss with
{system, user}_ss.
Acked-by: Richard Henderson
Signed-off-by: Pierrick Bo
Signed-off-by: Pierrick Bouvier
---
meson.build | 2 --
accel/tcg/meson.build | 8
gdbstub/meson.build | 4 ++--
hw/core/meson.build | 4 ++--
plugins/meson.build | 4 ++--
system/meson.build| 2 +-
tcg/meson.build | 4 ++--
7 files changed, 13 insertions(+), 15
On 2025/05/16 10:44, Jason Wang wrote:
On Wed, May 14, 2025 at 2:58 PM Akihiko Odaki wrote:
On 2025/05/14 14:05, 'Jason Wang' via devel wrote:
On Sat, May 10, 2025 at 3:24 PM Akihiko Odaki wrote:
virtio_net_pre_load_queues() inspects vdev->guest_features to tell if
VIRTIO_NET_F_RSS or VIRT
On Thu, May 15, 2025 at 05:11:56PM +0100, Daniel P. Berrangé wrote:
> Date: Thu, 15 May 2025 17:11:56 +0100
> From: "Daniel P. Berrangé"
> Subject: Re: [PATCH 8/9] target/s390x/kvm/pv: Consolidate
> OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES
>
> On Thu, May 15, 2025 at 05:41:40PM +0200, BALATON Z
Hi Cédric
>
> On a BE host, if I run an ast2700a0-evb machine :
>
> $ qemu-system-aarch64 -machine ast2700a0-evb ...
> ...
> U-Boot 2023.10-v00.05.06 (Mar 26 2025 - 05:59:26 +)
>
> SOC: AST2700-A0
> Model: AST2700 EVB
> DRAM: 8 GiB (effective 0 Bytes)
>
> QEMU han
On Thu, May 15, 2025 at 04:17:28PM +0800, Zhao Liu wrote:
> Date: Thu, 15 May 2025 16:17:28 +0800
> From: Zhao Liu
> Subject: Re: [PATCH 2/2] i386/hvf: Make CPUID_HT supported
>
> On Tue, May 13, 2025 at 11:16:52PM -0400, Xiaoyao Li wrote:
> > Date: Tue, 13 May 2025 23:16:52 -0400
> > From: Xiaoy
Hi Jonathan,
> On May 13, 2025, at 20:14, Jonathan Cameron
> wrote:
>
> V13:
> - Make CXL fixed memory windows sysbus devices.
> IIRC this was requested by Peter in one of the reviews a long time back
> but at the time the motivation was less strong than it becomes with some
> WiP patches fo
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> From: Eugenio Pérez
>
> As we are moving to keep the mapping through all the vdpa device life
> instead of resetting it at VirtIO reset, we need to move all its
> dependencies to the initialization too. In particular devices with
> x-svq=on
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> From: Eugenio Pérez
>
> The backend does not reset them until the vdpa file descriptor is closed
> so there is no harm in doing it only once.
>
> This allows the destination of a live migration to premap memory in
> batches, using VHOST_BACKE
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> From: Eugenio Pérez
>
> Since commit f6fe3e333f ("vdpa: move memory listener to
> vhost_vdpa_shared") this piece of code repeatedly assign
> shared->listener members. This was not a problem as it was not used
> until device start.
>
> Howeve
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> From: Eugenio Pérez
>
> Check if the listener has been registered or not, so it needs to be
> registered again at start.
>
> Signed-off-by: Eugenio Pérez
> Signed-off-by: Jonah Palmer
> ---
Acked-by: Jason Wang
Thanks
On Thu, May 8, 2025 at 2:48 AM Jonah Palmer wrote:
>
> From: Eugenio Pérez
>
> It will be used directly by vhost_vdpa_init.
>
> Signed-off-by: Eugenio Pérez
> Signed-off-by: Jonah Palmer
> ---
Acked-by: Jason Wang
Thanks
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> From: Eugenio Pérez
>
> To map the guest memory while it is migrating we need to create the
> iova_tree, as long as the destination uses x-svq=on. Checking to not
> override it.
>
> The function vhost_vdpa_net_client_stop clear it if the devi
On Thu, May 8, 2025 at 2:48 AM Jonah Palmer wrote:
>
> From: Eugenio Pérez
>
> It will be used directly by vhost_vdpa_init.
>
> Signed-off-by: Eugenio Pérez
> Signed-off-by: Jonah Palmer
> ---
Acked-by: Jason Wang
Thanks
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> Current memory operations like pinning may take a lot of time at the
> destination. Currently they are done after the source of the migration is
> stopped, and before the workload is resumed at the destination. This is a
> period where neigh
On Thu, May 15, 2025 at 8:17 AM Si-Wei Liu wrote:
>
> Hi Eugenio,
>
> On 5/14/2025 8:49 AM, Eugenio Perez Martin wrote:
> > On Wed, May 7, 2025 at 8:47 PM Jonah Palmer wrote:
> >> Current memory operations like pinning may take a lot of time at the
> >> destination. Currently they are done after
On Thu, May 8, 2025 at 2:47 AM Jonah Palmer wrote:
>
> Current memory operations like pinning may take a lot of time at the
> destination. Currently they are done after the source of the migration is
> stopped, and before the workload is resumed at the destination. This is a
> period where neigh
On Wed, May 14, 2025 at 2:58 PM Akihiko Odaki wrote:
>
> On 2025/05/14 14:05, 'Jason Wang' via devel wrote:
> > On Sat, May 10, 2025 at 3:24 PM Akihiko Odaki
> > wrote:
> >>
> >> virtio_net_pre_load_queues() inspects vdev->guest_features to tell if
> >> VIRTIO_NET_F_RSS or VIRTIO_NET_F_MQ is ena
On Fri May 16, 2025 at 1:36 AM AEST, Cédric Le Goater wrote:
> On 5/12/25 05:10, Nicholas Piggin wrote:
>> These changes gets the powernv xive2 to the point it is able to run
>> PowerVM with good stability.
>>
>> * Various bug fixes around lost interrupts particularly.
>> * Major group interrupt w
On 5/13/25 4:20 PM, Pierrick Bouvier wrote:
Hi Thomas,
On 5/13/25 4:56 AM, Thomas Huth wrote:
From: Thomas Huth
Since commit 6f4e8a92bbd ("hw/arm: make most of the compilation units
common"), compilation of some arm machines (like musicpal) fails on
certain host systems like OpenBSD 7.6/7.7 s
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Michael Kowal
>
> This can make it easier to see what the target system is trying to
> do.
>
Reviewed-by: Nicholas Piggin
> [npiggin: split from larger patch]
> Signed-off-by: Michael Kowal
> ---
> hw/intc/pnv_xive2.c | 24 ++
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> When an XIVE context is pulled while it has an active, unacknowledged
> group interrupt, XIVE will check to see if a context on another thread
> can handle the interrupt and, if so, notify that context. If there
>
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> Add support for redistributing a presented group interrupt if it
> is precluded as a result of changing the CPPR value. Without this,
> group interrupts can be lost.
Reviewed-by: Nicholas Piggin
>
> Signed-off-b
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> Booting AIX in a PowerVM partition requires the use of the "Acknowledge
> O/S Interrupt to even O/S reporting line" special operation provided by
> the IBM XIVE interrupt controller. This operation is invoked by wr
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> Add more tracing around notification, redistribution, and escalation.
>
Reviewed-by: Nicholas Piggin
> Signed-off-by: Glenn Miles
> ---
> hw/intc/trace-events | 6 ++
> hw/intc/xive.c | 3 +++
> hw
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> Change pregs to pool_regs, for clarity.
>
Reviewed-by: Nicholas Piggin
> [npiggin: split from larger patch]
> Signed-off-by: Glenn Miles
> ---
> hw/intc/xive2.c | 11 +--
> 1 file changed, 5 insertions
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> Adds support for extracting additional configuration flags from
> the XIVE configuration register that are needed for redistribution
> of group interrupts.
Reviewed-by: Nicholas Piggin
>
> Signed-off-by: Glenn M
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Michael Kowal
>
> Writes to the Flush Control registers were logged as invalid
> when they are allowed. Clearing the unsupported want_cache_disable
> feature is supported, so don't log an error in that case.
I guess there are no
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> According to the XIVE spec, updating the CPPR should also update the
> PIPR. The final value of the PIPR depends on other factors, but it
> should never be set to a value that is above the CPPR.
>
> Also added supp
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> The current xive algorithm for finding a matching group vCPU
> target always uses the first vCPU found. And, since it always
> starts the search with thread 0 of a core, thread 0 is almost
> always used to handle
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> A problem was seen where uart interrupts would be lost resulting in the
> console hanging. Traces showed that a lower priority interrupt was
> preempting a higher priority interrupt, which would result in the highe
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Michael Kowal
>
> When the END Event Queue wraps the END EQ Generation bit is flipped and the
> Generation Flipped bit is set to one. On a END cache Watch read operation,
> the Generation Flipped bit needs to be reset.
>
> While
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Michael Kowal
>
> In a multi chip environment there will be remote/forwarded VSDs. The check
> to find a matching INT controller (XIVE) of the remote block number was
> checking the INTs chip number. Block numbers are not tied t
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> Add support for XIVE ESB Interrupt Escalation.
>
> Suggested-by: Michael Kowal
> [This change was taken from a patch provided by Michael Kowal.]
> Signed-off-by: Glenn Miles
> ---
> hw/intc/xive2.c |
On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> From: Glenn Miles
>
> The queue size of an Event Notification Descriptor (END)
> is determined by the 'cl' and QsZ fields of the END.
> If the cl field is 1, then the queue size (in bytes) will
> be the size of a cache line 128B * 2^QsZ
On Thu May 15, 2025 at 6:42 AM AEST, Mike Kowal wrote:
>
> On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
>> Further split xive_tctx_pipr_update() by splitting out a new function
>> that is used to re-compute the PIPR from IPB. This is generally only
>> used with XIVE1, because group interrputs requ
On Fri May 16, 2025 at 1:21 AM AEST, Mike Kowal wrote:
>
> On 5/14/2025 3:10 PM, Mike Kowal wrote:
>>
>> On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
>>> xive_tctx_pipr_update() is used for multiple things. In an effort
>>> to make things simpler and less overloaded, split out the function
>>> tha
On Fri May 16, 2025 at 1:16 AM AEST, Mike Kowal wrote:
>
> On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
>> The relationship between an interrupt signaled in the TIMA and the QEMU
>> irq line to the processor to be 1:1, so they should be raised and
>
> ...needs to be...
>
>
>> lowered together and
On Thu May 15, 2025 at 6:10 AM AEST, Mike Kowal wrote:
>
> On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
>> xive_tctx_pipr_update() is used for multiple things. In an effort
>> to make things simpler and less overloaded, split out the function
>> that is used to present a new interrupt to the tctx.
On Thu May 15, 2025 at 5:54 AM AEST, Mike Kowal wrote:
>
> On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
>> Have the match_nvt method only perform a TCTX match but don't present
>> the interrupt, the caller presents. This has no functional change, but
>> allows for more complicated presentation log
On Thu May 15, 2025 at 5:07 AM AEST, Mike Kowal wrote:
>
> On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
>> Have xive_tctx_accept clear NSR in one shot rather than masking out bits
>> as they are tested, which makes it clear it's reset to 0, and does not
>> have a partial NSR value in the register.
There's currently five places where the yank function is being
registered and they all come right before tcp_chr_new_client(). Fold
them into it.
Signed-off-by: Fabiano Rosas
---
chardev/char-socket.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --
It's possible for the hup_source to have its reference decremented by
remove_hup_source() while it's still being added to the context,
leading to asserts in glib:
g_source_set_callback_indirect: assertion 'g_atomic_int_get
(&source->ref_count) > 0'
g_source_attach: assertion 'g_atomic_int_get (&s
tcp_chr_free_connection() can be called multiple times in succession,
in which case the yank function will get as argument a NULL s->sioc
that has been cleared by the previous tcp_chr_free_connection() call.
This leads to an abort() at yank_unregister_function().
#0 __GI_raise (sig=6) at ../sys
The IOWatchPoll holds a reference to the iochannel while the "child"
source (iwp->src) is removed from the context and freed. Freeing the
source leads to the iochannel being also freed at
qio_channel_fd_source_finalize().
Later, io_watch_poll_prepare() tries to create another source with the
same
Running vhost-user-test with ASAN on a loaded machine reveals several
intermittent issues. These show up every time I test the qtest tree so
I'm trying to get rid of them.
1- UAF of IOWatchPoll.
This one is self explanatory, ASAN caught it.
2- Reference counting issues in glib. It seems it's p
On Fri, Apr 11, 2025 at 04:14:34PM -0300, Fabiano Rosas wrote:
> The migration parameters validation involves producing a temporary
> structure which merges the current parameter values with the new
> parameters set by the user.
>
> The has_ boolean fields of MigrateSetParameter are taken into
> c
On 15/05/2025 06:44, Volker Rümelin wrote:
AUD_open_out() may fail and return NULL. This may then lead to
a segmentation fault in memset() below. The memset() behaviour
is undefined if the pointer to the destination object is a null
pointer.
Add the missing error handling code.
Reviewed-by: Ma
On Fri, Apr 11, 2025 at 04:14:33PM -0300, Fabiano Rosas wrote:
> Some migration parameters are updated immediately once they are set
> via migrate-set-parameters. Move that work outside of
> migrate_params_apply() and leave that function with the single
> responsibility of setting s->parameters and
On Mon, Apr 14, 2025 at 02:40:25PM -0300, Fabiano Rosas wrote:
> > Can we make the two approaches mutually exclusive ? Taking your
> > 'migrate' command example addition:
> >
> > { 'command': 'migrate',
> > 'data': {'*uri': 'str',
> > '*channels': [ 'MigrationChannel' ],
> > +
On Thu, May 15, 2025 at 10:24:00AM +, conte.souleym...@gmail.com wrote:
> From: Souleymane Conte
>
> buglink: https://gitlab.com/qemu-project/qemu/-/issues/527
>
> Signed-off-by: Souleymane Conte
> ---
> docs/interop/index.rst| 1 +
> docs/interop/{qcow2.txt => qcow2.rst}
On Tue, May 13, 2025 at 03:26:28PM +0200, Jean-Louis Dupond wrote:
> When discard-no-unref is enabled, discards are not queued like it
> should.
> This was broken since discard-no-unref was added.
>
> Add some helper function qcow2_discard_cluster which handles some common
s/Add some/Add a/
(pre
On Tue, May 13, 2025 at 03:26:27PM +0200, Jean-Louis Dupond wrote:
> The function just queues discards, and doesn't do any refcount change.
> So let's change the function name to align with its function.
>
> Signed-off-by: Jean-Louis Dupond
> ---
Reviewed-by: Eric Blake
> block/qcow2-refcount
On 5/13/2025 7:12 AM, Mark Cave-Ayland wrote:
On 12/05/2025 16:32, Steve Sistare wrote:
Modify memory_get_xlat_addr and vfio_get_xlat_addr to return the memory
region that the translated address is found in. This will be needed by
CPR in a subsequent patch to map blocks using IOMMU_IOAS_MAP_FI
On 5/15/25 10:00 AM, Daniel Borkmann wrote:
> On 5/14/25 9:02 PM, Ilya Maximets wrote:
>> On 5/12/25 4:23 PM, Daniel Borkmann wrote:
>>> On 5/12/25 2:03 PM, Ilya Maximets wrote:
On 5/9/25 4:05 PM, Daniel Borkmann wrote:
> On 5/9/25 12:53 AM, Ilya Maximets wrote:
>> On 5/8/25 2:34 PM, D
On 5/15/2025 4:22 AM, David Hildenbrand wrote:
On 14.05.25 19:03, Cédric Le Goater wrote:
+ Paolo
+ David
+ Peter
+ Phil
On 5/12/25 22:51, John Levon wrote:
On Mon, May 12, 2025 at 08:32:37AM -0700, Steve Sistare wrote:
Modify memory_get_xlat_addr and vfio_get_xlat_addr to return the memory
On 5/15/2025 9:42 AM, Cédric Le Goater wrote:
On 5/12/25 17:32, Steve Sistare wrote:
In new QEMU, do not register the memory listener at device creation time.
Register it later, in the container post_load handler, after all vmstate
that may affect regions and mapping boundaries has been loaded.
On 5/15/2025 8:59 AM, Cédric Le Goater wrote:
On 5/12/25 17:32, Steve Sistare wrote:
At vfio creation time, save the value of vfio container, group, and device
descriptors in CPR state. On qemu restart, vfio_realize() finds and uses
the saved descriptors, and remembers the reused status for sub
On 5/15/2025 9:42 AM, Cédric Le Goater wrote:
On 5/12/25 17:32, Steve Sistare wrote:
Export vfio_legacy_dma_map so it may be referenced outside the file
in a subsequent patch.
Signed-off-by: Steve Sistare
---
hw/vfio/container.c | 4 ++--
include/hw/vfio/vfio-container-bas
On 5/15/2025 3:54 AM, Cédric Le Goater wrote:
On 5/12/25 17:32, Steve Sistare wrote:
Register a legacy container for cpr-transfer, replacing the generic CPR
register call with a more specific legacy container register call. Add a
blocker if the kernel does not support VFIO_UPDATE_VADDR or VFIO_
From: Daniel P. Berrangé
This removes the TARGET_S390X and CONFIG_KVM conditions from the
CPU commands that are conceptually specific to s390x. Top level
stubs are provided to cope with non-s390x targets, or builds
without KVM.
The removal of CONFIG_KVM is justified by the fact there is no
conce
On 5/15/25 10:46 AM, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
system/main.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/system/main.c b/system/main.c
index 1c022067349..b8f7157cc34 100644
--- a/system/main.c
+++ b/system/main.c
@@ -69,8 +69,21 @@ int
Signed-off-by: Pierrick Bouvier
---
system/main.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/system/main.c b/system/main.c
index 1c022067349..b8f7157cc34 100644
--- a/system/main.c
+++ b/system/main.c
@@ -69,8 +69,21 @@ int (*qemu_main)(void) = os_darwin_cfrunloop_main;
i
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the SEV confidential
virtualization commands, moving them to the recently introduced
misc-i386.json QAPI file, given they are inherantly i386 specific
commands.
Reviewed-by: Richard Henderson
Signed-off-by: Daniel P. Berrangé
On 5/14/2025 10:43 PM, Michael S. Tsirkin wrote:
On Wed, May 14, 2025 at 05:17:15PM -0700, Si-Wei Liu wrote:
Hi Eugenio,
On 5/14/2025 8:49 AM, Eugenio Perez Martin wrote:
On Wed, May 7, 2025 at 8:47 PM Jonah Palmer wrote:
Current memory operations like pinning may take a lot of time at th
On 5/14/2025 10:42 PM, Michael S. Tsirkin wrote:
On Wed, May 07, 2025 at 02:46:47PM -0400, Jonah Palmer wrote:
From: Eugenio Pérez
Current memory operations like pinning may take a lot of time at the
destination. Currently they are done after the source of the migration is
stopped, and bef
From: Daniel P. Berrangé
This file is now empty and can thus be removed.
Observe the pre-existing bug with s390-skeys.c and target/i386/monitor.c
both including qapi-commands-misc-target.h despite not requiring it.
Reviewed-by: Richard Henderson
Signed-off-by: Daniel P. Berrangé
Signed-off-by
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
qapi/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/meson.build b/qapi/meson.build
index 7582c2b5bcf..6cc3afce721 100644
--- a/qapi/meson.build
+++ b/qapi/mes
From: Daniel P. Berrangé
This removes the TARGET_* conditions from all the CPU commands
that are conceptually target independent. Top level stubs are
provided to cope with targets which do not currently implement
all of the commands.
Reviewed-by: Richard Henderson
Signed-off-by: Daniel P. Berra
On 5/14/25 4:40 PM, Pierrick Bouvier wrote:
This series exposes all qmp commands for any target unconditionally, allowing to
compile QAPI generated code without any TARGET conditionals.
Based on original RFC from Daniel P. Berrangé:
https://lore.kernel.org/qemu-devel/20250508135816.673087-1-berr
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the rtc-reset-reinjection
command. This requires providing a QMP command stub for non-i386 target.
This in turn requires moving the command out of misc-target.json, since
that will trigger symbol poisoning errors when built from
This series exposes all qmp commands for any target unconditionally, allowing to
compile QAPI generated code without any TARGET conditionals.
Based on original RFC from Daniel P. Berrangé:
https://lore.kernel.org/qemu-devel/20250508135816.673087-1-berra...@redhat.com/
v2
--
- rtc-reset-reinjecti
There is no more QAPI files that need to be compiled per target, so we
can remove this.
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Richard Henderson
Signed-off-by: Pierrick Bouvier
---
qapi/meson.build | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/qapi/meson
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the SGX confidential
virtualization commands, moving them to the recently introduced
misc-i386.json QAPI file, given they are inherantly i386 specific
commands.
Observe a pre-existing bug that the "SGXEPCSection" struct lacked
From: Daniel P. Berrangé
This removes the TARGET_ARM condition from the query-gic-capability
command. This requires providing a QMP command stub for non-ARM targets.
This in turn requires moving the command out of misc-target.json, since
that will trigger symbol poisoning errors when built from t
From: Philippe Mathieu-Daudé
We'd like to have some unified QAPI schema. Having a structure field
conditional to a target being built in is not very practical.
While @deprecated-props is only used by s390x target, it is generic
enough and could be used by other targets (assuming we expand
CpuMod
From: Daniel P. Berrangé
This gives some more context about the behaviour of the commands in
unsupported guest configuration or platform scenarios.
Reviewed-by: Richard Henderson
Signed-off-by: Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier
---
qapi/misc-target.json | 43
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the Xen event channel
commands, moving them to the recently introduced misc-i386.json
QAPI file, given they are inherantly i386 specific commands.
Reviewed-by: Richard Henderson
Signed-off-by: Daniel P. Berrangé
Acked-by: Dav
On 5/12/2025 4:51 PM, John Levon wrote:
On Mon, May 12, 2025 at 08:32:37AM -0700, Steve Sistare wrote:
Modify memory_get_xlat_addr and vfio_get_xlat_addr to return the memory
region that the translated address is found in. This will be needed by
CPR in a subsequent patch to map blocks using IO
On 5/15/25 1:45 AM, Daniel P. Berrangé wrote:
diff --git a/stubs/monitor-i386-rtc.c b/stubs/monitor-i386-rtc.c
new file mode 100644
index 000..e78757b24f2
--- /dev/null
+++ b/stubs/monitor-i386-rtc.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include "qemu/osdep
On 5/15/25 15:59, Daniel P. Berrangé wrote:
The ACPI test data check needs to analyse a list of all files in a
commit, so can use the new hook for processing the file list.
Signed-off-by: Daniel P. Berrangé > ---
scripts/checkpatch.pl | 61 ---
1 file c
Reviewed-by: Glenn Miles
On Mon, 2025-05-12 at 13:10 +1000, Nicholas Piggin wrote:
> Further split xive_tctx_pipr_update() by splitting out a new function
> that is used to re-compute the PIPR from IPB. This is generally only
> used with XIVE1, because group interrputs require more logic.
>
> Si
Reviewed-by: Glenn Miles
On Mon, 2025-05-12 at 13:10 +1000, Nicholas Piggin wrote:
> Implement the phys (aka hard) VP push. PowerVM uses this operation.
>
> Signed-off-by: Nicholas Piggin
> ---
> hw/intc/xive.c | 2 ++
> hw/intc/xive2.c| 11 +++
> include/hw/ppc/xive2.
On Thu, May 15, 2025 at 06:19:45PM +0200, Cédric Le Goater wrote:
> On 5/15/25 18:06, Cédric Le Goater wrote:
> > On 5/15/25 18:05, Daniel P. Berrangé wrote:
> > > On Thu, May 15, 2025 at 02:59:36PM +0100, Daniel P. Berrangé wrote:
> > > > The previous commit mandates use of SPDX-License-Identifier
From: Eric Auger
Introduce scripts that automate the generation of system register
definitions from a given linux source tree arch/arm64/tools/sysreg.
Invocation of
./update-aarch64-sysreg-code.sh $PATH_TO_LINUX_SOURCE_TREE
in scripts directory generates target/arm/cpu-sysregs.h.inc
containing d
On Thu, May 15, 2025 at 05:41:40PM +0200, BALATON Zoltan wrote:
> On Thu, 15 May 2025, Zhao Liu wrote:
> > On Wed, May 14, 2025 at 06:24:03PM +0200, BALATON Zoltan wrote:
> > > Date: Wed, 14 May 2025 18:24:03 +0200
> > > From: BALATON Zoltan
> > > Subject: Re: [PATCH 8/9] target/s390x/kvm/pv: Cons
The ACPI test data check needs to analyse a list of all files in a
commit, so can use the new hook for processing the file list.
Signed-off-by: Daniel P. Berrangé
---
scripts/checkpatch.pl | 61 ---
1 file changed, 29 insertions(+), 32 deletions(-)
diff -
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