On 13.05.2025 18:54, Kevin Wolf wrote:
Am 27.09.2024 um 08:11 hat Michael Tokarev geschrieben:
+cmd_help(ccmd,
+"[-f FMT | --image-opts] [-T CACHE_MODE] [-r] [-u]\n"
+"[--output human|json] [--object OBJDEF] FILENAME\n"
+,
+" -q, --quiet\n"
+" quiet operations\n"
Let
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> Start putting all the CPU definitions in a struct. Later this will replace
> instance_init functions with declarative code, for now just remove the
> ugly cast of class_data.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
On Thu, May 15, 2025 at 08:07:02AM +0200, Markus Armbruster wrote:
> Date: Thu, 15 May 2025 08:07:02 +0200
> From: Markus Armbruster
> Subject: Re: [PATCH 0/2] qapi/misc-target: Fix the doc of query-sgx and
> query-sgx-capabilities
>
> Zhao Liu writes:
>
> > Hi all,
> >
> > There're 2 QMP comm
virtio processes indirect descriptors even if the respected
feature VIRTIO_RING_F_INDIRECT_DESC was not negotiated.
If qemu is used with reduced set of features to emulate the
hardware device that does not support indirect descriptors,
the will probably trigger problematic flows on the hardware
set
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> Same as v4, with suggestion from Richard to avoid parentheses---which also
> fixes the issue with kvm-cpu.c reported by Daniel Barboza. KVM/RISC-V is
> now covered in CI and passes with this version.
>
> Paolo
>
> Paolo Bonzini (26):
> ta
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Wednesday, May 14, 2025 11:32 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; long...@lenovo.com;
On Wed, May 14, 2025 at 8:22 AM Sahil Siddiq wrote:
>
> Hi,
>
> Apologies, I haven't been in touch for a while. I have an update that
> I would like to give.
>
> On 4/16/25 12:50 PM, Eugenio Perez Martin wrote:
> > On Mon, Apr 14, 2025 at 11:20 AM Sahil Siddiq wrote:
> >>
> >> Hi,
> >>
> >> On 3/
Commit ed2a4a7941 ("audio: proper support for float samples in
mixeng") added support for float audio samples. As there were no
audio frontend devices with float support at that time, the code
was limited to native endian float samples.
When nobody was paying attention, an audio device that suppor
Zhao Liu writes:
> Hi all,
>
> There're 2 QMP commands: query-sgx and query-sgx-capabilities, but
> their outputs are very similar and the documentation lacks clear
> differentiation.
>
>From the codes, query-sgx is used to gather guest's SGX capabilities
> (including SGX related CPUIDs and EPC
On Wed, 2025-05-14 at 13:50 +0200, BALATON Zoltan wrote:
> On Wed, 14 May 2025, Weifeng Liu wrote:
> > Hi Gerd,
> > On Mon, 2025-05-12 at 13:46 +0200, Gerd Hoffmann wrote:
> > > On Sun, May 11, 2025 at 03:33:11PM +0800, Weifeng Liu wrote:
> > > > The existence of multiple scaling factors forces us
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 75 ++
> 1 file changed, 35 insertions(+), 40 deletions(-)
>
> diff --git a/target/riscv/cpu.c
On Wed, May 14, 2025 at 05:17:15PM -0700, Si-Wei Liu wrote:
> Hi Eugenio,
>
> On 5/14/2025 8:49 AM, Eugenio Perez Martin wrote:
> > On Wed, May 7, 2025 at 8:47 PM Jonah Palmer wrote:
> > > Current memory operations like pinning may take a lot of time at the
> > > destination. Currently they are
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Unlike other uses of .instance_post_init, accel_cpu_instance_init()
> *registers* properties, and therefore must be run before
> device_post_init() which sets them to their values from -global.
>
> In order to move all registration of proper
There is no need to allocate initialized memory with g_malloc0()
if it's directly followed by a memset() function call. g_malloc()
is sufficient.
Reviewed-by: Marc-André Lureau
Reviewed-by: Mark Cave-Ayland
Signed-off-by: Volker Rümelin
---
hw/audio/asc.c | 2 +-
1 file changed, 1 insertion(+)
AUD_open_out() may fail and return NULL. This may then lead to
a segmentation fault in memset() below. The memset() behaviour
is undefined if the pointer to the destination object is a null
pointer.
Add the missing error handling code.
Reviewed-by: Marc-André Lureau
Signed-off-by: Volker Rümelin
Since commit ac13a6b3fd ("audio: add Apple Sound Chip (ASC)
emulation") the Quadra 800 machine has an audio device. It is
not guaranteed that the default audio driver of the audio
subsystem will work correctly on all host systems. Therefore,
the 'none' audio driver should be used in all q800 tests.
As far as the emulated audio devices are concerned the pointer
returned by AUD_open_out() is an opaque handle. This includes
the NULL pointer. In this case, AUD_get_buffer_size_out() should
return a sensible buffer size instead of triggering a segmentation
fault. All other public AUD_*_out() and au
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 80 +-
> 1 file changed, 23 insertions(+), 57 deletions(-)
>
> diff --git a/target/riscv/cpu.c
A simple assignment automatically converts a void pointer type
to any other pointer type.
Reviewed-by: Marc-André Lureau
Signed-off-by: Volker Rümelin
---
audio/mixeng.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/audio/mixeng.c b/audio/mixeng.c
index 69f6549224.
The buffer size calculated by AUD_get_buffer_size_out() is often
incorrect. sw->hw->samples * sw->hw->info.bytes_per_frame is the
size of the mixing engine buffer in audio frames multiplied by
the size of one frame of the audio backend. Due to resampling or
format conversion, the size of the fronte
On Wed, May 07, 2025 at 02:46:47PM -0400, Jonah Palmer wrote:
> From: Eugenio Pérez
>
> Current memory operations like pinning may take a lot of time at the
> destination. Currently they are done after the source of the migration is
> stopped, and before the workload is resumed at the destinatio
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 127 +
> 1 file changed, 60 insertions(+), 67 deletions(-)
>
> diff --git a/target/riscv/cpu.c
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 61 +-
> 1 file changed, 28 insertions(+), 33 deletions(-)
>
> diff --git a/target/riscv/cpu.c
A few audio related fixes for 10.1.
The virtio-sound device is the first QEMU audio front end that supports
floating point samples. The audio subsystem is only partially prepared for
this. The commit message of patch 7/7 "audio: add float sample endianness
converters" has the details. The new c
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> While at it, constify it so that the RISCVCSR array in RISCVCPUDef
> can also be const.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.h| 15 ---
> target/riscv/cpu.c
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> In preparation for generalizing the custom CSR functionality,
> make the test return bool instead of int. Make the insertion_test
> optional, too.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu-qom.h | 1 +
> target/riscv/cpu.c | 79 +++---
> 2 files changed, 37 insertions(+), 43 deletions(-)
>
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 39 ---
> 1 file changed, 16 insertions(+), 23 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/targ
On Mon, May 12, 2025 at 7:54 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu-qom.h | 1 +
> target/riscv/cpu.c | 74 --
> 2 files changed, 21 insertions(+), 54 deletions(-)
>
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 113 +
> 1 file changed, 31 insertions(+), 82 deletions(-)
>
> diff --git a/target/riscv/cpu.c
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 58 ++
> 1 file changed, 17 insertions(+), 41 deletions(-)
>
> diff --git a/target/riscv/cpu.c
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> Profile CPUs reuse the instance_init function for bare CPUs; make them
> proper subclasses instead. Enabling a profile is now done based on the
> RISCVCPUDef struct: even though there is room for only one in RISCVCPUDef,
> subclasses check
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> Start from the top of the hierarchy: dynamic and vendor CPUs are just
> markers, whereas bare CPUs can have their instance_init function
> replaced by RISCVCPUDef.
>
> The only difference is that the maximum supported SATP mode has to
> be s
On 14/05/2025 9:36 am, Michael S. Tsirkin wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> On Thu, Feb 27, 2025 at 10:54:47AM +, CLEMENT MATHIEU--DRIF wrote:
>> From: Clement Mathie
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Wednesday, May 14, 2025 9:28 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; long...@lenovo.com;
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> Allow using RISCVCPUDef to replicate all the logic of custom .instance_init
> functions. To simulate inheritance, merge the child's RISCVCPUDef with
> the parent and then finally move it to the CPUState at the end of
> TYPE_RISCV_CPU's own
On Mon, May 12, 2025 at 7:53 PM Paolo Bonzini wrote:
>
> In preparation for adding a function to merge two RISCVCPUConfigs
> (pulling values from the parent if they are not overridden) annotate
> cpu_cfg_fields.h.inc with the default value of the fields.
>
> Signed-off-by: Paolo Bonzini
Reviewed
Consensus is to shelve this series, and eliminate target-specific
conditionals instead. But let me scribble down a few notes for
posterity just in case we ever take it off the shelf again.
Pierrick Bouvier writes:
> This new entry can be used in QAPI json to specify a runtime conditional
> to e
The Zilsd extension implementation is synchronized to riscv-zilsd v1.0.
lxx (1):
target/riscv: Add Zilsd and Zclsd extension support
target/riscv/cpu.c| 4 +
target/riscv/cpu_cfg.h| 2 +
target/riscv/insn16.decode| 8 ++
target/
From: lxx <1733205...@qq.com>
This patch adds support for the Zilsd and Zclsd extension,
which is documented at https://github.com/riscv/riscv-zilsd/releases/tag/v1.0
Co-developed-by: SUN Dongya
Co-developed-by: LIU Xu
Co-developed-by: ZHAO Fujin
---
target/riscv/cpu.c
Hi Cédric,
> -Original Message-
> From: Cédric Le Goater
> Sent: Wednesday, May 14, 2025 9:28 PM
> To: Steven Lee ; Peter Maydell
> ; Troy Lee ; Jamin Lin
> ; Andrew Jeffery
> ; Joel Stanley ; open
> list:ASPEED BMCs ; open list:All patches CC here
>
> Cc: Troy Lee ; long...@lenovo.com;
In cases where the scanout buffer is provided as a texture (e.g. Virgl)
we need to check to see if it has a linear memory layout or not. If
it doesn't have a linear layout, then blitting it onto the texture
associated with the display surface (which already has a linear layout)
seems to ensure that
To address the limitation that this option is incompatible with
remote clients, this patch series adds an option to select a
preferred codec and also enable gl=on option for clients that
are connected via the network. In other words, with this option
enabled (and the below linked Spice series merge
In the specific case where the display layer (virtio-gpu) is using
dmabuf, and if remote clients are enabled (-spice gl=on,port=),
it makes sense to limit the maximum (streaming) rate (refresh rate)
to a fixed value using the GUI refresh timer. Otherwise, the updates
or gl_draw requests would b
Newer versions of Spice server should be able to accept dmabuf
fds from Qemu for clients that are connected via the network.
In other words, when this option is enabled, Qemu would share
a dmabuf fd with Spice which would encode and send the data
associated with the fd to a client that could be loc
Giving users an option to choose a particular codec will enable
them to make an appropriate decision based on their hardware and
use-case.
Cc: Gerd Hoffmann
Cc: Marc-André Lureau
Cc: Dmitry Osipenko
Cc: Frediano Ziglio
Cc: Dongwon Kim
Signed-off-by: Vivek Kasireddy
---
qemu-options.hx | 5
Since most encoders/decoders (invoked by Spice) may not work with
tiled memory associated with a texture, we need to create another
texture that has linear memory layout and use that instead.
Note that, there does not seem to be a direct way to indicate to the
GL implementation that a texture's ba
While trying to export and obtain fds associated with a texture, it
is possible that the fds returned after eglExportDMABUFImageMESA()
call are -1. Therefore, we need to evaluate the value of all fds
and return false if any of them are -1.
Cc: Gerd Hoffmann
Cc: Marc-André Lureau
Cc: Dmitry Osipe
There are cases where we do not want the memory layout of a texture to
be tiled as the component processing the texture would not know how to
de-tile either via software or hardware. Therefore, ensuring that the
memory backing the texture has a linear layout is absolutely necessary
in these situati
This patch is purely mechanical, changing bool want_zero into an
unsigned int for bitwise-or of flags. As of this patch, all
implementations are unchanged (the old want_zero==true is now
mode==BDRV_WANT_PRECISE which is a superset of BDRV_WANT_ZERO); but
the callers in io.c that used to pass want_
Out of the five possible values for MirrorSyncMode, INCREMENTAL and
BITMAP are already rejected up front in mirror_start, leaving NONE,
TOP, and FULL as the remaining values that the code was collapsing
into a single bool is_none_mode. Furthermore, mirror_dirty_init() is
only reachable for modes T
From: Andrey Drobyshev
Move the definition from iotests/250 to common.rc. This is used to
detect real disk usage of sparse files. In particular, we want to use
it for checking subclusters-based discards.
Signed-off-by: Andrey Drobyshev
Reviewed-by: Alexander Ivanov
Reviewed-by: Alberto Garci
Prove that blockdev-mirror can now result in sparse raw destination
files, regardless of whether the source is raw or qcow2. By making
this a separate test, it was possible to test effects of individual
patches for the various pieces that all have to work together for a
sparse mirror to be success
Although the previous patch to change 'bool want_zero' into a bitmask
made no semantic change, it is now time to differentiate. When the
caller specifically wants to know what parts of the file read as zero,
we need to use lseek and actually reporting holes, rather than
short-circuiting and advert
QEMU has an optimization for a just-created drive-mirror destination
that is not possible for blockdev-mirror (which can't create the
destination) - any time we know the destination starts life as all
zeroes, we can skip a pre-zeroing pass on the destination. Recent
patches have added an improved
If we are going to punch holes in the mirror destination even for the
portions where the source image is unallocated, it is nicer to treat
the entire image as dirty and punch as we go, rather than pre-zeroing
the entire image just to re-do I/O to the allocated portions of the
image.
Signed-off-by:
Some BDS drivers have a cap on how much block status they can supply
in one query (for example, NBD talking to an older server cannot
inspect more than 4G per query; and qcow2 tends to cap its answers
rather than cross a cluster boundary of an L1 table). Although the
existing callers of bdrv_co_is
Commit 5791ba52 (v9.2) pre-initialized ret in mirror_dirty_init to
silence a false positive compiler warning, even though in all code
paths where ret is used, it was guaranteed to be reassigned
beforehand. But since the function returns -errno, and -1 is not
always the right errno, it's better to
When mirroring, the goal is to ensure that the destination reads the
same as the source; this goal is met whether the destination is sparse
or fully-allocated (except when explicitly punching holes, then merely
reading zero is not enough to know if it is sparse, so we still want
to punch the hole).
The two callers to a mirror job (drive-mirror and blockdev-mirror) set
zero_target precisely when sync mode == FULL, with the one exception
that drive-mirror skips zeroing the target if it was newly created and
reads as zero. But given the previous patch, that exception is
equally captured by targ
Mirroring a completely sparse image to a sparse destination should be
practically instantaneous. It isn't yet, but the test will be more
realistic if it has some non-zero to mirror as well as the holes.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-ID: <20250509204341.3553601-2
When doing a sync=full mirroring, we can skip pre-zeroing the
destination if it already reads as zeroes and we are not also trying
to punch holes due to detect-zeroes. With this patch, there are fewer
scenarios that have to pass in an explicit target-is-zero, while still
resulting in a sparse dest
The following changes since commit 864813878951b44e964eb4c012d832fd21f8cc0c:
Merge tag 'pull-loongarch-20250514' of https://github.com/gaosong715/qemu
into staging (2025-05-14 07:16:57 -0400)
are available in the Git repository at:
https://repo.or.cz/qemu/ericb.git tags/pull-nbd-
There are some optimizations that require knowing if an image starts
out as reading all zeroes, such as making blockdev-mirror faster by
skipping the copying of source zeroes to the destination. The
existing bdrv_co_is_zero_fast() is a good building block for answering
this question, but it tends
On Wed, May 14, 2025 at 05:09:14PM -0500, Eric Blake wrote:
> On Fri, May 09, 2025 at 03:40:26PM -0500, Eric Blake wrote:
> > The two callers to a mirror job (drive-mirror and blockdev-mirror) set
> > zero_target precisely when sync mode == FULL, with the one exception
> > that drive-mirror skips z
Hi Eugenio,
On 5/14/2025 8:49 AM, Eugenio Perez Martin wrote:
On Wed, May 7, 2025 at 8:47 PM Jonah Palmer wrote:
Current memory operations like pinning may take a lot of time at the
destination. Currently they are done after the source of the migration is
stopped, and before the workload is r
add detailed information on the instruction opcode encoding
format for LEX/VEX/EVEX prefix, map and opcode encoding, the
operand encoding format, the field order encoding format and
notes on instruction synthesis for parameterized opcodes.
these docs are from an external project with an MIT licens
the x86-mini metadata tablegen python script reads instruction
set metadata CSV files and translates them into tables used
by the disassembler. it generates the following tables:
- x86_opc_table that encodes prefix, map, and opcode
- x86_opr_table that encodes instruction operands
- x86_ord_table
a port of an embeddable x86-mini disassembler to QEMU.
- https://github.com/michaeljclark/qemu/tree/x86-mini-v4
# x86-mini disassembler
the x86-mini library is a lightweight x86 encoder, decoder, and
disassembler that uses extensions to the Intel instruction set
metadata format to encode modern
This series exposes all qmp commands for any target unconditionally, allowing to
compile QAPI generated code without any TARGET conditionals.
Based on original RFC from Daniel P. Berrangé:
https://lore.kernel.org/qemu-devel/20250508135816.673087-1-berra...@redhat.com/
v1
--
- remove file qapi/mi
From: Philippe Mathieu-Daudé
We'd like to have some unified QAPI schema. Having a structure field
conditional to a target being built in is not very practical.
While @deprecated-props is only used by s390x target, it is generic
enough and could be used by other targets (assuming we expand
CpuMod
There is no more QAPI files that need to be compiled per target, so we
can remove this.
Signed-off-by: Pierrick Bouvier
---
qapi/meson.build | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/qapi/meson.build b/qapi/meson.build
index e038b636c9d..7582c2b5bcf 100644
-
From: Daniel P. Berrangé
This file is now empty and can thus be removed.
Observe the pre-existing bug with s390-skeys.c and target/i386/monitor.c
both including qapi-commands-misc-target.h despite not requiring it.
Signed-off-by: Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier
---
qapi/mi
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the SEV confidential
virtualization commands, moving them to the recently introduced
misc-i386.json QAPI file, given they are inherantly i386 specific
commands.
Signed-off-by: Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the Xen event channel
commands, moving them to the recently introduced misc-i386.json
QAPI file, given they are inherantly i386 specific commands.
Signed-off-by: Daniel P. Berrangé
Acked-by: David Woodhouse
Signed-off-by: Pie
From: Daniel P. Berrangé
This removes the TARGET_* conditions from all the CPU commands
that are conceptually target independent. Top level stubs are
provided to cope with targets which do not currently implement
all of the commands.
Signed-off-by: Daniel P. Berrangé
Signed-off-by: Pierrick Bou
From: Daniel P. Berrangé
This gives some more context about the behaviour of the commands in
unsupported guest configuration or platform scenarios.
Signed-off-by: Daniel P. Berrangé
Signed-off-by: Pierrick Bouvier
---
qapi/misc-target.json | 43 ---
1 f
Signed-off-by: Pierrick Bouvier
---
qapi/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/meson.build b/qapi/meson.build
index 7582c2b5bcf..6cc3afce721 100644
--- a/qapi/meson.build
+++ b/qapi/meson.build
@@ -140,6 +140,6 @@ foreach output : qapi_nonmodule_outp
From: Daniel P. Berrangé
This removes the TARGET_S390X and CONFIG_KVM conditions from the
CPU commands that are conceptually specific to s390x. Top level
stubs are provided to cope with non-s390x targets, or builds
without KVM.
The removal of CONFIG_KVM is justified by the fact there is no
conce
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the rtc-reset-reinjection
command. This requires providing a QMP command stub for non-i386 target.
This in turn requires moving the command out of misc-target.json, since
that will trigger symbol poisoning errors when built from
From: Daniel P. Berrangé
This removes the TARGET_I386 condition from the SGX confidential
virtualization commands, moving them to the recently introduced
misc-i386.json QAPI file, given they are inherantly i386 specific
commands.
Observe a pre-existing bug that the "SGXEPCSection" struct lacked
From: Daniel P. Berrangé
This removes the TARGET_ARM condition from the query-gic-capability
command. This requires providing a QMP command stub for non-ARM targets.
This in turn requires moving the command out of misc-target.json, since
that will trigger symbol poisoning errors when built from t
For the series:
Reviewed-by: Si-Wei Liu
On 5/7/2025 11:46 AM, Jonah Palmer wrote:
Current memory operations like pinning may take a lot of time at the
destination. Currently they are done after the source of the migration is
stopped, and before the workload is resumed at the destination. Thi
* Peter Xu (pet...@redhat.com) wrote:
> On Wed, May 14, 2025 at 08:29:53PM +, Dr. David Alan Gilbert wrote:
> > * Peter Xu (pet...@redhat.com) wrote:
> > > A new parameter "-a" is added to "info migrate" to dump all info, while
> > > when not specified it only dumps the important ones. When at
On Fri, May 09, 2025 at 03:40:26PM -0500, Eric Blake wrote:
> The two callers to a mirror job (drive-mirror and blockdev-mirror) set
> zero_target precisely when sync mode == FULL, with the one exception
> that drive-mirror skips zeroing the target if it was newly created and
> reads as zero. But
On 5/12/25 3:00 AM, Sairaj Kodilkar wrote:
On 5/2/2025 7:46 AM, Alejandro Jimenez wrote:
- if (pte & AMDVI_DEV_TRANSLATION_VALID) {
- level = get_pte_translation_mode(pte);
- if (level >= 7) {
- trace_amdvi_mode_invalid(level, addr);
+ if (!(pte & AMDVI_DEV_
Richard,
On 4/25/25 12:23 PM, Richard Henderson wrote:
Do not examine a random host return address, but
properly compute the next pc for the guest cpu.
Fixes: f18637cd611 ("RISC-V: Add misa runtime write support")
Signed-off-by: Richard Henderson
---
target/riscv/csr.c | 22 +
On Wed, May 14, 2025 at 08:29:53PM +, Dr. David Alan Gilbert wrote:
> * Peter Xu (pet...@redhat.com) wrote:
> > A new parameter "-a" is added to "info migrate" to dump all info, while
> > when not specified it only dumps the important ones. When at it, reorg
> > everything to make it easier to
On Fri, May 09, 2025 at 11:22:10AM -0400, Peter Xu wrote:
> On Tue, May 06, 2025 at 02:21:08PM +0100, Peter Maydell wrote:
> > On Mon, 5 May 2025 at 23:23, Joe Komlodi wrote:
> > >
> > > address_space_write_rom_internal can take in a NULL pointer for ptr if
> > > it's only doing cache flushes inst
On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
The tctx "signaling" registers (PIPR, CPPR, NSR) raise an interrupt on
the target CPU thread. The POOL and PHYS rings both raise hypervisor
interrupts, so they both share one set of signaling registers in the
PHYS ring. The PHYS NSR register contain
On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
Further split xive_tctx_pipr_update() by splitting out a new function
that is used to re-compute the PIPR from IPB. This is generally only
used with XIVE1, because group interrputs require more logic.
Previous upstreaming was focused only on XIVE
* Peter Xu (pet...@redhat.com) wrote:
> A new parameter "-a" is added to "info migrate" to dump all info, while
> when not specified it only dumps the important ones. When at it, reorg
> everything to make it easier to read for human.
>
> The general rule is:
>
> - Put important things at the
On 5/12/25 2:45 AM, Sairaj Kodilkar wrote:
On 5/2/2025 7:45 AM, Alejandro Jimenez wrote:
@@ -1035,13 +1070,13 @@ static void
amdvi_do_translate(AMDVIAddressSpace *as, hwaddr addr,
return;
}
- if (!amdvi_get_dte(s, devid, entry)) {
- return;
- }
+ dte_ret =
Am 08.05.2025 um 16:09 hat Fiona Ebner geschrieben:
> From: Andrey Drobyshev
>
> This case is catching potential deadlock which takes place when job-dismiss
> is issued when I/O requests are processed in a separate iothread.
>
> See https://mail.gnu.org/archive/html/qemu-devel/2025-04/msg04421.h
On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
xive_tctx_pipr_update() is used for multiple things. In an effort
to make things simpler and less overloaded, split out the function
that is used to present a new interrupt to the tctx.
Why is this a separate commit fro 30? The change here does
A new parameter "-a" is added to "info migrate" to dump all info, while
when not specified it only dumps the important ones. When at it, reorg
everything to make it easier to read for human.
The general rule is:
- Put important things at the top
- Reuse a single line when things are very rel
With commit 82137e6c8c ("migration: enforce multifd and postcopy preempt to
be set before incoming"), and if postcopy preempt / multifd is enabled, one
cannot setup any capability because these checks would always fail.
(qemu) migrate_set_capability xbzrle off
Error: Postcopy preempt must be set b
v2:
- Dropped patch 2, dump globals only if "-a" in the last patch [Dave]
- Keep using "Throughput" for dumping ->mbps [Juraj]
- Rearranged some more, e.g. put xbzrle/globals under -a too, added indents
for the global dump, etc.
Patch 1 was a bug I found set capabilities, so it's pretty separate
On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
A group interrupt that gets preempted by a higher priority interrupt
delivery must be redistributed otherwise it would get lost.
Reviewed-by: Michael Kowal
Thanks, MAK
Signed-off-by: Nicholas Piggin
---
hw/intc/xive2.c | 14 --
On 5/11/2025 10:10 PM, Nicholas Piggin wrote:
Have the match_nvt method only perform a TCTX match but don't present
the interrupt, the caller presents. This has no functional change, but
allows for more complicated presentation logic after matching.
I always found the count meaning less sinc
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