Am 29.04.25 um 16:09 schrieb Matthew Rosato:
On 4/29/25 3:45 AM, Christian Borntraeger wrote:
Am 29.04.25 um 09:37 schrieb David Hildenbrand:
[...]
The only problem I see is with vfio devices is the new "memory pinned" mode. [1]
There, we'd have to check if any such device is around (discardin
The test cases for the ASPEED HACE model were originally placed in
aspeed_hace-test.c. However, this test file only supports ARM32. To enable
compatibility with all ASPEED SoCs, including the AST2700, which uses the
AArch64 architecture, this update introduces a new source file,
aspeed-hace-utils.c
Introduced SHA-384 test functions to verify hashing operations.
Extended support for scatter-gather ("_sg") and accumulation ("_accum") tests.
Updated test result vectors for SHA-384 validation.
Signed-off-by: Jamin Lin
---
tests/qtest/aspeed-hace-utils.h | 6 ++
tests/qtest/aspeed-hace-utils.
Added "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI", "HACE_HASH_KEY_BUFF_HI"
registers to store upper 32 bits.
Updated "write_regs" to handle 64-bit source and digest addresses.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
tests/qtest/aspeed-hace-utils.h | 3 +++
tests/qtest/aspeed
Currently, the hash data source and digest result buffer addresses are set to
32-bit. However, the AST2700 CPU is a 64-bit Cortex-A35 architecture, and its
DRAM base address is also 64-bit.
To support AST2700, update the hash data source address and digest result buffer
address to use 64-bit addre
According to the AST2700 design, the data source address is 64-bit, with
R_HASH_SRC_HI storing bits [63:32] and R_HASH_SRC storing bits [31:0].
Similarly, the digest address is 64-bit, with R_HASH_DIGEST_HI storing bits
[63:32] and R_HASH_DIGEST storing bits [31:0]. The HMAC key buffer address is
Added "src_hi" and "dest_hi" fields to "AspeedMasks" for 64-bit addresses test.
Updated "aspeed_test_addresses" to validate "HACE_HASH_SRC_HI" and
"HACE_HASH_DIGEST_HI".
Ensured correct masking of 64-bit addresses by checking both lower and upper
32-bit registers.
Signed-off-by: Jamin Lin
Reviewe
11.05.2025 10:36, Volker Rümelin wrote:
A few audio related fixes for 10.1.
The virtio-sound device is the first QEMU audio front end that supports floating point
samples. The audio subsystem is only partially prepared for this. The commit message of
patch 7/7 "audio: add float sample endianne
Added "key" and "key_hi" fields to "AspeedMasks" for 64-bit addresses test.
Updated "aspeed_test_addresses" to validate "HACE_HASH_KEY_BUFF" and
"HACE_HASH_KEY_BUFF_HI".
Ensured correct masking of 64-bit addresses by checking both lower and upper
32-bit registers.
Signed-off-by: Jamin Lin
Reviewe
The digest_addr is set to "src_addr + 0x100", where src_addr is the DRAM
base address. However, the value 0x100 (16MB) is too large because the
AST1030 does not support DRAM, and its SRAM size is only 768KB.
A range size of 0x1 (64KB) is sufficient for HACE test cases, as the test
vect
To enhance code readability and prevent potential buffer overflows or unintended
size assumptions, this commit updates all fixed-size array declarations to use
explicit array sizes.
Signed-off-by: Jamin Lin
---
tests/qtest/aspeed-hace-utils.c | 26 +-
1 file changed, 13 i
The HACE model in AST2600 and AST1030 is identical. Referencing the AST2600
test cases, new tests have been created for AST1030.
Implemented test functions for SHA-256, SHA-384, SHA-512, and MD5.
Added scatter-gather and accumulation test variants.
For AST1030, the HACE controller base address sta
The HACE models in AST2600 and AST2700 are nearly identical. Based on the
AST2600 test cases, new tests have been added for AST2700.
Implemented test functions for SHA-256, SHA-384, SHA-512, and MD5.
Added scatter-gather and accumulation test variants.
For AST2700, the HACE controller base address
Introduced "test_sha384_ast2600" to validate SHA-384 hashing.
Added "test_sha384_sg_ast2600" for scatter-gather SHA-384 verification.
Implemented "test_sha384_accum_ast2600" to test SHA-384 accumulation.
Registered new test cases in "main" to ensure execution.
Signed-off-by: Jamin Lin
Reviewed-by
Reordered the aspeed test list to keep the alphabetical order.
No functional changes in test behavior.
Signed-off-by: Jamin Lin
---
tests/qtest/meson.build | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index 3136d
Introduced "trace_aspeed_hace_hash_addr", "trace_aspeed_hace_hash_sg",
"trace_aspeed_hace_read", "trace_aspeed_hace_hash_execute_acc_mode",
and "trace_aspeed_hace_write" trace events.
Signed-off-by: Jamin Lin
---
hw/misc/aspeed_hace.c | 11 +++
hw/misc/trace-events | 7 +++
2 files
According to the AST2700 design, the data source address is 64-bit, with
R_HASH_SRC_HI storing bits [63:32] and R_HASH_SRC storing bits [31:0].
Similarly, the digest address is 64-bit, with R_HASH_DEST_HI storing bits
[63:32] and R_HASH_DEST storing bits [31:0].
To maintain compatibility with old
Refactor "do_hash_operation()" by extracting hash execution and result handling
into dedicated helper functions:
- "hash_write_digest_and_unmap_iov()": Writes the digest result to memory and
unmaps IOVs after processing.
- "hash_execute_non_acc_mode()": Handles one-shot (non-accumulated) hash
1. Added "hace_hexdump()" to dump a contiguous buffer using qemu_hexdump.
2. Added "hace_iov_hexdump()" to flatten and dump scatter-gather source vectors.
3. Introduced a new trace event: "aspeed_hace_hexdump".
Signed-off-by: Jamin Lin
---
hw/misc/aspeed_hace.c | 46 +
Dynamically allocate the register array by removing the hardcoded
ASPEED_HACE_NR_REGS macro.
To support different register sizes across SoC variants, introduce a new
"nr_regs" class attribute and replace the static "regs" array with dynamically
allocated memory.
Add a new "aspeed_hace_unrealize"
Enable accumulative mode for direct access mode operations. In direct access
mode, only a single source buffer is used, so the "iovec" count is set to 1.
If "acc_mode" is enabled:
1. Accumulate "total_req_len" with the current request length ("plen").
2. Check for padding and determine whether this
The AST2700 CPU, based on the Cortex-A35, is a 64-bit processor, and its DRAM
address space is also 64-bit. To support future AST2700 updates, the source
hash buffer address data type is being updated to 64-bit.
Introduces the "hash_get_source_addr()" helper function to extract the source
hash
bu
Renaming R_HASH_DEST to R_HASH_DIGEST for better semantic clarity.
The AST2700 CPU, based on the Cortex-A35, features a 64-bit DRAM address space.
To prepare for future AST2700 support, this change introduces a new helper
function hash_get_digest_addr() to encapsulate digest address extraction log
To improve code readability and maintainability, this commit refactors the hash
buffer preparation logic from "do_hash_operation()" into two helper functions:
- "hash_prepare_direct_iov()": handles non-scatter-gather (direct) mode.
- "hash_prepare_sg_iov()": handles scatter-gather mode with accumu
Currently, users define multiple local variables within different if-statements.
To improve readability and maintain consistency in variable naming, rename the
variables accordingly.
Introduced "sg_addr" to clearly indicate the scatter-gather mode buffer address.
Signed-off-by: Jamin Lin
---
hw/
v1:
1. Added support for 64-bit DMA in the HACE model
2. Refactored the do_hash operation in the HACE model
3. Fixed a crash caused by out-of-bound memory access in HACE
4. Added more trace events and implemented dumping of source hash data and
resulting digests to improve debugging
5. Ref
On Fri, 9 May 2025 at 20:00, Peter Xu wrote:
> diff --git a/tests/qtest/migration/precopy-tests.c
> b/tests/qtest/migration/precopy-tests.c
> index a575791c72..441a65bcf5 100644
> --- a/tests/qtest/migration/precopy-tests.c
> +++ b/tests/qtest/migration/precopy-tests.c
> @@ -34,7 +34,6 @@
> #def
Am 11.05.25 um 13:52 schrieb Mark Cave-Ayland:
> On 11/05/2025 08:38, Volker Rümelin wrote:
>
>> AUD_open_out() may fail and return NULL. This may then lead to
>> a segmentation fault in memset() below. The memset() behaviour
>> is undefined if the pointer to the destination object is a null
>> poi
The necessary plumbing for side- and extra mouse buttons to reach
usb-tablet is already done. But the descriptor advertises three buttons
max. Increase this to 5. Buttons are now identical to usb-mouse.
Signed-off-by: Thomas Lambertz
---
hw/usb/dev-hid.c | 6 +++---
1 file changed, 3 insertions
Hi Paolo,
Kindly ping. I think this series is still needed. Could you pls take
a look at here?
Thanks,
Zhao
On Mon, May 12, 2025 at 12:32:31PM +0300, Michael Tokarev wrote:
> Date: Mon, 12 May 2025 12:32:31 +0300
> From: Michael Tokarev
> Subject: Re: [PATCH 1/4] i386/cpu: Fix number of address
On Mon, May 12, 2025 at 12:35:35PM +0300, Michael Tokarev wrote:
> Date: Mon, 12 May 2025 12:35:35 +0300
> From: Michael Tokarev
> Subject: Re: [PATCH v5 01/11 for v9.2?] i386/cpu: Mark avx10_version
> filtered when prefix is NULL
>
> On 21.12.2024 00:04, Michael Tokarev wrote:
> > 06.11.2024 06
Hi,
On Tue, 2025-05-13 at 00:37 +, Kim, Dongwon wrote:
> Hi,
>
> > Subject: [PATCH 8/9] ui/gtk-gl-area: Render guest content with
> > padding in
> > fixed-scale mode
> >
> > In fixed-scale mode (zoom-to-fit=false), we expect that scale
> > should not
> > change, meaning that if window size i
Hi Dongwon,
On Tue, 2025-05-13 at 01:26 +, Kim, Dongwon wrote:
> Hi,
>
> > Subject: [PATCH 3/9] gtk/ui: Introduce helper gd_update_scale
> >
> > The code snippet updating scale_x/scale_y is general and will be
> > used in next
> > patch. Make it a function.
> >
> > Signed-off-by: Weifeng Li
and bdrv_dirty_bitmap_reverse() helper
Signed-off-by: Andrey Zhadchenko
---
block/dirty-bitmap.c | 9 +
include/block/block_int-io.h | 1 +
include/qemu/hbitmap.h | 8
util/hbitmap.c | 15 +++
4 files changed, 33 insertions(+)
diff --g
API to manipulate meta bitmap was removed with commit 0c88f1970c76
Signed-off-by: Andrey Zhadchenko
---
util/hbitmap.c | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/util/hbitmap.c b/util/hbitmap.c
index d9a1dabc63..16674f33e4 100644
--- a/util/hbitmap.c
+
until the non-accessible area
Signed-off-by: Andrey Zhadchenko
---
block/copy-before-write.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/block/copy-before-write.c b/block/copy-before-write.c
index 5f5b3e7515..81d7f40b13 100644
--- a/block/copy-before-w
Recently we had some reports about stuck full backups: running backup
job had 0 progress for more than an hour. This reproduced only on big
images, at least 30TB of allocated space.
We are using snapshot filter + cbw filter + blockdev-backup. The
discovered problem lies in access bitmap in cbw filt
HBitmaps allow us to search set bits pretty fast. On the contrary,
when searching zeroes, we may be forced to fully traverse the lower
level.
When we run blockdev-backup with mode=full on top of snapshot filter
+ cbw filter, the job fills copy bitmap by calling block_status()
with range (X, virtual
>
>
> Jamin, could you check please ?
>
>
> Thanks,
>
> C.
>
>
> On 5/9/25 19:50, Fabiano Rosas wrote:
> > ASAN spotted a leak of the memory used to hold the tmp_path:
> >
> > Direct leak of 35 byte(s) in 1 object(s) allocated from:
> > #0 0x55e29aa96da9 in
> malloc ../projects/compiler-
Hi,
> Subject: [PATCH 3/9] gtk/ui: Introduce helper gd_update_scale
>
> The code snippet updating scale_x/scale_y is general and will be used in next
> patch. Make it a function.
>
> Signed-off-by: Weifeng Liu
> ---
> include/ui/gtk.h | 2 ++
> ui/gtk.c | 30 +++---
Recently, we removed ipv6 restriction[0] from RDMA migration, add a
test for it.
[0]
https://lore.kernel.org/qemu-devel/20250326095224.9918-1-jinpu.w...@ionos.com/
Cc: Jack Wang
Cc: Michael R. Galaxy
Cc: Peter Xu
Cc: Yu Zhang
Reviewed-by: Jack Wang
Signed-off-by: Li Zhijian
---
V4:
adjus
On 12/05/2025 21:56, Peter Xu wrote:
> On Mon, May 12, 2025 at 02:01:35PM +0800, Li Zhijian wrote:
>> Recently, we removed ipv6 restriction[0] from RDMA migration, add a
>> test for it.
>>
>> [0]
>> https://lore.kernel.org/qemu-devel/20250326095224.9918-1-jinpu.w...@ionos.com/
>>
>> Cc: Jack Wan
On 5/12/25 5:54 PM, Pierrick Bouvier wrote:
On 5/12/25 11:33 AM, Daniel P. Berrangé wrote:
diff --git a/stubs/monitor-i386-rtc.c b/stubs/monitor-i386-rtc.c
new file mode 100644
index 00..ee2e60d95b
--- /dev/null
+++ b/stubs/monitor-i386-rtc.c
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier:
Hi PMM:
From: Peter Maydell
Sent: Sunday, May 11, 2025 9:42 PM
To: Guenter Roeck
Cc: CS20 KFTing ; qemu-...@nongnu.org;
qemu-devel@nongnu.org; Hao Wu
Subject: Re: [PATCH] hw/arm: Add missing psci_conduit to NPCM8XX SoC boot info
On Tue, 18 Mar 2025 at 19:54, Guenter Roeck wrote:
>
> On 3/18
On 5/12/25 11:33 AM, Daniel P. Berrangé wrote:
diff --git a/stubs/monitor-i386-rtc.c b/stubs/monitor-i386-rtc.c
new file mode 100644
index 00..ee2e60d95b
--- /dev/null
+++ b/stubs/monitor-i386-rtc.c
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include "qemu/osdep.
On 5/9/25 11:57 PM, Markus Armbruster wrote:
The build system would need generate an input document for the
QAPI visitor that defines whether each constant is set to true
or false, based on suitable CONFIG/TARGET conditions from meson.
I think the conditions that are evaluated at build time in
Hi,
> Subject: [PATCH 8/9] ui/gtk-gl-area: Render guest content with padding in
> fixed-scale mode
>
> In fixed-scale mode (zoom-to-fit=false), we expect that scale should not
> change, meaning that if window size is larger than guest surface, padding is
# @zoom-to-fit: Zoom guest display to fit
On 5/11/25 6:14 AM, Julian Ganz wrote:
We recently introduced plugin API for the registration of callbacks for
discontinuity events, specifically for interrupts, exceptions and host
call events. The callback receives various bits of information,
including the VCPU index and PCs.
This change intr
On 5/11/25 6:13 AM, Julian Ganz wrote:
The plugin API allows registration of callbacks for a variety of VCPU
related events, such as VCPU reset, idle and resume. In addition, we
recently introduced API for registering callbacks for discontinuity
events, specifically for interrupts, exceptions and
On Sun, May 11, 2025 at 11:18 PM Julian Ganz wrote:
>
> We recently introduced API for registering callbacks for trap related
> events as well as the corresponding hook functions. Due to differences
> between architectures, the latter need to be called from target specific
> code.
>
> This change
On 5/11/25 6:13 AM, Julian Ganz wrote:
The plugin API allows registration of callbacks for a variety of VCPU
related events, such as VCPU reset, idle and resume. In addition to
those events, we recently defined discontinuity events, which include
traps.
This change introduces a function to regis
On 5/11/25 6:13 AM, Julian Ganz wrote:
We recently introduced new plugin API for registration of discontinuity
related callbacks. This change introduces a minimal plugin showcasing
the new API. It simply counts the occurances of interrupts, exceptions
and host calls per CPU and reports the counts
Hi Julian,
On 5/11/25 6:13 AM, Julian Ganz wrote:
The plugin API allows registration of callbacks for a variety of VCPU
related events, such as VCPU reset, idle and resume. However, traps of
any kind, i.e. interrupts or exceptions, were previously not covered.
These kinds of events are arguably
Commit 56b1f50e3c10 ("hw/i386/pc: Wire RTC ISA IRQs in south bridges")
attempted to refactor RTC IRQ wiring which was previously done in
pc_basic_device_init() but forgot about the isapc machine. Fix this by
wiring in the code section dedicated exclusively to the isapc machine.
Resolves: https://g
On Mon, May 12, 2025 at 08:32:37AM -0700, Steve Sistare wrote:
> Modify memory_get_xlat_addr and vfio_get_xlat_addr to return the memory
> region that the translated address is found in. This will be needed by
> CPR in a subsequent patch to map blocks using IOMMU_IOAS_MAP_FILE.
>
> Also return t
On 5/12/25 11:39 AM, Daniel P. Berrangé wrote:
On Sat, May 10, 2025 at 11:28:59AM +0200, Markus Armbruster wrote:
PATCH 10 empties out and deletes qapi/machine-target.json. PATCH 04
empties out qapi/misc-target.json without deleting it. Missing:
* Delete qapi/misc-target.json
* Delete entry
On Mon, May 12, 2025 at 03:16:34PM +, Chaney, Ben wrote:
> Hello,
>
> When live migrating to a destination host with pmem there is a very
> long downtime where the guest is paused. In some cases, this can be as high
> as 5 minutes, compared to less than one second in the good case.
>
On Thu, May 08, 2025 at 05:20:44PM +0100, Alberto Faria wrote:
If you respin, please add something to the commit description explaining
that an earlier commit already updated
block/export/virtio-blk-handler.c:virtio_blk_process_req() to handle FUA
requests.
> Signed-off-by: Alberto Faria
> ---
>
On Thu, May 08, 2025 at 05:20:44PM +0100, Alberto Faria wrote:
> Signed-off-by: Alberto Faria
> ---
> block/export/vduse-blk.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Stefan Hajnoczi
signature.asc
Description: PGP signature
On Thu, May 08, 2025 at 05:20:43PM +0100, Alberto Faria wrote:
> Signed-off-by: Alberto Faria
> ---
> block/export/vhost-user-blk-server.c| 1 +
> contrib/vhost-user-blk/vhost-user-blk.c | 16 +--
> hw/block/vhost-user-blk.c | 3 ++
> hw/core/machine.c
On Fri, Mar 07, 2025 at 08:14:38PM +0100, Mauro Carvalho Chehab wrote:
> The current code is actually dependent on having just one error
> structure with a single source, as any change there would cause
> migration issues.
>
> As the number of sources should be arch-dependent, as it will depend on
From: Markus Armbruster
strict = True implies warn_unused_configs = True.
Signed-off-by: Markus Armbruster
Signed-off-by: John Snow
---
python/setup.cfg | 1 -
1 file changed, 1 deletion(-)
diff --git a/python/setup.cfg b/python/setup.cfg
index d21304cadd1..d7f5dc7bafe 100644
--- a/python/se
This restores the linting baseline in qapidoc. The order of some imports
change slightly here due to configuring isort a little better:
previously, isort was having difficulty understanding that "compat" and
"qapidoc_legacy" were local modules because docs/sphinx "isn't a python
package". Configuri
We pin all dependencies for the "check-minreqs" test because pip lacks a
dependency resolver that installs "the oldest possible package that
meets dependency criteria". So, in order to test our stated minimum
requirements, we pin all of our dependencies (and their dependencies,
transitively) at the
Update the python tests to also check QAPI and the QAPI Sphinx
extensions. The docs/sphinx/qapidoc_legacy.py file is not included in
these checks, as it is destined for removal soon. mypy is also not
called on the QAPI Sphinx extensions, owing to difficulties supporting
Sphinx 3.x - 8.x while maint
Since the previous commit, python/setup.cfg applies to scripts/qapi/ as
well. Configuration files in scripts/qapi/ override python/setup.cfg.
scripts/qapi/.flake8 and scripts/qapi/.isort.cfg actually match
python/setup.cfg exactly, and can go.
The differences between scripts/qapi/mypy.ini and py
Hiya, this series turns on automated linting for scripts/qapi,
docs/sphinx/qapidoc.py and docs/sphinx/qapi_domain.py.
This includes flake8/isort/pylint/mypy for scripts/qapi, but omits mypy
from the Sphinx plugins owing to my inability to strictly type the
extensions given the wide versions of Sph
This restores the linting baseline in QAPI.
Signed-off-by: John Snow
---
scripts/qapi/backend.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/scripts/qapi/backend.py b/scripts/qapi/backend.py
index 14e60aa67af..49ae6ecdd33 100644
--- a/scripts/qapi/backend.py
+++ b/scripts/qapi/backend.
On Thu, May 08, 2025 at 05:20:42PM +0100, Alberto Faria wrote:
> @@ -828,13 +832,16 @@ static int virtio_blk_handle_request(VirtIOBlockReq
> *req, MultiReqBuffer *mrb)
>
> type = virtio_ldl_p(vdev, &req->out.type);
>
> -/* VIRTIO_BLK_T_OUT defines the command direction. VIRTIO_BLK_T_B
On Thu, May 08, 2025 at 05:20:41PM +0100, Alberto Faria wrote:
> Signed-off-by: Alberto Faria
> ---
> include/standard-headers/linux/virtio_blk.h | 4
> 1 file changed, 4 insertions(+)
Reviewed-by: Stefan Hajnoczi
signature.asc
Description: PGP signature
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1ca6307c72e..1656de3dcca 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -922,6 +922,17 @@ void x86_cpu_vendor
While Bochs's algorithms are pretty solid, there are small opportunities
to improve them or to make their logic more similar to TCG's handling
of condition codes.
- use a single bit for the difference between bits 0..7 of result and PF.
This is useful because "set only ZF" is not a common case.
-
While we model a 16-elements RX FIFO since the PL011 model was
introduced in commit cdbdb648b7c ("ARM Versatile Platform Baseboard
emulation"), we only read 1 char at a time!
Have can_receive() return how many elements are available, and use that
in receive().
This is the Rust version of commit 3
decode->op[N].ptr can contain either a host pointer (!) in CPUState
or a guest virtual address. Pass the whole struct to read_val_ext
and write_val_ext, so that it can decide the contents based on the
operand type.
Signed-off-by: Paolo Bonzini
---
target/i386/emulate/x86_decode.h | 9 ++-
tar
From: Pawan Gupta
When a system is not affected by Indirect Target Selection (ITS)
vulnerability, VMMs set ITS_NO bit in MSR IA32_ARCH_CAPABILITIES to let the
guest know that it is not affected.
Make it available to guests.
Signed-off-by: Pawan Gupta
Link:
https://lore.kernel.org/r/8c1797e488
Move it there so that it can be done before the TSS trap bit is
processed.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 72
1 file changed, 41 insertions(+), 31 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_h
Errors about TCI are pointless if only tools are being built; suppress
them even if the user did not specify --disable-tcg.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
meson.build | 10 ++
accel/tcg/meson.build | 2 +-
This brings in the userspace TDX API.
Reviewed-by: Xiaoyao Li
Signed-off-by: Paolo Bonzini
---
linux-headers/asm-x86/kvm.h | 71 +
linux-headers/linux/kvm.h | 1 +
2 files changed, 72 insertions(+)
diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/
In preparation of having a TX FIFO, rename the RX FIFO methods.
This is the Rust version of commit 40871ca758cf ("hw/char/pl011:
Rename RX FIFO methods").
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
Signed-off-by: Paolo Bonzini
---
rust/hw/char/pl011/src/device.rs | 8 --
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 36
1 file changed, 27 insertions(+), 9 deletions(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index cda32ee6784..55216e0d249 100644
--- a/target/i386/tcg/d
Just use cc_dst and cc_src for the same purpose.
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 6
target/i386/emulate/x86_emu.c | 4 +--
target/i386/emulate/x86_flags.c | 55 -
3 files changed, 29 insertions(+), 36 deletions(-)
diff
From: Zheng Huang
This patch fixes an assertion error in isa_bus_get_irq() in
/hw/isa/isa-bus.c by adding a constraint to the irq property.
Patch v1 misused ISA_NUM_IRQS, pls ignore that.
Signed-off-by: Zheng Huang
Link: https://lore.kernel.org/r/6d228069-e38f-4c46-813f-ed5c4...@gmail.com
S
Now that we can do so after the error code has been pushed, raising
the #DB exception for task-switch traps is trivial.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/seg_helper.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/i386/tcg/seg_helper.c b/target
Just detect compiler support and always enable the optimizations if
it is avilable; warn if the user did request AVX2/AVX512 use via
-Dx86_version= but the intrinsics are not available.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
meson.build
All dependencies that are in common_ss (which includes system_ss) automatically
have their include path added when building the target-specific files. So the
hack in ui/meson.build is not needed anymore since commit 727bb5b477e ("meson:
pick libfdt from common_ss when building target-specific file
Since modinfo support was added, Meson fixed several issues with
extract_objects and compile_commands.json lookups can be simplified.
If the lookup uses the object file as key, there is no need to use the
command line to distinguish among all entries for a given source.
Ninja 1.9 is required in or
The following changes since commit 7be29f2f1a3f5b037d27eedbd5df9f441e8c8c16:
Merge tag 'pull-vfio-20250509' of https://github.com/legoater/qemu into
staging (2025-05-09 12:04:35 -0400)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to
Queued, thanks.
Paolo
On Mon, May 12, 2025 at 03:16:34PM +, Chaney, Ben wrote:
> Hello,
>
> When live migrating to a destination host with pmem there is a very
> long downtime where the guest is paused. In some cases, this can be as high
> as 5 minutes, compared to less than one second in the good case.
>
On Fri, May 09, 2025 at 03:40:17PM -0500, Eric Blake wrote:
> v3 was here:
> https://lists.gnu.org/archive/html/qemu-devel/2025-04/msg04525.html
>
> In v4:
> - Rearrange series a bit to try and simplify logic for how zero
>bitmap is populated, when pre-zeroing is attempted, and how
>detec
On Fri, May 09, 2025 at 03:40:30PM -0500, Eric Blake wrote:
> Prove that blockdev-mirror can now result in sparse raw destination
> files, regardless of whether the source is raw or qcow2. By making
> this a separate test, it was possible to test effects of individual
> patches for the various pie
On Fri, May 09, 2025 at 03:40:28PM -0500, Eric Blake wrote:
> When mirroring, the goal is to ensure that the destination reads the
> same as the source; this goal is met whether the destination is sparse
> or fully-allocated (except when explicitly punching holes, then merely
> reading zero is not
On Fri, May 09, 2025 at 03:40:27PM -0500, Eric Blake wrote:
> When doing a sync=full mirroring, we can skip pre-zeroing the
> destination if it already reads as zeroes and we are not also trying
> to punch holes due to detect-zeroes. With this patch, there are fewer
> scenarios that have to pass i
On Sat, May 10, 2025 at 11:28:59AM +0200, Markus Armbruster wrote:
> PATCH 10 empties out and deletes qapi/machine-target.json. PATCH 04
> empties out qapi/misc-target.json without deleting it. Missing:
>
> * Delete qapi/misc-target.json
>
> * Delete entry F: qapi/machine-target.json in MAINTAI
On Sat, May 10, 2025 at 08:08:02AM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
>
> > On Fri, May 09, 2025 at 03:43:30PM +0200, Markus Armbruster wrote:
> >> Daniel P. Berrangé writes:
> >> > Even if we had a QAPI schema that didn't vary per target, this is
> >> > repeated probin
On Sat, May 10, 2025 at 11:57:10AM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
>
> > This removes the TARGET_I386 condition from the rtc-reset-reinjection
> > command. This requires providing a QMP command stub for non-i386 target.
> > This in turn requires moving the command out
From: Daniel P. Berrangé
When seeing a new/deleted/renamed file we check to see if MAINTAINERS
is updated, but we don't give the user a list of files affected, as
we don't want to repeat the same warning many times over.
Using the new file list hook, we can give a single warning at the
end with
From: Daniel P. Berrangé
The ACPI test data check needs to analyse a list of all files in a
commit, so can use the new hook for processing the file list.
Signed-off-by: Daniel P. Berrangé
---
scripts/checkpatch.pl | 61 ---
1 file changed, 29 insertions(
From: Daniel P. Berrangé
Going forward we want all newly created source files to have an
SPDX-License-Identifier tag present.
Initially mandate this for C, Python, Perl, Shell source files,
as well as JSON (QAPI) and Makefiles, while encouraging users
to consider it for other file types.
The ne
From: Daniel P. Berrangé
This reverts commit fa4d79c64dae03ffa269e42e21822453856618b7.
The logic in this commit was flawed in two critical ways
* It always failed to report SPDX validation on the last newly
added file. IOW, it only worked if at least 2 new files were
added in a commit
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